118 lines
3.9 KiB
C
118 lines
3.9 KiB
C
/* stm32f2xxGpio.h - STM32F20x/STM32F21x General Purpose IO header file */
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/*
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* Copyright (c) 2012 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01b,24may12,jmz added bit field definitions for MODER, OSPEEDR, PUPDR,
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OTYPER, and AFR registers
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01a,02may12,rec Created - Content extracted from stm32f2xx.h v01a
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*/
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/*
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DESCRIPTION
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This file contains register definitions specifc to the STM32F20x/STM32F21x
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General Purpose Input/Output registers.
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SEE ALSO:
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\tb RM0033 Reference manual STM32F205xx, STM32F207xx, STM32F215xx and STM32F217xx
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advanced ARM-based 32-bit MCUs, DEC 2011
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*/
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#ifndef __INCstm32f2xxGpioh
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#define __INCstm32f2xxGpioh
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Base register definitions */
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#define STM32F2XX_GPIOx_MODER(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x0)
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#define STM32F2XX_GPIOx_OTYPER(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x4)
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#define STM32F2XX_GPIOx_OSPEEDR(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x8)
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#define STM32F2XX_GPIOx_PUPDR(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0xC)
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#define STM32F2XX_GPIOx_IDR(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x10)
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#define STM32F2XX_GPIOx_ODR(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x14)
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#define STM32F2XX_GPIOx_LCKR(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x1C)
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#define STM32F2XX_GPIOx_AFRL(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x20)
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#define STM32F2XX_GPIOx_AFRH(n) (STM32F2XX_GPIO_BASE + (n * 0x400) + 0x24)
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/* Bit field definitions */
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#define STM32F2XX_GPIO_MODER_INPUT (0x0)
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#define STM32F2XX_GPIO_MODER_OUTPUT (0x1)
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#define STM32F2XX_GPIO_MODER_ALT_FUNC (0x2)
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#define STM32F2XX_GPIO_MODER_ANALOG (0x3)
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#define STM32F2XX_GPIO_OSPEEDR_2MHZ (0x0)
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#define STM32F2XX_GPIO_OSPEEDR_25MHZ (0x1)
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#define STM32F2XX_GPIO_OSPEEDR_50MHZ (0x2)
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#define STM32F2XX_GPIO_OSPEEDR_100MHZ (0x3)
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#define STM32F2XX_GPIO_PUPDR_NONE (0x0)
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#define STM32F2XX_GPIO_PUPDR_UP (0x1)
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#define STM32F2XX_GPIO_PUPDR_DOWN (0x2)
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#define STM32F2XX_GPIO_AFR_AF0 (0x0)
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#define STM32F2XX_GPIO_AFR_AF1 (0x1)
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#define STM32F2XX_GPIO_AFR_AF2 (0x2)
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#define STM32F2XX_GPIO_AFR_AF3 (0x3)
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#define STM32F2XX_GPIO_AFR_AF4 (0x4)
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#define STM32F2XX_GPIO_AFR_AF5 (0x5)
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#define STM32F2XX_GPIO_AFR_AF6 (0x6)
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#define STM32F2XX_GPIO_AFR_AF7 (0x7)
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#define STM32F2XX_GPIO_AFR_AF8 (0x8)
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#define STM32F2XX_GPIO_AFR_AF9 (0x9)
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#define STM32F2XX_GPIO_AFR_AF10 (0xA)
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#define STM32F2XX_GPIO_AFR_AF11 (0xB)
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#define STM32F2XX_GPIO_AFR_AF12 (0xC)
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#define STM32F2XX_GPIO_AFR_AF13 (0xD)
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#define STM32F2XX_GPIO_AFR_AF14 (0xE)
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#define STM32F2XX_GPIO_AFR_AF15 (0xF)
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#define STM32F2XX_GPIO_OTYPER_PUSHPULL (0x0)
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#define STM32F2XX_GPIO_OTYPER_OPENDRAIN (0x1)
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#define STM32F2XX_GPIO_MODULE_A 0
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#define STM32F2XX_GPIO_MODULE_B 1
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#define STM32F2XX_GPIO_MODULE_C 2
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#define STM32F2XX_GPIO_MODULE_D 3
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#define STM32F2XX_GPIO_MODULE_E 4
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#define STM32F2XX_GPIO_MODULE_F 5
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#define STM32F2XX_GPIO_MODULE_G 6
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#define STM32F2XX_GPIO_MODULE_H 7
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#define STM32F2XX_GPIO_MODULE_I 8
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#define STM32F2XX_GPIO_PIN_0 0
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#define STM32F2XX_GPIO_PIN_1 1
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#define STM32F2XX_GPIO_PIN_2 2
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#define STM32F2XX_GPIO_PIN_3 3
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#define STM32F2XX_GPIO_PIN_4 4
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#define STM32F2XX_GPIO_PIN_5 5
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#define STM32F2XX_GPIO_PIN_6 6
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#define STM32F2XX_GPIO_PIN_7 7
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#define STM32F2XX_GPIO_PIN_8 8
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#define STM32F2XX_GPIO_PIN_9 9
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#define STM32F2XX_GPIO_PIN_10 10
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#define STM32F2XX_GPIO_PIN_11 11
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#define STM32F2XX_GPIO_PIN_12 12
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#define STM32F2XX_GPIO_PIN_13 13
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#define STM32F2XX_GPIO_PIN_14 14
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#define STM32F2XX_GPIO_PIN_15 15
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCstm32f2xxGpioh */
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