131 lines
4.3 KiB
C
131 lines
4.3 KiB
C
/* asmPpc.h - PowerPC assembler definitions header file */
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/*
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* Copyright 1984-2007, 2013 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01x,28feb13,h_k added T4_ERRATUM_CPU6198 for e6500.
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01w,05oct07,kk added macros to support SHL GOT table access
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01v,19jul06,pch move kernel-only definitions to kernel-only archPpc.h file
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01v,06jun06,jpb Updated for POSIX namespace conformance.
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Changed C preprocessor macro CPU to _VX_CPU.
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01u,01nov04,pch SPR 83004: move SPRG[4-7] definitions from asmPpc.h to ppc405.h
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01t,10dec03,pch TEMPORARY HACK for msync/mbar in PPC440gnu
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01s,03dec03,jtp Add MMU_MASK operation
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01r,09sep03,yvp Removed definition of the SYSCALL_PROLOG macro.
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01q,03sep03,yvp Added system call trap stub definition.
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01p,12dec02,pch Add generic PPC32 support
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01o,26mar02,pcs Add defines for I & D BAT's 4-7.
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01n,02may01,pch Documentation cleanup
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01m,25oct00,s_m renamed PPC405 cpu types
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01l,12jun00,alp Added PPC405 Support
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01k,18mar97,tam made INT_MASK definition conditional.
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01j,08apr96,tpr move implementation specific definition in ppcXXX.h.
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01i,04mar96,tam added some SPR definitions for the PPC403.
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01h,26feb96,kkk added HID0 for PPC601.
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01g,14feb96,tpr added PPC604 support.
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01f,09feb95,yao added RFCI, MTBESR_P0 macro for PPC403.
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01e,30jan95,yao added DBCR for PPC403. fixed mtdcr macros for PPC403.
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01d,06jan95,vin corrected HID0 (was 8, now 1008).
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01c,15nov94,caf moved register defines to toolPpc.h.
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01b,04nov94,yao changed PPC403GA to PPC403. moved tool related macros
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to tools.h.
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01a,25may94,yao written.
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*/
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#ifndef __INCasmPpch
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#define __INCasmPpch
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* TEMPORARY HACK for msync/mbar in PPC440gnu */
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#if (_VX_CPU == _VX_PPC440 && defined(_GNU_TOOL))
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#define msync sync
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#define mbar eieio
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#endif
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/* special purpose register encoding */
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#define XER 1 /* external exception register */
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#define LR 8 /* link register (return address) */
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#define CTR 9 /* counter register */
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#define BO_dCTR_NZERO_AND_NOT 0
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#define BO_dCTR_ZERO_AND_NOT 2
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#define BO_IF_NOT 4
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#define BO_dCTR_ZERO_AND 10
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#define BO_IF 12
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#define BO_dCTR_NZERO 16
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#define BO_dCTR_ZERO 18
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#define BO_ALWAYS 20
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#define CR0_LT 8
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/* macros for globals via the Global Offset table for SHLs in assembly code */
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#ifdef _WRS_KERNEL
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# if defined(T4_ERRATUM_CPU6198) && defined(_WRS_CONFIG_SMP)
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# define _PPC_KERNEL_MTMSR(msr, scr, label) \
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mtspr MCSRR1, msr; /* put new MSR into machine check SSR */ \
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lis scr, HI(label##_mtmsrwa); /* get address of */ \
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ori scr, scr, LO(label##_mtmsrwa); /* where to rfmci to */ \
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mtspr MCSRR0, scr; /* put into MCSRR0 */ \
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rfmci; /* perform change to MSR */ \
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label##_mtmsrwa: /* the workaround rfmci always goes here */
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# define _PPC_KERNEL_MTMSR_WITH_BLR(msr, scr) \
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mtspr MCSRR1, msr; /* put new MSR into machine check SSR */ \
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mfspr scr, LR; /* get address of where to rfmci to */ \
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mtspr MCSRR0, scr; /* put into MCSRR0 */ \
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rfmci; /* perform change to MSR */ \
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/* the workaround rfmci returns to the caller \
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* directly, or goes to the next instruction \
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* if an interrupt is raised at the rfmci \
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*/ \
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blr
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# else
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# define _PPC_KERNEL_MTMSR(msr, scr, label) \
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mtmsr msr
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# define _PPC_KERNEL_MTMSR_WITH_BLR(msr, scr) \
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mtmsr msr; \
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blr
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# endif /* T4_ERRATUM_CPU6198 && _WRS_CONFIG_SMP */
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#else
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# ifdef __SO_PICABIRTP__
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/*
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* Shared-library globals must be accessed via the Global Offset
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* Table for the current instance (attachment) of the shared library.
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* Used by vxAtomicALib.s.
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*/
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#define _PPC_RTP_GLOBAL_GET(globalName, reg) \
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lis reg, HIADJ(__GOTT_BASE__); \
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lwz reg, LO(__GOTT_BASE__)(reg); /* reg = &GOT[] */ \
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lwz reg, __GOTT_INDEX__(reg); /* reg = &GOT[myInstance] */ \
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lwz reg, globalName@got(reg); /* reg = &globalName */ \
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lwz reg, 0(reg) /* reg = globalName */
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# else /* __SO_PICABIRTP__ */
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#define _PPC_RTP_GLOBAL_GET(globalName, reg) \
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lis reg, HIADJ(globalName); \
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lwz reg, LO(globalName)(reg);
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# endif /* __SO_PICABIRTP__ */
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#endif /* _WRS_KERNEL */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCasmPpch */
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