308 lines
12 KiB
C
308 lines
12 KiB
C
/* fppLib.h - floating-point coprocessor support library header */
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/* Copyright 1992-1993,2001-2002,2008,2010-2011 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01m,22dec11,jjk WIND00313302 - Fix display of FP/MMX registers
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01l,27jul11,g_x add xmm[] and ymm[] to FPREG_SET (WIND00285122)
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01k,22mar11,ggm WIND00262870 - Added fppArchCpuInit.
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01j,19jan11,ggm XSave/XRestore implementation for extended state context
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switch.
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01i,29sep10,scm adjust offset for FPXREG_FPX for DOUBLEX_SSE structs...
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01h,05mar08,scm WIND00116608.
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01g,25mar02,hdn added two APIs to detect illegal FPU usage (spr 70187)
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01f,21nov01,hdn derived xmm[] from the reserved res2[] in FPX_CONTEXT
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01e,21aug01,hdn imported SSE support from T31 ver 01g
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01d,02sep93,hdn deleted a macro FPX.
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01c,08jun93,hdn added support for c++. updated to 5.1.
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01b,29sep92,hdn changed UTINY to UCHAR.
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01a,07apr92,hdn written based on TRON version.
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*/
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#ifndef __INCfppI86Libh
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#define __INCfppI86Libh
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* control register: defines for control word */
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#define FPCR_IM 0x0001 /* IM exc-mask invalid operation */
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#define FPCR_DM 0x0002 /* DM exc-mask denormalized operand */
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#define FPCR_ZM 0x0004 /* ZM exc-mask zero divide */
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#define FPCR_OM 0x0008 /* OM exc-mask overflow */
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#define FPCR_UM 0x0010 /* UM exc-mask underflow */
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#define FPCR_PM 0x0020 /* PM exc-mask precision */
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#define FPCR_PC_SINGLE 0x0000 /* PC single precision(24 bits) */
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#define FPCR_PC_DOUBLE 0x0200 /* PC double precision(53 bits) */
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#define FPCR_PC_EXTENDED 0x0300 /* PC extended precision(64 bits) */
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#define FPCR_PC_MASK 0xfcff /* PC extended precision(64 bits) */
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#define FPCR_RC_NEAREST 0x0000 /* RC round to nearest */
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#define FPCR_RC_DOWN 0x0400 /* RC round down */
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#define FPCR_RC_UP 0x0800 /* RC round up */
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#define FPCR_RC_ZERO 0x0c00 /* RC round to zero */
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#define FPCR_RC_MASK 0xf3ff /* RC round bits mask */
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#define FPCR_X 0x1000 /* X infinity control */
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/* status register: defines for status word */
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#define FPSR_IE 0x0001 /* IE exc-flag invalid operation */
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#define FPSR_DE 0x0002 /* DE exc-flag denormalized operand */
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#define FPSR_ZE 0x0004 /* ZE exc-flag zero divide */
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#define FPSR_OE 0x0008 /* OE exc-flag overflow */
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#define FPSR_UE 0x0010 /* UE exc-flag underflow */
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#define FPSR_PE 0x0020 /* PE exc-flag precision */
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#define FPSR_SF 0x0040 /* SF stack fault */
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#define FPSR_ES 0x0080 /* ES error summary status */
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#define FPSR_C0 0x0100 /* C0 condition code */
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#define FPSR_C1 0x0200 /* C1 condition code */
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#define FPSR_C2 0x0400 /* C2 condition code */
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#define FPSR_TOP 0x3800 /* TOP top of stack pointer */
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#define FPSR_C3 0x4000 /* C3 condition code */
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#define FPSR_B 0x8000 /* FPU busy */
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/* number of FP/MM and XMM registers on coprocessor */
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#define FP_NUM_REGS 8 /* number of FP/MM registers */
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#define XMM_NUM_REGS 8 /* number of XMM registers */
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#define FP_NUM_RESERVED 14 /* reserved area in FPX_CONTEXT */
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#define XSAVE_HEADER 64 /* Number of bytes in the XSAVE header */
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/* maximum size of floating-point coprocessor state frame */
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#define FPO_STATE_FRAME_SIZE 108 /* nBytes of FPO_CONTEXT */
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#define FPX_STATE_FRAME_SIZE 512 /* nBytes of FPX_CONTEXT */
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/* FPREG_SET structure offsets */
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#define FPREG_FPCR 0x00 /* offset to FPCR in FPREG_SET */
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#define FPREG_FPSR 0x04 /* offset to FPSR in FPREG_SET */
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#define FPREG_FPTAG 0x08 /* offset to FPTAG in FPREG_SET */
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#define FPREG_OP 0x0c /* offset to OP in FPREG_SET */
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#define FPREG_IP 0x10 /* offset to IP in FPREG_SET */
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#define FPREG_CS 0x14 /* offset to CS in FPREG_SET */
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#define FPREG_DP 0x18 /* offset to DP in FPREG_SET */
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#define FPREG_DS 0x1c /* offset to DS in FPREG_SET */
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#define FPREG_FPX(n) (0x20 + (n)*sizeof(DOUBLEX)) /* offset to FPX(n) */
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/* FPX_CONTEXT REG_SET - structure offsets for New FP context */
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#define FPXREG_FPCR 0x00 /* offset to FPCR in FPREG_SET */
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#define FPXREG_FPSR 0x02 /* offset to FPSR in FPREG_SET */
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#define FPXREG_FPTAG 0x04 /* offset to FPTAG in FPREG_SET */
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#define FPXREG_OP 0x06 /* offset to OP in FPREG_SET */
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#define FPXREG_IP 0x08 /* offset to IP in FPREG_SET */
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#define FPXREG_CS 0x0c /* offset to CS in FPREG_SET */
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#define FPXREG_DP 0x10 /* offset to DP in FPREG_SET */
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#define FPXREG_DS 0x14 /* offset to DS in FPREG_SET */
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#define FPXREG_RSVD0 0x18 /* offset to RESERVED0 in FPREG_SET */
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#define FPXREG_RSVD1 0x1c /* offset to RESERVED1 in FPREG_SET */
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#define FPXREG_FPX(n) (0x20 + (n)*sizeof(DOUBLEX_SSE)) /* offset to FPX(n) */
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#ifndef _ASMLANGUAGE
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/* DOUBLEX - double extended precision */
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typedef struct
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{
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UCHAR f[10]; /* ST[0-7] or MM[0-7] */
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} DOUBLEX;
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/* DOUBLEX_SSE - double extended precision used in FPX_CONTEXT for SSE */
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typedef struct
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{
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UCHAR xmm[16]; /* for 128 bits XMM registers */
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} DOUBLEX_SSE;
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/* FPREGO_SET - FP register set that is different from FP_CONTEXT */
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typedef struct fpregOSet
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{
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int fpcr; /* control word */
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int fpsr; /* status word */
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int fptag; /* tag word */
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int op; /* last FP instruction op code */
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int ip; /* instruction pointer */
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int cs; /* instruction pointer selector */
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int dp; /* data pointer */
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int ds; /* data pointer selector */
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DOUBLEX fpx[FP_NUM_REGS]; /* FR[0-7] non-TOS rel. order */
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} FPREGO_SET;
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/* FPREGX_SET - FP register set that is corresponding to FPX_CONTEXT*/
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typedef struct fpregXSet
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{
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int fpcr; /* control word */
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int fpsr; /* status word */
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int fptag; /* tag word */
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int op; /* last FP instruction op code */
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int ip; /* instruction pointer */
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int cs; /* instruction pointer selector */
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int dp; /* data pointer */
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int ds; /* data pointer selector */
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DOUBLEX fpx[FP_NUM_REGS]; /* FR[0-7] non-TOS rel. order */
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DOUBLEX_SSE xmm[XMM_NUM_REGS]; /* 8*16 XMM[0-7] */
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} FPREGX_SET;
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/* FPREGX_EXT_SET - FP register set that is corresponding to FPX_EXT_CONTEXT */
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typedef struct fpregX_ExtSet
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{
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int fpcr; /* control word */
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int fpsr; /* status word */
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int fptag; /* tag word */
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int op; /* last FP instruction op code */
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int ip; /* instruction pointer */
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int cs; /* instruction pointer selector */
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int dp; /* data pointer */
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int ds; /* data pointer selector */
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DOUBLEX fpx[FP_NUM_REGS]; /* FR[0-7] non-TOS rel. order */
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DOUBLEX_SSE xmm[XMM_NUM_REGS]; /* 8*16 XMM[0-7] */
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DOUBLEX_SSE ymm[XMM_NUM_REGS]; /* 8*16 higher 128 bits of YMM[0-7] */
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} FPREGX_EXT_SET;
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/* FPREG_SET - Common FP register set */
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typedef struct fpregSet
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{
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union n
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{
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FPREGO_SET o; /* old FPO_CONTEXT for fsave/frstor */
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FPREGX_SET x; /* new FPX_CONTEXT for fxsave/fxrstor */
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FPREGX_EXT_SET x_ext; /* FPX_EXT_CONTEXT for xsave/xrstor */
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} n;
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} FPREG_SET;
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/* FPO_CONTEXT - Old FP context used by fsave/frstor instruction */
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typedef struct fpOcontext
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{
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int fpcr; /* 4 control word */
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int fpsr; /* 4 status word */
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int fptag; /* 4 tag word */
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int ip; /* 4 instruction pointer */
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short cs; /* 2 instruction pointer selector */
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short op; /* 2 last FP instruction op code */
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int dp; /* 4 data pointer */
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int ds; /* 4 data pointer selector */
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DOUBLEX fpx[FP_NUM_REGS]; /* 8*10 FR[0-7] non-TOS rel. order */
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} FPO_CONTEXT; /* 108 bytes total */
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/* FPX_CONTEXT - New FP context used by fxsave/fxrstor instruction */
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typedef struct fpXcontext
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{
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short fpcr; /* 2 control word */
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short fpsr; /* 2 status word */
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short fptag; /* 2 tag word */
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short op; /* 2 last FP instruction op code */
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int ip; /* 4 instruction pointer */
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int cs; /* 4 instruction pointer selector */
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int dp; /* 4 data pointer */
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int ds; /* 4 data pointer selector */
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int reserved0; /* 4 reserved */
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int reserved1; /* 4 reserved */
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DOUBLEX_SSE fpx[FP_NUM_REGS]; /* 8*16 FR[0-7] non-TOS rel. order */
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DOUBLEX_SSE xmm[XMM_NUM_REGS]; /* 8*16 XMM[0-7] */
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DOUBLEX_SSE res2[FP_NUM_RESERVED]; /* 14*16 reserved */
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} FPX_CONTEXT; /* 512 bytes total */
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/* FPX_EXT_CONTEXT - Extended FP context used by xsave/xrstor instruction */
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typedef struct fpX_ExtContext
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{
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short fpcr; /* 2 control word */
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short fpsr; /* 2 status word */
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short fptag; /* 2 tag word */
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short op; /* 2 last FP instruction op code */
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int ip; /* 4 instruction pointer */
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int cs; /* 4 instruction pointer selector */
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int dp; /* 4 data pointer */
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int ds; /* 4 data pointer selector */
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int reserved0; /* 4 reserved */
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int reserved1; /* 4 reserved */
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DOUBLEX_SSE fpx[FP_NUM_REGS]; /* 8*16 FR[0-7] non-TOS rel. order */
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DOUBLEX_SSE xmm[XMM_NUM_REGS]; /* 8*16 XMM[0-7] */
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DOUBLEX_SSE res2[FP_NUM_RESERVED]; /* 14*16 reserved */
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UCHAR xSaveHeader[XSAVE_HEADER]; /* 64 XSave header */
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DOUBLEX_SSE ymm[XMM_NUM_REGS]; /* 8*16 higher 128 bits of YMM[0-7] */
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} FPX_EXT_CONTEXT; /* 704 bytes total */
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/* FP_CONTEXT - Common FP context */
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typedef struct fpContext
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{
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union u
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{
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FPO_CONTEXT o; /* old FPO_CONTEXT for fsave/frstor */
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FPX_CONTEXT x; /* new FPX_CONTEXT for fxsave/fxrstor */
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FPX_EXT_CONTEXT x_ext; /* FPX_EXT_CONTEXT for xsave/xrstor */
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} u;
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} FP_CONTEXT;
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/* variable declarations */
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extern REG_INDEX fpRegName[]; /* f-point data register table */
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extern REG_INDEX fpXregName[]; /* f-point data register table for FPX and FPX_EXT */
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extern REG_INDEX fpCtlRegName[]; /* f-point control register table */
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extern REG_INDEX fpXctlRegName[]; /* new f-point control register table */
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extern WIND_TCB *pFppTaskIdPrevious; /* task id for deferred exceptions */
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extern FUNCPTR fppCreateHookRtn; /* arch dependent create hook routine */
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extern FUNCPTR fppDisplayHookRtn; /* arch dependent display routine */
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extern VOIDFUNCPTR _func_fppSaveRtn; /* fppSave or fppXsave */
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extern VOIDFUNCPTR _func_fppRestoreRtn; /* fppRestore or fppXrestore */
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/* function declarations */
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#if defined(__STDC__) || defined(__cplusplus)
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extern void fppArchCpuInit(void);
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extern void fppArchInit (void);
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extern void fppArchTaskCreateInit (FP_CONTEXT *pFpContext);
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extern STATUS fppProbeSup (void);
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extern void fppProbeTrap (void);
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extern void fppDtoDx (DOUBLEX *pDx, double *pDouble);
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extern void fppDxtoD (double *pDouble, DOUBLEX *pDx);
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extern void fppXrestore (FP_CONTEXT *pFpContext);
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extern void fppXsave (FP_CONTEXT *pFpContext);
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extern void fppXregsToCtx (FPREG_SET *pFpRegSet, FP_CONTEXT *pFpContext);
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extern void fppExtXregsToCtx (FPREG_SET *pFpRegSet, FP_CONTEXT *pFpContext);
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extern void fppXctxToRegs (FP_CONTEXT *pFpContext, FPREG_SET *pFpRegSet);
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extern void fppExtXctxToRegs (FP_CONTEXT *pFpContext, FPREG_SET *pFpRegSet);
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extern void fppArchSwitchHook (WIND_TCB * pOldTcb, WIND_TCB * pNewTcb);
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extern STATUS fppArchSwitchHookEnable (BOOL enable);
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#else
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extern void fppArchCpuInit();
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extern void fppArchInit ();
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extern void fppArchTaskCreateInit ();
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extern STATUS fppProbeSup ();
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extern void fppProbeTrap ();
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extern void fppDtoDx ();
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extern void fppDxtoD ();
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extern void fppXrestore ();
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extern void fppXsave ();
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extern void fppXregsToCtx ();
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extern void fppExtXregsToCtx ();
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extern void fppXctxToRegs ();
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extern void fppExtXctxToRegs ();
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extern void fppArchSwitchHook ();
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extern STATUS fppArchSwitchHookEnable ();
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#endif /* __STDC__ */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCfppI86Libh */
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