99 lines
3.2 KiB
C
99 lines
3.2 KiB
C
/* mcfQspi.h - coldfire Queued SPI device header */
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/*
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* Copyright 2007,2008 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01b,06feb08,rec change CAST_M5208 macros to more generic type
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01a,14dec07,rec created
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*/
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#ifndef __INCmcfQspih
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#define __INCmcfQspih
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/* register offsets */
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#define MCF_QSPI_QMR_OFF 0x00
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#define MCF_QSPI_QDLYR_OFF 0x04
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#define MCF_QSPI_QWR_OFF 0x08
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#define MCF_QSPI_QIR_OFF 0x0C
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#define MCF_QSPI_QAR_OFF 0x10
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#define MCF_QSPI_QDR_OFF 0x14
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/* Register read/write macros */
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#define MCF_QSPI_QMR (CAST_MCF_VOLPTR( UINT16 )(MCF_QSPI_BASE + \
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MCF_QSPI_QMR_OFF))
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#define MCF_QSPI_QDLYR (CAST_MCF_VOLPTR( UINT16 )(MCF_QSPI_BASE + \
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MCF_QSPI_QDLYR_OFF))
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#define MCF_QSPI_QWR (CAST_MCF_VOLPTR( UINT16 )(MCF_QSPI_BASE + \
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MCF_QSPI_QWR_OFF))
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#define MCF_QSPI_QIR (CAST_MCF_VOLPTR( UINT16 )(MCF_QSPI_BASE + \
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MCF_QSPI_QIR_OFF))
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#define MCF_QSPI_QAR (CAST_MCF_VOLPTR( UINT16 )(MCF_QSPI_BASE + \
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MCF_QSPI_QAR_OFF))
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#define MCF_QSPI_QDR (CAST_MCF_VOLPTR( UINT16 )(MCF_QSPI_BASE + \
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MCF_QSPI_QDR_OFF))
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/* Bit definitions and macros for MCF_QSPI_QMR */
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#define MCF_QSPI_QMR_BAUD(x) (((x)&0x00FF)<<0)
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#define MCF_QSPI_QMR_CPHA (0x0100)
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#define MCF_QSPI_QMR_CPOL (0x0200)
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#define MCF_QSPI_QMR_BITS(x) (((x)&0x000F)<<10)
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#define MCF_QSPI_QMR_DOHIE (0x4000)
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#define MCF_QSPI_QMR_MSTR (0x8000)
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/* Bit definitions and macros for MCF_QSPI_QDLYR */
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#define MCF_QSPI_QDLYR_DTL(x) (((x)&0x00FF)<<0)
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#define MCF_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8)
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#define MCF_QSPI_QDLYR_SPE (0x8000)
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/* Bit definitions and macros for MCF_QSPI_QWR */
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#define MCF_QSPI_QWR_NEWQP(x) (((x)&0x000F)<<0)
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#define MCF_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8)
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#define MCF_QSPI_QWR_CSIV (0x1000)
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#define MCF_QSPI_QWR_WRTO (0x2000)
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#define MCF_QSPI_QWR_WREN (0x4000)
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#define MCF_QSPI_QWR_HALT (0x8000)
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/* Bit definitions and macros for MCF_QSPI_QIR */
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#define MCF_QSPI_QIR_SPIF (0x0001)
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#define MCF_QSPI_QIR_ABRT (0x0004)
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#define MCF_QSPI_QIR_WCEF (0x0008)
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#define MCF_QSPI_QIR_SPIFE (0x0100)
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#define MCF_QSPI_QIR_ABRTE (0x0400)
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#define MCF_QSPI_QIR_WCEFE (0x0800)
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#define MCF_QSPI_QIR_ABRTL (0x1000)
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#define MCF_QSPI_QIR_ABRTB (0x4000)
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#define MCF_QSPI_QIR_WCEFB (0x8000)
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/* Bit definitions and macros for MCF_QSPI_QAR */
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#define MCF_QSPI_QAR_ADDR(x) (((x)&0x003F)<<0)
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#define MCF_QSPI_QAR_TRANS (0x0000)
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#define MCF_QSPI_QAR_RECV (0x0010)
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#define MCF_QSPI_QAR_CMD (0x0020)
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/* Bit definitions and macros for MCF_QSPI_QDR */
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#define MCF_QSPI_QDR_DATA(x) (((x)&0xFFFF)<<0)
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#define MCF_QSPI_QDR_CONT (0x8000)
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#define MCF_QSPI_QDR_BITSE (0x4000)
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#define MCF_QSPI_QDR_DT (0x2000)
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#define MCF_QSPI_QDR_DSCK (0x1000)
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#define MCF_QSPI_QDR_QSPI_CS3 (0x0800)
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#define MCF_QSPI_QDR_QSPI_CS2 (0x0400)
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#define MCF_QSPI_QDR_QSPI_CS1 (0x0200)
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#define MCF_QSPI_QDR_QSPI_CS0 (0x0100)
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#endif
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