165 lines
5.8 KiB
C
165 lines
5.8 KiB
C
/* usbPhyUlpi.h - USB ULPI PHY Common Header File */
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/*
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* Copyright (c) 2010, 2011 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify, or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01c,09mar11,w_x add ULPI DEBUG register bit masks
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01b,18feb11,w_x remove duplicated definitions
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01a,30may10,w_x written
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*/
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#ifndef __INCusbPhyUlpih
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#define __INCusbPhyUlpih
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#include <vxWorks.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Define ULPI Phy Register Address */
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#define USB_ULPI_VID_LOW 0x00 /* Vendor ID Low */
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#define USB_ULPI_VID_HIGH 0x01 /* Vendor ID High */
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#define USB_ULPI_PID_LOW 0x02 /* Product ID Low */
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#define USB_ULPI_PID_HIGH 0x03 /* Product ID High */
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#define USB_ULPI_FUNCTION_CTL 0x04 /* Function Control */
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#define USB_ULPI_INTERFACE_CTL 0x07 /* Interface Control */
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#define USB_ULPI_OTG_CTL 0x0A /* OTG Control */
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#define USB_ULPI_INTR_EN_RISING 0x0D /* USB Interrupt Enable Rising */
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#define USB_ULPI_INTR_EN_FALLING 0x10 /* USB Interrupt Enable Falling */
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#define USB_ULPI_INTR_STATUS 0x13 /* USB Interrupt Status */
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#define USB_ULPI_INTR_LATCH 0x14 /* USB Interrupt Latch */
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#define USB_ULPI_DEBUG 0x15 /* Debug */
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#define USB_ULPI_SCRATCH 0x16 /* Scratch Register */
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#define USB_ULPI_CARKIT_CTL 0x19 /* Carkit Control (Optional) */
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#define USB_ULPI_CARKIT_INTR_DELAY 0x1C /* Carkit Interrupt Delay (Optional) */
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#define USB_ULPI_CARKIT_INTR_EN 0x1D /* Carkit Interrupt Enable (Optional) */
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#define USB_ULPI_CARKIT_INTR_STATUS 0x20 /* Carkit Interrupt Status (Optional) */
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#define USB_ULPI_CARKIT_INTR_LATCH 0x21 /* Carkit Interrupt Latch (Optional) */
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#define USB_ULPI_CARKIT_PULSE_CTL 0x22 /* Carkit Pulse Control (Optional) */
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#define USB_ULPI_TRANS_POS_WIIDTH 0x25 /* Transmit Positive Width (Optional) */
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#define USB_ULPI_TRANS_NEG_WIIDTH 0x26 /* Transmit Negative Width (Optional) */
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#define USB_ULPI_RECEV_POL_RECOVERY 0x27 /* Receive Polarity Recovery (Optional) */
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#define USB_ULPI_SET_ADJ 0x01
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#define USB_ULPI_CLR_ADJ 0x02
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/* ULPI PHY OTG Control Register bits */
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#define ULPI_OTG_CTL_USE_EXT_VBUS_IND (1 << 7) /* Use ext. Vbus indicator */
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#define ULPI_OTG_CTL_DRV_VBUS_EXT (1 << 6) /* Drive Vbus external */
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#define ULPI_OTG_CTL_DRV_VBUS (1 << 5) /* Drive Vbus */
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#define ULPI_OTG_CTL_CHRG_VBUS (1 << 4) /* Charge Vbus */
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#define ULPI_OTG_CTL_DISCHRG_VBUS (1 << 3) /* Discharge Vbus */
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#define ULPI_OTG_CTL_DM_PULL_DOWN (1 << 2) /* enable DM Pull Down */
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#define ULPI_OTG_CTL_DP_PULL_DOWN (1 << 1) /* enable DP Pull Down */
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#define ULPI_OTG_CTL_ID_PULL_UP (1 << 0) /* enable ID Pull Up */
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/* FUNC_CTRL */
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#define ULPI_FUNC_CTRL_SUSPENDM (1 << 6) /* Active low PHY suspend.*/
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#define ULPI_FUNC_CTRL_RESET (1 << 5) /* Active high transceiver reset.*/
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#define ULPI_FUNC_CTRL_OPMODE_MSK (3 << 3) /* Select the required bit encoding style.*/
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#define ULPI_FUNC_CTRL_XCVRSELECT_MSK (3 << 0) /* Select the required transceiver speed.*/
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#define ULPI_FUNC_CTRL_TERMSELECT (1 << 2) /* Controls the internal 1.5-k pullup resistor
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* and 45 HS terminations */
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/* IFC_CTRL - Enables alternate interfaces and PHY features */
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#define ULPI_IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
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#define ULPI_IFC_CTRL_AUTORESUME (1 << 4)
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#define ULPI_IFC_CTRL_CLOCK_SUSPENDM (1 << 3)
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#define ULPI_IFC_CTRL_CARKITMODE (1 << 2)
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#define ULPI_IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
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/*
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* 0x0: Normal operation
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* 0x1: Nondriving
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* 0x2: Disable bit-stuff and NRZI encoding
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* 0x3: Reserved
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*/
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#define ULPI_OPMODE_NORMAL ((0) << 3)
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#define ULPI_OPMODE_NONDRIVING ((1) << 3)
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#define ULPI_OPMODE_NO_BITSTUFF_NRZI ((2) << 3)
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/*
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* 0x0: Enable HS transceiver
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* 0x1: Enable FS transceiver
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* 0x2: Enable LS transceiver
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* 0x3: Enable FS transceiver for LS packets
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* (FS preamble is automatically prepended.)
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*/
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#define ULPI_XCVRSELECT_HS 0
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#define ULPI_XCVRSELECT_FS 1
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#define ULPI_XCVRSELECT_LS 2
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#define ULPI_XCVRSELECT_FS_LS 3
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/*
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* Current value of UTMI+ Hostdisconnect output.
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* Applicable only in host mode. Automatically reset to 0b when
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* Low Power Mode is entered.
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*/
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#define ULPI_INTR_Hostdisconnect (UINT8)(1 << 0)
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/*
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* Current value of UTMI+ VbusValid output.
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*/
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#define ULPI_INTR_VbusValid (UINT8)(1 << 1)
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/*
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* Current value of UTMI+ SessValid output. SessValid is
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* the same as UTMI+ AValid.
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*/
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#define ULPI_INTR_SessValid (UINT8)(1 << 2)
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/* Current value of UTMI+ SessEnd output. */
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#define ULPI_INTR_SessEnd (UINT8)(1 << 3)
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/*
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* Current value of UTMI+ IdGnd output. IdGnd is valid
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* 50ms after IdPullup is set to 1b, otherwise IdGnd is
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* undefined and should be ignored.
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*/
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#define ULPI_INTR_IdGnd (UINT8)(1 << 4)
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#define ULPI_INTR_ALL \
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(ULPI_INTR_Hostdisconnect | \
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ULPI_INTR_VbusValid | \
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ULPI_INTR_SessValid | \
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ULPI_INTR_SessEnd | \
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ULPI_INTR_IdGnd)
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/* ULPI DEBUG register bit masks */
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#define ULPI_DEBUG_LINESTATE0 (UINT8)(1 << 0)
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#define ULPI_DEBUG_LINESTATE1 (UINT8)(1 << 1)
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#define ULPI_DEBUG_LINESTATE_SE0 (UINT8)(0)
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#define ULPI_DEBUG_LINESTATE_FSK (UINT8)(1)
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#define ULPI_DEBUG_LINESTATE_FSJ (UINT8)(2)
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#define ULPI_DEBUG_LINESTATE_SE1 (UINT8)(3)
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#define ULPI_DEBUG_LINESTATE_MSK (UINT8)(3)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCusbPhyUlpih */
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