301 lines
9.8 KiB
Plaintext
301 lines
9.8 KiB
Plaintext
# defs.mips - MIPS specific definitions shared by all toolchains
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#
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# Copyright (c) 2002-2008, 2010-2011 Wind River Systems, Inc.
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#
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# The right to copy, distribute, modify or otherwise make use
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# of this software may be licensed only pursuant to the terms
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# of an applicable Wind River license agreement.
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#
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# modification history
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# --------------------
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# 02h,20sep11,rlg removal of bcm products sb1 and bcm33xx
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# 02g,03mar11,slk add xlp variant
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# 02f,05nov10,pch CQ212178: avoid building rm7xxx
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# 02e,13aug10,slk simplify defines for LMM enabled mode
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# 02d,20jul10,slk add CC_DEFINES for LOCAL_UNMAPPED_BASE_ADRS
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# 02c,12may10,slk add LD_UNMAPPED_FLAGS for large memory model support
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# 02c,30mar10,d_c Add cav_cn5xxx and cav_cn6xxx variants
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# 02b,27aug08,slk enable SDA for diab and gnu
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# 02a,19aug08,mze TOOL changes
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# 01z,03jul08,pee fixing SMP support for VSB configuration.
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# 01y,24jun08,pee VSB.
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# 01x,08may08,slk add mti24kx variant to SMP supported targets
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# 01w,17jul07,dcc added SDA support. Not enabled yet because it is not ready.
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# 01v,09aug07,rlg Changes for the MIPS Library restructuring
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# 01u,17jul07,jmt Remove MIPSI32 support for mti5kx
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# 01t,06jun07,pes Back out -g workaround for n32 builds.
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# 01s,04jun07,agf Remove octeon5xxx
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# 01r,25may07,pes Temporarily force -g compilation.
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# 01r,29may07,agf add xlr variant
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# 01q,22may07,pes Switch to n32 builds
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# 01p,17apr07,pes Remove MIPSI64 builds for rm9xxx variant. Device has
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# non-compliant config register.
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# 01o,30mar07,pes Enable octeon SMP builds.
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# 01n,14ma407,pee adding generic option support
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# 01o,12mar07,pes Update for MIPS library restructure.
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# 01n,20feb07,pes Modify support matrix for new library builds.
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# 01m,20sep06,pes Remove rm7000 and rm9000 variants from SMP builds for now.
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# 01l,18jul06,agf add bcm33xx PAL
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# 01l,27jun06,pee added TC_INFO for osconfig
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# 01m,19may06,pes Add rm7k CPU_ARCH to library builds.
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# 01l,15may06,lei Added VXBUILD & DIR_EXT for SMP build.
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# 01k,10jan06,pes Add support for non-standard cache line sizes.
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# 01j,22mar05,rlg Added _rm9xxx variant.
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# 01i,17feb05,pes Added _mti24kx variant.
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# 01h,15nov04,agf Removed variants not being shipped for v6.0
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# 01g,20jul04,fle Added KERNEL_VMA_ADJUST definition
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# 01f,06apr04,yvp Moved ABI_SPEC into h/tool/diab/make.MIPS*
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# 01e,10dec03,yvp Added ABI_SPEC.
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# 01d,13nov03,c_c Added CPU VARIANT definitions.
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# 01c,31mar03,sn append to rather than overwrite LD_LINK_PATH_EXTRA
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# to allow other contributions (e.g. from defs.diab)
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# 01b,16jan02,pes Define LD_LINK_PATH_EXTRA
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# 01a,09jan02,pes written
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#
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# DESCRIPTION
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# This file contains MIPS specific definitions and flags to be
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# shared by all toolchains.
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#
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# NOTE
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# The file name comes from defs.$(VX_CPU_FAMILY)
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#
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# CPU VARIANTS
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# To compile part of the source tree for a CPU variant, first a tag must be
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# defined with which archive directory names are modified. In addition several
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# variables must be defined for each CPU variant build. Refer to the example
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# further below for more details. Note that CPU variant builds are normaly
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# started automatically at the end of the corresponding generic CPU build.
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#
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BUILD_ENDIAN_SUFFIX_big =
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BUILD_ENDIAN_SUFFIX_little = le
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ABI_ENDIAN_SUFFIX_big = BE
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ABI_ENDIAN_SUFFIX_little = LE
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_WRS_CONFIG_ENDIAN ?= big
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_WRS_CONFIG_FP ?= hard
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ifeq ($(findstring le,$(TOOL)),le)
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override _WRS_CONFIG_ENDIAN = little
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endif
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ifeq ($(findstring sf,$(TOOL)),sf)
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override _WRS_CONFIG_FP = soft
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endif
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ifeq ($(CPU),MIPSI3)
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DEFINE_CC += -D_WRS_MIPS_N32_ABI
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CFLAGS_AS += -D_WRS_MIPS_N32_ABI
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endif
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ifeq ($(CPU),MIPSI64)
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DEFINE_CC += -D_WRS_MIPS_N32_ABI
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CFLAGS_AS += -D_WRS_MIPS_N32_ABI
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endif
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ifeq ($(CPU),MIPSI64R2)
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DEFINE_CC += -D_WRS_MIPS_N32_ABI
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CFLAGS_AS += -D_WRS_MIPS_N32_ABI
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endif
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ifeq ($(_WRS_CONFIG_ENDIAN),little)
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DEFINE_CC += -DMIPSEL
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CFLAGS_AS += -DMIPSEL
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else
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DEFINE_CC += -DMIPSEB
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CFLAGS_AS += -DMIPSEB
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endif
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ifeq ($(_WRS_CONFIG_FP),soft)
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# definitions for soft float
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DEFINE_CC += -DSOFT_FLOAT
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CFLAGS_AS += -DSOFT_FLOAT
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endif
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TOOLENV = mips
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VX_CPU_FAMILY = mips
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ARCH_DIR = mips
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## bsp flags
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ROM_ENTRY = romInit
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SYS_ENTRY = sysInit
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USR_ENTRY = usrInit
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LD_LINK_PATH_EXTRA += \
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-L$(LIB_ROOT)/$(VX_CPU_FAMILY)$(ARCH_OPTION_SUFFIX)/$(CPU)$(CPU_OPTION_SUFFIX)/$(TOOL_SPECIFIC_DIR)$(CPU_VARIANT)$(MINOR_OPTION_SUFFIX) \
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-L$(LIB_ROOT)/$(VX_CPU_FAMILY)$(ARCH_OPTION_SUFFIX)/$(CPU)$(CPU_OPTION_SUFFIX)/$(TOOL_COMMON_DIR)$(CPU_VARIANT)$(MINOR_OPTION_SUFFIX)
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ifneq ($(CPU_VARIANT),)
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DEFINE_CC += -DCPU_VARIANT=$(CPU_VARIANT) -DMIPSXX$(CPU_VARIANT)
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endif
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ifneq ($(LIB_DIR_TAG),)
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DEFINE_CC += -DCPU_VARIANT=$(LIB_DIR_TAG) -DMIPSXX$(LIB_DIR_TAG)
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endif
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# override kernel vma adjust tool
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KERNEL_VMA_ADJUST = $(BIN_DIR)/mipsBootPrep
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## CPU variants builds
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#
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# For CPU variants builds, the name of the directory(ies) where archives are
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# installed is appended with a unique tag defined by LIB_DIR_TAG. The make
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# variable CPU_VARIANT_LIST define the whole list of these CPU variant tags
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# and should be updated everytime a new CPU variant build is introduced. For
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# instance:
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# CPU_VARIANT_LIST = _cpuVariant1 _cpuVariant2 _cpuVariant3
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# only _cav_cn[356]xxx, _mti24kx, _razaXLR variants for SMP for now
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CPU_VARIANT_LIST_CONFIG_SMP_y = _cav_cn3xxx \
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_cav_cn5xxx \
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_cav_cn6xxx \
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_cav_cn7xxx \
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_mti24kx \
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_xlr \
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_xlp
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CPU_VARIANT_LIST_CONFIG_SMP_ = _mti4kx \
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_mti5kx \
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_mti24kx \
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_tx49xx \
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_vr55xx \
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_rm9xxx \
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_cav_cn3xxx \
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_cav_cn5xxx \
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_cav_cn6xxx \
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_cav_cn7xxx \
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_xlr \
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_xlp
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CPU_VARIANT_LIST = $(CPU_VARIANT_LIST_CONFIG_SMP_$(_WRS_CONFIG_SMP))
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# Each CPU variant build must define the following variables:
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#
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# - VX_ARCHIVE_LIST$(LIB_DIR_TAG): this is the list of archive(s) to
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# build for this CPU variant. Note that $(LIB_DIR_TAG) must be equal
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# to one of the item defined in CPU_VARIANT_LIST. For instance:
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# VX_ARCHIVE_LIST_cpuVariant1 = libarch.a libdrv.a
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#
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# - CPU_VARIANT_CPU_TOOL_LIST$(LIB_DIR_TAG): this is the list of
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# CPU/TOOL combination(s) for which the CPU variant build must be
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# run. For instance:
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# CPU_VARIANT_CPU_TOOL_LIST_cpuVariant2 = MIPSI2diab MIPSI3diab
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#
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# NOTE: CPU variant build(s) are kicked off by the default build rule
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# in target/h/make/rules.library.
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VX_ARCHIVE_LIST_mti4kx = libarch.a
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VX_ARCHIVE_LIST_mti5kx = libarch.a
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VX_ARCHIVE_LIST_mti24kx = libarch.a
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VX_ARCHIVE_LIST_tx49xx = libarch.a
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VX_ARCHIVE_LIST_vr55xx = libarch.a
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VX_ARCHIVE_LIST_rm7xxx = libarch.a
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VX_ARCHIVE_LIST_rm9xxx = libarch.a
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VX_ARCHIVE_LIST_cav_cn3xxx = libarch.a
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VX_ARCHIVE_LIST_cav_cn5xxx = libarch.a
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VX_ARCHIVE_LIST_cav_cn6xxx = libarch.a
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VX_ARCHIVE_LIST_cav_cn7xxx = libarch.a
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VX_ARCHIVE_LIST_xlr = libarch.a
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VX_ARCHIVE_LIST_xlp = libarch.a
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CPU_VARIANT_CPU_TOOL_LIST_mti4kx = MIPSI2sfdiab MIPSI2sfdiable \
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MIPSI32sfdiab MIPSI32sfdiable \
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MIPSI32R2sfdiab MIPSI32R2sfdiable
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CPU_VARIANT_CPU_TOOL_LIST_mti5kx = MIPSI2sfdiab MIPSI2sfdiable \
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MIPSI3diab MIPSI3diable \
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MIPSI64diab MIPSI64diable \
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MIPSI64sfdiab MIPSI64sfdiable
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CPU_VARIANT_CPU_TOOL_LIST_mti24kx = MIPSI2sfdiab MIPSI2sfdiable \
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MIPSI32R2diab MIPSI32R2diable \
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MIPSI32R2sfdiab MIPSI32R2sfdiable
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CPU_VARIANT_CPU_TOOL_LIST_tx49xx = MIPSI2sfdiab MIPSI2sfdiable \
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MIPSI3diab MIPSI3diable
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CPU_VARIANT_CPU_TOOL_LIST_vr55xx = MIPSI2sfdiab MIPSI2sfdiable \
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MIPSI3diab MIPSI3diable
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CPU_VARIANT_CPU_TOOL_LIST_rm7xxx = MIPSI2sfdiab MIPSI2sfdiable \
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MIPSI3diab MIPSI3diable
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CPU_VARIANT_CPU_TOOL_LIST_rm9xxx = MIPSI3diab MIPSI3diable
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CPU_VARIANT_CPU_TOOL_LIST_cav_cn3xxx = MIPSI64R2sfdiab MIPSI64R2sfdiable
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CPU_VARIANT_CPU_TOOL_LIST_cav_cn5xxx = MIPSI64R2sfdiab MIPSI64R2sfdiable
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CPU_VARIANT_CPU_TOOL_LIST_cav_cn6xxx = MIPSI64R2sfdiab MIPSI64R2sfdiable
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CPU_VARIANT_CPU_TOOL_LIST_cav_cn7xxx = MIPSI64R2sfdiab MIPSI64R2sfdiable \
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MIPSI64R2diab MIPSI64R2diable
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CPU_VARIANT_CPU_TOOL_LIST_xlr = MIPSI64sfdiab MIPSI64sfdiable
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CPU_VARIANT_CPU_TOOL_LIST_xlp = MIPSI64R2diab MIPSI64R2diable
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ifeq ($(TC_INFO),TRUE)
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ifeq ($(findstring sf, $(TOOL)),sf)
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FP = soft
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else
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FP = hard
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endif
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ifeq ($(findstring le, $(TOOL)),le)
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ENDIAN = little
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else
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ENDIAN = big
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endif
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endif
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# SDA support is enabled for MIPS
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ifeq ($(TOOL_FAMILY), diab)
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ifeq ($(SDA_DISABLE),)
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CC_SDA_FLAGS = -Xsmall-const=8 -Xsmall-data=8
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endif
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endif
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ifeq ($(TOOL_FAMILY), gnu)
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ifeq ($(SDA_DISABLE),)
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CC_SDA_FLAGS = -G8 -fno-common
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endif
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endif
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# default large memory model to disabled
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LOCAL_EXCPT_ADRS = $(LOCAL_MEM_LOCAL_ADRS)
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LARGE_MEMORY_MODEL_ENABLED = 0
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# large memory model build sets LARGE_MEMORY_MODEL_ENABLED
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ifeq ($(LMM_ENABLED), 1)
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LARGE_MEMORY_MODEL_ENABLED = 1
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LOCAL_EXCPT_ADRS = $(LOCAL_UNMAPPED_BASE_ADRS)
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SECTION_REMOVE_NAMES= -R .unmapped.data -R .unmapped.text -R .kseg0bss -R .vectors.text
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SECTION_SELECT_NAMES= -j .unmapped.data -j .unmapped.text -j .vectors.text
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BINARY_RENAME_SYMBOLS= --redefine-sym _binArrayStart=_unmappedBinArrayStart --redefine-sym binArrayStart=unmappedBinArrayStart --redefine-sym _binArrayEnd=_unmappedBinArrayEnd --redefine-sym binArrayEnd=unmappedBinArrayEnd
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endif
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ifeq ($(TOOL_FAMILY), gnu)
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LD_LOW_FLAGS += -defsym _VX_START_EXCPT_BASE=0x$(LOCAL_EXCPT_ADRS) -defsym LMM_ENABLED=$(LARGE_MEMORY_MODEL_ENABLED)
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LD_HIGH_FLAGS += -defsym _VX_START_EXCPT_BASE=0x$(LOCAL_EXCPT_ADRS) -defsym LMM_ENABLED=$(LARGE_MEMORY_MODEL_ENABLED)
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endif
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ifeq ($(TOOL_FAMILY), diab)
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LD_LOW_FLAGS += -D_VX_START_EXCPT_BASE=0x$(LOCAL_EXCPT_ADRS) -DLMM_ENABLED=$(LARGE_MEMORY_MODEL_ENABLED)
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LD_HIGH_FLAGS += -D_VX_START_EXCPT_BASE=0x$(LOCAL_EXCPT_ADRS) -DLMM_ENABLED=$(LARGE_MEMORY_MODEL_ENABLED)
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endif
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# BSP make builds need LOCAL_MEM_PHYS_ADRS for LMM builds
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ifneq ($(BSP2PRJ), TRUE)
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ifeq ($(LARGE_MEMORY_MODEL_ENABLED), 1)
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CC_DEFINES += -DLOCAL_MEM_PHYS_ADRS=0x$(LOCAL_MEM_PHYS_ADRS)
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CC_DEFINES += -DLOCAL_UNMAPPED_BASE_ADRS=0x$(LOCAL_UNMAPPED_BASE_ADRS)
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endif
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endif
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#end of defs.mips
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