140 lines
3.5 KiB
C
140 lines
3.5 KiB
C
/* pwrOrphanPciDevices.h - definitions for Pwr Orphan PCI Devices */
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/*
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* Copyright (c) 2011, 2012 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01d,10jul12,rbc WIND00361107 - Fix issue with multiple devices that have same
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VendorId and DeviceId
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01c,09apr12,rbc WIND00315814 - Fix power management image reboot if
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INCLUDE_NETWORK is excluded
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01b,05aug11,rbc WIND00290401 - Callback for orphan device power management
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01a,22jul11,rbc WIND00255358 - Initial Creation
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*/
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#ifndef __INCpwrOrphanPciDevicesh
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#define __INCpwrOrphanPciDevicesh
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Private adapter context structure.
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*/
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/* Power Management Capabilities Cfg Space Offsets */
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#define PMCAP_ID_OFFSET 0x00
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#define PMCAP_NEXTPTR_OFFSET 0x01
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#define PMCAP_PMC_OFFSET 0x02
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#define PMCAP_PMCSR_OFFSET 0x04
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#define PMCAP_PMCSRBSE_OFFSET 0x06
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#define PMCAP_DATA_OFFSET 0x07
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/* Power Management Capabilities Register */
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#define PMC_SPEC_MASK 0x0007
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#define PMC_SPEC_1_0 0x0001
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#define PMC_SPEC_1_1 0x0002
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#define PMC_SPEC_1_2 0x0003
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#define PMC_PME_CLK_MASK 0x0008
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#define PMC_PME_CLK_REQ 0x0008
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#define PMC_DSI_MASK 0x0020
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#define PMC_DSI 0x0020
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#define PMC_AUX_CURR_MASK 0x01C0
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#define PMC_AUX_CURR_000 0x0000
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#define PMC_AUX_CURR_055 0x0040
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#define PMC_AUX_CURR_100 0x0080
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#define PMC_AUX_CURR_160 0x00C0
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#define PMC_AUX_CURR_220 0x0100
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#define PMC_AUX_CURR_270 0x0140
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#define PMC_AUX_CURR_320 0x0180
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#define PMC_AUX_CURR_375 0x01C0
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#define PMC_D1_SUPPORT_MASK 0x0200
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#define PMC_D1_SUPPORT 0x0200
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#define PMC_D2_SUPPORT_MASK 0x0400
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#define PMC_D2_SUPPORT 0x0400
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#define PMC_PME_SUPPORT_MASK 0xF800
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#define PMC_PME_SUPPORT_D0 0x0800
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#define PMC_PME_SUPPORT_D1 0x1000
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#define PMC_PME_SUPPORT_D2 0x2000
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#define PMC_PME_SUPPORT_D3HOT 0x4000
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#define PMC_PME_SUPPORT_D3COLD 0x8000
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/* Power Management Control and Status Register */
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#define PMCSR_PWR_STATE_MASK 0x0003
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#define PMCSR_PWR_STATE_D0 0x0000
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#define PMCSR_PWR_STATE_D1 0x0001
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#define PMCSR_PWR_STATE_D2 0x0002
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#define PMCSR_PWR_STATE_D3 0x0003
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#define PMCSR_PME_ENABLE_MASK 0x0100
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#define PMCSR_PME_ENABLE 0x0100
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#define PMCSR_DATA_SELECT_MASK 0x1E00
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#define PMCSR_DATA_SCALE_MASK 0x6000
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#define PMCSR_PME_STATUS_MASK 0x8000
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#define PMCSR_PME_ASSERTED 0x8000
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/* Power Management Capabilities Structure */
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typedef struct pci_pm_capability
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{
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UINT8 pmCapId;
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UINT8 pmCapNextPtr;
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UINT16 pmCapPMC;
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UINT16 pmCapPMCSR;
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UINT8 pmCapPMCSRBSE;
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UINT8 pmCapData;
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} PCI_PM_CAPABILITY;
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#define PCI_CFG_SIZE 16
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typedef struct pwr_orphan_pci_device
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{
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VXB_DEVICE_ID pDev; /* pointer to vxbus device */
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UINT16 pciVendId; /* PCI Vendor ID for orphan device */
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UINT16 pciDevId; /* PCI Device ID for orphan device */
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UINT32 pciConfig[PCI_CFG_SIZE]; /* PCI Config storage for orphan device */
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} PWR_ORPHAN_PCI_DEVICE;
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/* Driver Control Structure */
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typedef struct pci_orphan_device
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{
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VXB_DEVICE_ID devId;
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UINT32 unit;
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BOOL pmCapable;
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UINT8 pmCapableOffset;
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PCI_PM_CAPABILITY pciPmCap;
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} PCI_ORPHAN_DEVICE;
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/* Utility functions */
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void pwrPciOrphanInit(void);
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void pwrPciOrphansD0(void);
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void pwrPciOrphansD3(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCpwrOrphanPciDevicesh */
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