52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/* vxAtomicArchLibCommon.h - IA32 specific atomic library header */
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/*
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* Copyright (c) 2009, 2011-2012 Wind River Systems, Inc.
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*
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* The right to copy, distribute or otherwise make use of this software
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* may be licensed only pursuant to the terms of an applicable Wind River
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* license agreement.
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*/
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/*
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modification history
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--------------------
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01c,27apr12,scm WIND00346365 - VX_MEM_BARRIER_R()/_W()/_RW all using
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mfence...
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01b,05jan11,kk make VX_MEM_BARRIER_X() macros CPU variant dependent
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01a,17may09,gls written.
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*/
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#ifndef __INCvxAtomicArchLibCommonh
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#define __INCvxAtomicArchLibCommonh
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define _WRS_ARCH_SUPPORTS_MEM_BARRIER
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/*
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* Macros to provide memory barrier.
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*
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* For variants older than PENTIUM4, the mfence instruction
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* is not supported.
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*/
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#if (CPU==PENTIUM)
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#define VX_MEM_BARRIER_R() _WRS_ASM("NOP")
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#define VX_MEM_BARRIER_W() _WRS_ASM("NOP")
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#define VX_MEM_BARRIER_RW() _WRS_ASM("NOP")
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#define VX_INSTR_BARRIER() _WRS_ASM("NOP")
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#else
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#define VX_MEM_BARRIER_R() _WRS_BARRIER("lfence");
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#define VX_MEM_BARRIER_W() _WRS_BARRIER("sfence");
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#define VX_MEM_BARRIER_RW() _WRS_BARRIER("mfence");
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#define VX_INSTR_BARRIER() _WRS_BARRIER("mfence");
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCvxAtomicArchLibCommonh */
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