321 lines
14 KiB
C
321 lines
14 KiB
C
/* ixp400IntrCtl.h - interrupt controller driver Ixp400 */
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/*
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Copyright (c) 2002-2004 Wind River Systems, Inc. All rights reserved.
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Certain portions of these files may be copyright (c) 2002-2004 Intel
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Corporation.
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*/
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/*
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modification history
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--------------------
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01e,26sep07,jrp APIGEN Cleanup
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01d,24aug05,m_h interrupt controller for ixdp465 and related XSCALE BSPs
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01c,20dec04,pai Updated copyright notice.
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01b,24jul03,m_h PSM now named NPE
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01a,05jun02,jb initial version...
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*/
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#ifndef __INCixp400IntrCtlh
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#define __INCixp400IntrCtlh
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#include "ixp400.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* typedefs */
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#ifndef _ASMLANGUAGE
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#endif /* _ASMLANGUAGE */
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/* macros to convert interrupt vectors <-> interrupt numbers */
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#ifdef IVEC_TO_INUM
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#undef IVEC_TO_INUM
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#endif
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#define IVEC_TO_INUM(intVec) ((int) (intVec))
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#ifdef INUM_TO_IVEC
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#undef INUM_TO_IVEC
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#endif
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#define INUM_TO_IVEC(intNum) ((VOIDFUNCPTR *) (intNum))
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/*
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* Define Ixp400 Interrupt registers
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*/
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/*
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Interrupt Controller Register Definitions.
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*/
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#define IXP400_ICPR ( IXP400_INTC_BASE + 0x0 ) /* Interrupt Status Reg. */
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#define IXP400_ICMR ( IXP400_INTC_BASE + 0x4 ) /* Interrupt Enable Reg. */
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#define IXP400_ICLR ( IXP400_INTC_BASE + 0x8 ) /* Interrupt Select Reg IRQ/FIQ */
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#define IXP400_ICIP ( IXP400_INTC_BASE + 0xC ) /* IRQ Status Reg. */
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#define IXP400_ICFP ( IXP400_INTC_BASE + 0x10 ) /* FIQ Status Reg. */
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#define IXP400_ICHR ( IXP400_INTC_BASE + 0x14 ) /* Interrupt Priority Reg. */
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#define IXP400_ICIH ( IXP400_INTC_BASE + 0x18 ) /* IRQ Highest Pri Int Reg. */
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#define IXP400_ICFH ( IXP400_INTC_BASE + 0x1C ) /* FIQ Highest Pri Int Reg. */
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/* the following register are for handling INTR 31-63 */
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#ifdef IX_DEVICE_IXP465
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#define IXP400_ICPR_UPPER ( IXP400_INTC_BASE + 0x20 ) /* Interrupt Status Reg. #2 */
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#define IXP400_ICMR_UPPER ( IXP400_INTC_BASE + 0x24 ) /* Interrupt Enable Reg. #2 */
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#define IXP400_ICLR_UPPER ( IXP400_INTC_BASE + 0x28 ) /* Interrupt Select Reg IRQ/FIQ #2 */
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#define IXP400_ICIP_UPPER ( IXP400_INTC_BASE + 0x2C ) /* IRQ Status Reg. #2 */
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#define IXP400_ICFP_UPPER ( IXP400_INTC_BASE + 0x30 ) /* FIQ Status Reg. #2 */
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#define IXP400_ERROR_EN2 ( IXP400_INTC_BASE + 0x34 ) /* for interrupts 31-63, error priority enable */
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/* used to raise priority above all others */
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#endif
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#define IXP400_INT_LVL_NPEA (0)
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#define IXP400_INT_LVL_NPEB (1)
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#define IXP400_INT_LVL_NPEC (2)
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#define IXP400_INT_LVL_QM1 (3)
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#define IXP400_INT_LVL_QM2 (4)
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#define IXP400_INT_LVL_TIMER1 (5)
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#define IXP400_INT_LVL_GPIO0 (6)
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#define IXP400_INT_LVL_GPIO1 (7)
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#define IXP400_INT_LVL_PCI_INT (8)
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#define IXP400_INT_LVL_PCI_DMA1 (9)
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#define IXP400_INT_LVL_PCI_DMA2 (10)
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#define IXP400_INT_LVL_TIMER2 (11)
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#define IXP400_INT_LVL_USB (12)
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#define IXP400_INT_LVL_UART2 (13)
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#define IXP400_INT_LVL_TIMESTAMP (14)
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#define IXP400_INT_LVL_UART1 (15)
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#define IXP400_INT_LVL_WDOG (16)
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#define IXP400_INT_LVL_AHB_PMU (17)
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#define IXP400_INT_LVL_XSCALE_PMU (18)
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#define IXP400_INT_LVL_GPIO2 (19)
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#define IXP400_INT_LVL_GPIO3 (20)
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#define IXP400_INT_LVL_GPIO4 (21)
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#define IXP400_INT_LVL_GPIO5 (22)
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#define IXP400_INT_LVL_GPIO6 (23)
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#define IXP400_INT_LVL_GPIO7 (24)
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#define IXP400_INT_LVL_GPIO8 (25)
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#define IXP400_INT_LVL_GPIO9 (26)
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#define IXP400_INT_LVL_GPIO10 (27)
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#define IXP400_INT_LVL_GPIO11 (28)
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#define IXP400_INT_LVL_GPIO12 (29)
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#define IXP400_INT_LVL_INT1 (30)
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#define IXP400_INT_LVL_INT2 (31)
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#ifdef IX_DEVICE_IXP465
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#define IXP400_INT_LVL_USB_HOST (32)
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#define IXP400_INT_LVL_I2C (33)
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#define IXP400_INT_LVL_SSP (34)
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#define IXP400_INT_LVL_TSYNC (35)
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#define IXP400_INT_LVL_EAU_DONE (36)
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#define IXP400_INT_LVL_SHA_HASHING_DONE (37)
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#define IXP400_INT_LVL_RSVD_38 (38)
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#define IXP400_INT_LVL_RSVD_39 (39)
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#define IXP400_INT_LVL_RSVD_40 (40)
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#define IXP400_INT_LVL_RSVD_41 (41)
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#define IXP400_INT_LVL_RSVD_42 (42)
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#define IXP400_INT_LVL_RSVD_43 (43)
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#define IXP400_INT_LVL_RSVD_44 (44)
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#define IXP400_INT_LVL_RSVD_45 (45)
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#define IXP400_INT_LVL_RSVD_46 (46)
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#define IXP400_INT_LVL_RSVD_47 (47)
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#define IXP400_INT_LVL_RSVD_48 (48)
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#define IXP400_INT_LVL_RSVD_49 (49)
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#define IXP400_INT_LVL_RSVD_50 (50)
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#define IXP400_INT_LVL_RSVD_51 (51)
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#define IXP400_INT_LVL_RSVD_52 (52)
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#define IXP400_INT_LVL_RSVD_53 (53)
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#define IXP400_INT_LVL_RSVD_54 (54)
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#define IXP400_INT_LVL_RSVD_55 (55)
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#define IXP400_INT_LVL_RSVD_56 (56)
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#define IXP400_INT_LVL_RSVD_57 (57)
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#define IXP400_INT_LVL_SWCP (58)
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#define IXP400_INT_LVL_RSVD_59 (59)
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#define IXP400_INT_LVL_AQM (60)
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#define IXP400_INT_LVL_MCU (61)
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#define IXP400_INT_LVL_EBC (62)
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#define IXP400_INT_LVL_RSVD_63 (63)
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#endif
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/* Bit definitions for Interrupt Pending/Mask/Status registers */
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#define IXP400_INTC_NPEA (1 << IXP400_INT_LVL_NPEA)
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#define IXP400_INTC_NPEB (1 << IXP400_INT_LVL_NPEB)
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#define IXP400_INTC_NPEC (1 << IXP400_INT_LVL_NPEC)
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#define IXP400_INTC_QM1 (1 << IXP400_INT_LVL_QM1)
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#define IXP400_INTC_QM2 (1 << IXP400_INT_LVL_QM2)
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#define IXP400_INTC_TIMER1 (1 << IXP400_INT_LVL_TIMER1)
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#define IXP400_INTC_GPIO0 (1 << IXP400_INT_LVL_GPIO0)
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#define IXP400_INTC_GPIO1 (1 << IXP400_INT_LVL_GPIO1)
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#define IXP400_INTC_PCI_INT (1 << IXP400_INT_LVL_PCI_INT)
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#define IXP400_INTC_PCI_DMA1 (1 << IXP400_INT_LVL_PCI_DMA1)
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#define IXP400_INTC_PCI_DMA2 (1 << IXP400_INT_LVL_PCI_DMA2)
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#define IXP400_INTC_TIMER2 (1 << IXP400_INT_LVL_TIMER2)
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#define IXP400_INTC_USB (1 << IXP400_INT_LVL_USB)
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#define IXP400_INTC_UART2 (1 << IXP400_INT_LVL_UART2)
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#define IXP400_INTC_TIMESTAMP (1 << IXP400_INT_LVL_TIMESTAMP)
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#define IXP400_INTC_UART1 (1 << IXP400_INT_LVL_UART1)
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#define IXP400_INTC_WDOG (1 << IXP400_INT_LVL_WDOG)
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#define IXP400_INTC_AHB_PMU (1 << IXP400_INT_LVL_AHB_PMU)
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#define IXP400_INTC_XSCALE_PMU (1 << IXP400_INT_LVL_XSCALE_PMU)
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#define IXP400_INTC_GPIO2 (1 << IXP400_INT_LVL_GPIO2)
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#define IXP400_INTC_GPIO3 (1 << IXP400_INT_LVL_GPIO3)
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#define IXP400_INTC_GPIO4 (1 << IXP400_INT_LVL_GPIO4)
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#define IXP400_INTC_GPIO5 (1 << IXP400_INT_LVL_GPIO5)
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#define IXP400_INTC_GPIO6 (1 << IXP400_INT_LVL_GPIO6)
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#define IXP400_INTC_GPIO7 (1 << IXP400_INT_LVL_GPIO7)
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#define IXP400_INTC_GPIO8 (1 << IXP400_INT_LVL_GPIO8)
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#define IXP400_INTC_GPIO9 (1 << IXP400_INT_LVL_GPIO9)
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#define IXP400_INTC_GPIO10 (1 << IXP400_INT_LVL_GPIO10)
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#define IXP400_INTC_GPIO11 (1 << IXP400_INT_LVL_GPIO11)
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#define IXP400_INTC_GPIO12 (1 << IXP400_INT_LVL_GPIO12)
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#define IXP400_INTC_SW_INT1 (1 << IXP400_INT_LVL_INT1)
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#define IXP400_INTC_SW_INT2 (1 << IXP400_INT_LVL_INT2)
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#ifdef IX_DEVICE_IXP465
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#define IXP400_INTC_USB_HOST (1 << (IXP400_INT_LVL_USB_HOST - 32))
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#define IXP400_INTC_I2C (1 << (IXP400_INT_LVL_I2C - 32))
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#define IXP400_INTC_SSP (1 << (IXP400_INT_LVL_SSP - 32))
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#define IXP400_INTC_TSYNC (1 << (IXP400_INT_LVL_RSVD_TSYNC - 32))
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#define IXP400_INTC_EAU_DONE (1 << (IXP400_INT_LVL_RSVD_EAU_DONE - 32))
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#define IXP400_INTC_SHA_HASHING_DONE (1 << (IXP400_INT_LVL_RSVD_SHA_HASHING_DONE - 32))
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#define IXP400_INTC_RSVD_38 (1 << (IXP400_INT_LVL_RSVD_38 - 32))
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#define IXP400_INTC_RSVD_39 (1 << (IXP400_INT_LVL_RSVD_39 - 32))
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#define IXP400_INTC_RSVD_40 (1 << (IXP400_INT_LVL_RSVD_40 - 32))
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#define IXP400_INTC_RSVD_41 (1 << (IXP400_INT_LVL_RSVD_41 - 32))
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#define IXP400_INTC_RSVD_42 (1 << (IXP400_INT_LVL_RSVD_42 - 32))
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#define IXP400_INTC_RSVD_43 (1 << (IXP400_INT_LVL_RSVD_43 - 32))
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#define IXP400_INTC_RSVD_44 (1 << (IXP400_INT_LVL_RSVD_44 - 32))
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#define IXP400_INTC_RSVD_45 (1 << (IXP400_INT_LVL_RSVD_45 - 32))
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#define IXP400_INTC_RSVD_46 (1 << (IXP400_INT_LVL_RSVD_46 - 32))
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#define IXP400_INTC_RSVD_47 (1 << (IXP400_INT_LVL_RSVD_47 - 32))
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#define IXP400_INTC_RSVD_48 (1 << (IXP400_INT_LVL_RSVD_48 - 32))
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#define IXP400_INTC_RSVD_49 (1 << (IXP400_INT_LVL_RSVD_49 - 32))
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#define IXP400_INTC_RSVD_50 (1 << (IXP400_INT_LVL_RSVD_50 - 32))
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#define IXP400_INTC_RSVD_51 (1 << (IXP400_INT_LVL_RSVD_51 - 32))
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#define IXP400_INTC_RSVD_52 (1 << (IXP400_INT_LVL_RSVD_52 - 32))
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#define IXP400_INTC_RSVD_53 (1 << (IXP400_INT_LVL_RSVD_53 - 32))
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#define IXP400_INTC_RSVD_54 (1 << (IXP400_INT_LVL_RSVD_54 - 32))
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#define IXP400_INTC_RSVD_55 (1 << (IXP400_INT_LVL_RSVD_55 - 32))
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#define IXP400_INTC_RSVD_56 (1 << (IXP400_INT_LVL_RSVD_56 - 32))
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#define IXP400_INTC_RSVD_57 (1 << (IXP400_INT_LVL_RSVD_57 - 32))
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#define IXP400_INTC_SWCP (1 << (IXP400_INT_LVL_SWCP - 32))
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#define IXP400_INTC_RSVD_59 (1 << (IXP400_INT_LVL_RSVD_59 - 32))
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#define IXP400_INTC_AQM (1 << (IXP400_INT_LVL_AQM - 32))
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#define IXP400_INTC_MCU (1 << (IXP400_INT_LVL_MCU - 32))
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#define IXP400_INTC_EBC (1 << (IXP400_INT_LVL_EBC - 32))
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#define IXP400_INTC_RSVD_63 (1 << (IXP400_INT_LVL_RSVD_63 - 32))
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#endif
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/* Vector definitions */
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#define IXP400_INT_NUM_LEVELS_LOWER (32)
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#if IX_DEVICE_IXP465
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#define IXP400_INT_NUM_LEVELS (64)
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#else
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#define IXP400_INT_NUM_LEVELS (IXP400_INT_NUM_LEVELS_LOWER)
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#endif
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#define IXP400_INT_MODE INT_NON_PREEMPT_MODEL
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#define INT_VEC_NPEA IVEC_TO_INUM(IXP400_INT_LVL_NPEA)
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#define INT_VEC_NPEB IVEC_TO_INUM(IXP400_INT_LVL_NPEB)
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#define INT_VEC_NPEC IVEC_TO_INUM(IXP400_INT_LVL_NPEC)
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#define INT_VEC_QM1 IVEC_TO_INUM(IXP400_INT_LVL_QM1 )
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#define INT_VEC_QM2 IVEC_TO_INUM(IXP400_INT_LVL_QM2 )
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#define INT_VEC_TIMER1 IVEC_TO_INUM(IXP400_INT_LVL_TIMER1)
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#define INT_VEC_GPIO0 IVEC_TO_INUM(IXP400_INT_LVL_GPIO0)
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#define INT_VEC_GPIO1 IVEC_TO_INUM(IXP400_INT_LVL_GPIO1)
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#define INT_VEC_PCI IVEC_TO_INUM(IXP400_INT_LVL_PCI)
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#define INT_VEC_PCI_DMA1 IVEC_TO_INUM(IXP400_INT_LVL_PCI_DMA1)
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#define INT_VEC_PCI_DMA2 IVEC_TO_INUM(IXP400_INT_LVL_PCI_DMA2)
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#define INT_VEC_TIMER2 IVEC_TO_INUM(IXP400_INT_LVL_TIMER2)
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#define INT_VEC_APB_DMA IVEC_TO_INUM(IXP400_INT_LVL_APB_DMA)
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#define INT_VEC_USB IVEC_TO_INUM(IXP400_INT_LVL_USB)
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#define INT_VEC_UART1 IVEC_TO_INUM(IXP400_INT_LVL_UART1)
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#define INT_VEC_TIMESTAMP IVEC_TO_INUM(IXP400_INT_LVL_TIMESTAMP)
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#define INT_VEC_UART2 IVEC_TO_INUM(IXP400_INT_LVL_UART2)
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#define INT_VEC_WDOG IVEC_TO_INUM(IXP400_INT_LVL_WDOG)
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#define INT_VEC_AHB_PMU IVEC_TO_INUM(IXP400_INT_LVL_AHB_PMU)
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#define INT_VEC_XSCALE_PMU IVEC_TO_INUM(IXP400_INT_LVL_XSCALE_PMU)
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#define INT_VEC_GPIO2 IVEC_TO_INUM(IXP400_INT_LVL_GPIO2)
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#define INT_VEC_GPIO3 IVEC_TO_INUM(IXP400_INT_LVL_GPIO3)
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#define INT_VEC_GPIO4 IVEC_TO_INUM(IXP400_INT_LVL_GPIO4)
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#define INT_VEC_GPIO5 IVEC_TO_INUM(IXP400_INT_LVL_GPIO5)
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#define INT_VEC_GPIO6 IVEC_TO_INUM(IXP400_INT_LVL_GPIO6)
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#define INT_VEC_GPIO7 IVEC_TO_INUM(IXP400_INT_LVL_GPIO7)
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#define INT_VEC_GPIO8 IVEC_TO_INUM(IXP400_INT_LVL_GPIO8)
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#define INT_VEC_GPIO9 IVEC_TO_INUM(IXP400_INT_LVL_GPIO9)
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#define INT_VEC_GPIO10 IVEC_TO_INUM(IXP400_INT_LVL_GPIO10)
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#define INT_VEC_GPIO11 IVEC_TO_INUM(IXP400_INT_LVL_GPIO11)
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#define INT_VEC_GPIO12 IVEC_TO_INUM(IXP400_INT_LVL_GPIO12)
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#define INT_VEC_INT1 IVEC_TO_INUM(IXP400_INT_LVL_INT1)
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#define INT_VEC_INT2 IVEC_TO_INUM(IXP400_INT_LVL_INT2)
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#if IX_DEVICE_IXP465
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#define INT_VEC_USB_HOST IVEC_TO_INUM(IXP400_INT_LVL_USB_HOST)
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#define INT_VEC_I2C IVEC_TO_INUM(IXP400_INT_LVL_I2C)
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#define INT_VEC_SSP IVEC_TO_INUM(IXP400_INT_LVL_SSP)
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#define INT_VEC_TSYNC IVEC_TO_INUM(IXP400_INT_LVL_TSYNC)
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#define INT_VEC_EAU_DONE IVEC_TO_INUM(IXP400_INT_LVL_EAU_DONE)
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#define INT_VEC_SHA_HASHING_DONE IVEC_TO_INUM(IXP400_INT_LVL_SHA_HASHING_DONE)
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#define INT_VEC_RSVD_38 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_38)
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#define INT_VEC_RSVD_39 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_39)
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#define INT_VEC_RSVD_40 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_40)
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#define INT_VEC_RSVD_41 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_41)
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#define INT_VEC_RSVD_42 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_42)
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#define INT_VEC_RSVD_43 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_43)
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#define INT_VEC_RSVD_44 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_44)
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#define INT_VEC_RSVD_45 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_45)
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#define INT_VEC_RSVD_46 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_46)
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#define INT_VEC_RSVD_47 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_47)
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#define INT_VEC_RSVD_48 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_48)
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#define INT_VEC_RSVD_49 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_49)
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#define INT_VEC_RSVD_50 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_50)
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#define INT_VEC_RSVD_51 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_51)
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#define INT_VEC_RSVD_52 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_52)
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#define INT_VEC_RSVD_53 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_53)
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#define INT_VEC_RSVD_54 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_54)
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#define INT_VEC_RSVD_55 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_55)
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#define INT_VEC_RSVD_56 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_56)
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#define INT_VEC_RSVD_57 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_57)
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#define INT_VEC_SWCP IVEC_TO_INUM(IXP400_INT_LVL_SWCP)
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#define INT_VEC_RSVD_59 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_59)
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#define INT_VEC_AQM IVEC_TO_INUM(IXP400_INT_LVL_AQM)
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#define INT_VEC_MCU IVEC_TO_INUM(IXP400_INT_LVL_MCU)
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#define INT_VEC_EBC IVEC_TO_INUM(IXP400_INT_LVL_EBC)
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#define INT_VEC_RSVD_63 IVEC_TO_INUM(IXP400_INT_LVL_RSVD_63)
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#endif
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/*
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* Set the default value of ICHP - Interrupt highest priorty encoding register.
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*/
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#ifndef IXP400_ICHR_INIT_VALUE
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#define IXP400_ICHR_INIT_VALUE (0x00fac688)
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCIxp400IntrCtrl */
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