201 lines
5.4 KiB
C
201 lines
5.4 KiB
C
/* ne2000End.h - Novell/Eagle 2000 network interface header */
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/* Copyright 1984-2000, 2010 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01e,29apr10,pad Moved extern C statement after include statements.
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01d,02dec02,m_h PSTOP is not 0x80 on 8 bit devices (80785)
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01c,11jun00,ham removed reference to etherLib.
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01b,28may00,dat added more macros, gen clean up
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01a,16mar98,mem written, based on drv/netif/if_ene.h
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*/
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#ifndef __INCne2000Endh
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#define __INCne2000Endh
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#include "netinet/if_ether.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define EADDR_LEN 6
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#define NE2000_BUFSIZ (ETHERMTU + SIZEOF_ETHERHEADER + EADDR_LEN)
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/* NE 2000 on-board memory page addresses */
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#define NE2000_CONFIG_PAGE 0x00 /* where the Ethernet address is */
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#define NE2000_EADDR_LOC 0x00 /* location within config. page */
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#define NE2000_TSTART 0x40
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#define NE2000_PSTART 0x46
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#define NE2000_PSTOP16 0x80
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#define NE2000_PSTOP8 0x60
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#define NE2000_PSTOP NE2000_PSTOP16
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#define ENE_PAGESIZE 256
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typedef struct
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{
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UCHAR rstat;
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UCHAR next;
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UCHAR lowByteCnt;
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UCHAR uppByteCnt;
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} NE2000_HEADER;
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/* NS 8390 (Ethernet LAN Controller) */
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/* page-0, read */
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#define ENE_CMD 0x00 /* command */
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#define ENE_TRINCRL 0x01 /* TRDMA incrementer */
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#define ENE_TRINCRH 0x02 /* TRDMA incrementer */
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#define ENE_BOUND 0x03 /* boundary page */
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#define ENE_TSTAT 0x04 /* transmit status */
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#define ENE_COLCNT 0x05 /* collision error */
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#define ENE_INTSTAT 0x07 /* interrupt status */
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#define ENE_RSTAT 0x0c /* receive status */
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#define ENE_ALICNT 0x0d /* alignment error */
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#define ENE_CRCCNT 0x0e /* crc error */
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#define ENE_MPCNT 0x0f /* missed packet */
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/* page-0, write */
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#define ENE_RSTART 0x01 /* receive start */
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#define ENE_RSTOP 0x02 /* receive stop */
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#define ENE_TSTART 0x04 /* transmit start */
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#define ENE_TCNTL 0x05 /* transmit counter */
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#define ENE_TCNTH 0x06 /* transmit counter */
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#define ENE_RSAR0 0x08 /* remote address */
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#define ENE_RSAR1 0x09 /* remote address */
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#define ENE_RBCR0 0x0a /* remote byte count */
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#define ENE_RBCR1 0x0b /* remote byte count */
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#define ENE_RCON 0x0c /* receive config */
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#define ENE_TCON 0x0d /* transmit config */
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#define ENE_DCON 0x0e /* data config */
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#define ENE_INTMASK 0x0f /* interrupt mask */
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/* page-1, read and write */
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#define ENE_STA0 0x01 /* station address */
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#define ENE_STA1 0x02 /* station address */
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#define ENE_STA2 0x03 /* station address */
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#define ENE_STA3 0x04 /* station address */
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#define ENE_STA4 0x05 /* station address */
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#define ENE_STA5 0x06 /* station address */
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#define ENE_CURR 0x07 /* current page */
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#define ENE_MAR0 0x08 /* multicast address */
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#define ENE_MAR1 0x09 /* multicast address */
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#define ENE_MAR2 0x0a /* multicast address */
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#define ENE_MAR3 0x0b /* multicast address */
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#define ENE_MAR4 0x0c /* multicast address */
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#define ENE_MAR5 0x0d /* multicast address */
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#define ENE_MAR6 0x0e /* multicast address */
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#define ENE_MAR7 0x0f /* multicast address */
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/* page-2, read and write */
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#define ENE_NEXT 0x05 /* next page */
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#define ENE_BLOCK 0x06 /* block address */
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#define ENE_ENH 0x07 /* enable features */
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/* NE2000 board registers */
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#define ENE_DATA 0x10 /* data window */
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#define ENE_RESET 0x1f /* read here to reset */
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/* COMMAND: Command Register */
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#define CMD_PAGE2 0x80
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#define CMD_PAGE1 0x40
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#define CMD_PAGE0 0x00
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#define CMD_NODMA 0x20
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#define CMD_RWRITE 0x10
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#define CMD_RREAD 0x08
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#define CMD_TXP 0x04
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#define CMD_START 0x02
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#define CMD_STOP 0x01
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/* RCON: Receive Configuration Register */
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#define RCON_MON 0x20
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#define RCON_PROM 0x10
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#define RCON_GROUP 0x08
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#define RCON_BROAD 0x04
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#define RCON_RUNTS 0x02
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#define RCON_SEP 0x01
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/* TCON: Transmit Configuration Register */
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#define TCON_LB1 0x04
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#define TCON_LB0 0x02
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#define TCON_CRCN 0x01
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#define TCON_NORMAL 0x00 /* normal operation mode */
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/* DCON: Data Configuration Register */
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#define DCON_BSIZE1 0x40
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#define DCON_BSIZE0 0x20
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#define DCON_AUTO_INIT 0x10
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#define DCON_LOOPBK_OFF 0x08
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#define DCON_LOOPBK_ON 0x00
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#define DCON_DMA_32 0x04
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#define DCON_DMA_16 0x00
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#define DCON_BIG_ENDIAN 0x02
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#define DCON_LITTLE_ENDIAN 0x00
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#define DCON_BUS16 0x01
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#define DCON_BUS_8 0x00
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/* INTMASK: Interrupt Mask Register */
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#define IM_XDCE 0x40
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#define IM_CNTE 0x20
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#define IM_OVWE 0x10
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#define IM_TXEE 0x08
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#define IM_RXEE 0x04
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#define IM_PTXE 0x02
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#define IM_PRXE 0x01
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/* INTSTAT: Interrupt Status Register */
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#define ISTAT_RST 0x80
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#define ISTAT_RDC 0x40 /* remote DMA complete */
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#define ISTAT_CNT 0x20
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#define ISTAT_OVW 0x10
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#define ISTAT_TXE 0x08
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#define ISTAT_RXE 0x04
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#define ISTAT_PTX 0x02
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#define ISTAT_PRX 0x01
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/* TSTAT: Transmit Status Register */
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#define TSTAT_OWC 0x80
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#define TSTAT_CDH 0x40
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#define TSTAT_UNDER 0x20
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#define TSTAT_CRL 0x10
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#define TSTAT_ABORT 0x08
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#define TSTAT_TWC 0x04
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#define TSTAT_NDT 0x02
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#define TSTAT_PTX 0x01
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/* RSTAT: Receive Status Register */
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#define RSTAT_DFR 0x80
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#define RSTAT_DIS 0x40
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#define RSTAT_GROUP 0x20
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#define RSTAT_MPA 0x10
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#define RSTAT_OVER 0x08
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#define RSTAT_FAE 0x04
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#define RSTAT_CRC 0x02
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#define RSTAT_PRX 0x01
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/* ENH: Enable Features */
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#define ENH_WAIT1 0x80
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#define ENH_WAIT0 0x40
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#define ENH_SLOT1 0x10
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#define ENH_SLOT0 0x08
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/* flags - software synchronize bit definitions */
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#define TXING 0x01
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#define RXING 0x02
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#define TXREQ 0x04
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCne2000Endh */
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