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m241Neelima/vxworks-6.9/target/h/hwif/vxbus/vxbI2cLib.h
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2026-07-30 11:19:44 +05:30

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6.7 KiB
C

/* vxbI2cLib.h - I2C bus header file for vxBus */
/*
* Copyright (c) 2011-2012, 2015-2016 Wind River Systems, Inc.
*
* The right to copy, distribute, modify or otherwise make use
* of this software may be licensed only pursuant to the terms
* of an applicable Wind River license agreement.
*/
/*
modification history
--------------------
01f,05jan16,sye added vxbI2cDevRead2()/vxbI2cDevWrite2() (US71185)
01e,28jul15,sye added vxbI2cDevXfer for repeated start support. (VXW6-84022)
01d,09nov12,syt add parameters i2cDevEnableArg and pI2cDevEnableHook.
01c,14may12,y_y add readDelay parameter.
01b,19mar12,y_y add vxbI2cByNameRead()/vxbI2cByNameWrite() routines for generic
I2C device access.
01a,25aug11,l_z created
*/
#ifndef __INCvxbI2cLibh
#define __INCvxbI2cLibh
#include <vxWorks.h>
#include <hwif/vxbus/vxBus.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* defines */
#define I2C_READ 0x01
#define I2C_WRITE 0x00
#define FAST_MODE 400000
#define STD_MODE 100000
/* I2C message flags */
#define I2C_M_RD 0x0001 /* read data, from slave to master */
#define I2C_M_TEN 0x0010 /* ten bit chip address */
/*
* The real bytes to read is got from the first byte received, this is
* needed for SMBUS block read. When this flag is set, the "len" field of the
* I2C_MSG should be set to: 1 + extraBytes.
* 1 - the first byte received from slave.
* extraBytes - the extra bytes after the real bytes to be read, example,
* when PEC is needed, the extraBytes is 1.
*/
#define I2C_M_READ_LEN 0x0020
typedef struct i2cMsg
{
/*
* Slave address, either seven or ten bits. When this is a ten
* bit address, I2C_M_TEN must be set in the flags field and the driver
* must support ten bits.
*/
UINT16 addr;
UINT32 len; /* I2C message length */
UINT8 * buf; /* I2C message buffer */
UINT32 flags; /* I2C message flags */
UINT32 scl; /* SCL Clock Frequency */
}I2C_MSG;
/*
* Flag values for open(2) and fcntl(2)
* The kernel adds 1 to the open modes to turn it into some
* combination of FREAD and FWRITE.
*/
#define I2C_RDONLY 0x01 /* read only flag */
#define I2C_WORDADDR 0x02 /* word address flag */
#define I2C_BYTE_WR_ONLY 0x04 /* byte write only */
#define I2C_BYTE_RD_ONLY 0x08 /* byte read only */
#define I2C_RD_EXT_ACK 0x10 /* need a extra ACK when the address
* is word address */
typedef enum
{
DEV_TYPE = 0, /* device */
ADDR_TYPE = 1, /* address */
DATA_TYPE = 2 /* data */
} I2C_REG_TYPES;
typedef STATUS (*VXB_I2C_LOCK_BUS_FUNC) (VXB_DEVICE_ID);
typedef STATUS (*VXB_I2C_START_FUNC) (VXB_DEVICE_ID, BOOL);
typedef STATUS (*VXB_I2C_READ_FUNC) (VXB_DEVICE_ID, UINT8 *,UINT32);
typedef STATUS (*VXB_I2C_WRITE_FUNC) (VXB_DEVICE_ID, UINT8 *, UINT32,
I2C_REG_TYPES, BOOL);
typedef STATUS (*VXB_I2C_STOP_FUNC) (VXB_DEVICE_ID);
typedef STATUS (*VXB_I2C_UNLOCK_BUS_FUNC) (VXB_DEVICE_ID);
typedef STATUS (*VXB_I2C_DEV_READ) (VXB_DEVICE_ID, UINT8, UINT32,
UINT8 *,UINT32);
typedef STATUS (*VXB_I2C_DEV_WRITE) (VXB_DEVICE_ID, UINT8, UINT32, UINT8 *,
UINT32);
typedef void (*VXB_I2C_DEV_ENABLE) (void *);
typedef STATUS (*VXB_I2C_DEV_XFER_FUNC) (VXB_DEVICE_ID, I2C_MSG *, int num);
typedef struct i2cDevInputs
{
char * deviceName;
UINT8 deviceAddr;
UINT32 flag;
} I2C_DEV_INPUTS;
typedef struct vxbI2cBusCtrl
{
VXB_I2C_LOCK_BUS_FUNC vxbI2cLock; /* I2C lock by a devcie */
VXB_I2C_START_FUNC vxbI2cStart; /* start I2C bus */
VXB_I2C_READ_FUNC vxbI2cRead;
VXB_I2C_WRITE_FUNC vxbI2cWrite;
VXB_I2C_STOP_FUNC vxbI2cStop; /* start I2C bus */
VXB_I2C_UNLOCK_BUS_FUNC vxbI2cUnLock; /* I2C unlock by a devcie */
VXB_I2C_DEV_READ vxbI2cDevRead; /* I2C device read */
VXB_I2C_DEV_WRITE vxbI2cDevWrite; /* I2C device read */
VXB_I2C_DEV_XFER_FUNC vxbI2cDevXfer; /* I2C device transfer */
} VXB_I2C_BUS_CTRL;
typedef struct vxbI2cDevice
{
UINT8 deviceAddr;
VXB_DEVICE_ID pCtlr; /* I2C bus Controller */
VXB_I2C_BUS_CTRL * pI2cBusCtrl; /* bus controller function */
UINT32 flag;
UINT32 writeDelay;
UINT32 readDelay;
void * i2cDevEnableArg;
VXB_I2C_DEV_ENABLE pI2cDevEnableHook;
} I2C_HARDWARE;
typedef VXB_I2C_BUS_CTRL *(*VX_I2C_CTRL_FUNC) (VXB_DEVICE_ID);
struct vxbI2cRegister
{
struct vxbDevRegInfo b;
};
/* function declarations */
void i2cBusAnnounceDevices (VXB_DEVICE_ID busCtrlId);
STATUS vxbI2cBusLock (VXB_DEVICE_ID pDev);
STATUS vxbI2cBusStart (VXB_DEVICE_ID pDev, BOOL reStart);
STATUS vxbI2cBusAddrWrite (VXB_DEVICE_ID pDev, UINT8, I2C_REG_TYPES regType,
BOOL ack);
STATUS vxbI2cBusWrite (VXB_DEVICE_ID pDev, UINT8 * pBuf, int length);
STATUS vxbI2cBusRead (VXB_DEVICE_ID pDev, UINT8 * pBuf, int length);
STATUS vxbI2cDevRead (VXB_DEVICE_ID pDev, UINT32 startAddr, UINT8 * pDataBuf,
UINT32 length);
STATUS vxbI2cDevWrite (VXB_DEVICE_ID pDev, UINT32 startAddr, UINT8 * pDataBuf,
UINT32 length);
STATUS vxbI2cDevXfer (VXB_DEVICE_ID pDev, I2C_MSG * msgs, int num);
STATUS vxbI2cByNameRead (char * devName, UINT8 unit, UINT32 addr, UINT8 * buf,
UINT32 length);
STATUS vxbI2cByNameWrite (char * devName, UINT8 unit, UINT32 addr, UINT8 * buf,
UINT32 length);
STATUS vxbI2cDevRead2 (VXB_DEVICE_ID pDev, UINT8 * pAddrBuf, UINT32 addrLen,
UINT8 * pDataBuf, UINT32 dataLen);
STATUS vxbI2cDevWrite2 (VXB_DEVICE_ID pDev, UINT8 * pAddrBuf, UINT32 addrLen,
UINT8 * pDataBuf, UINT32 dataLen);
STATUS vxbI2cByNameRead2 (char * devName, UINT8 unit, UINT8 * pAddrBuf,
UINT32 addrLen, UINT8 * pDataBuf, UINT32 dataLen);
STATUS vxbI2cByNameWrite2 (char * devName, UINT8 unit, UINT8 * pAddrBuf,
UINT32 addrLen, UINT8 * pDataBuf, UINT32 dataLen);
STATUS vxbI2cBusStop (VXB_DEVICE_ID pDev);
STATUS vxbI2cBusUnLock (VXB_DEVICE_ID pDev);
void vxbI2cBusShow (VXB_DEVICE_ID busCtrlID);
void vxbI2cDeviceShow (VXB_DEVICE_ID pDev);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __INCvxbI2cLibh */