217 lines
7.3 KiB
C
217 lines
7.3 KiB
C
/* regsGv3.h - Thermal Monitor and Geyserville III Technology registers */
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/* Copyright 2002 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01a,26aug02,hdn written
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*/
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#ifndef __INCregsGv3h
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#define __INCregsGv3h
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* gv3Lib.c initialization status flags */
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#define GV3_INIT_NOT_DONE 0x0001 /* gv3Lib initialization not done */
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#define GV3_ERR_NO_TM 0x0002 /* no Thermal Monitor exist */
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#define GV3_OK_NO_GV 0x0004 /* no GV1+ or GV3 exist */
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#define GV3_OK_GV3 0x0008 /* GV3 exist */
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#define GV3_OK_NO_MATCH 0x0010 /* no matching FREQ_VID table */
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#define GV3_OK_TM2 0x0020 /* GV3 TM2 exist */
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#define GV3_OK_TM1 0x0040 /* TM1 exist */
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#define GV3_OK_AC 0x0080 /* power source is AC */
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#define GV3_OK_BATT 0x0100 /* power source is Battery */
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/* User Thermal Monitor Mode Configuration */
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#define GV3_MAX_PERF 0x1 /* max performance */
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#define GV3_OPT_BATT 0x2 /* battery optimized performance */
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#define GV3_MAX_BATT 0x3 /* max battery */
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#define GV3_AUTO 0x4 /* automatic */
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#define GV3_DEFAULT 0x5 /* default */
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/* GV3 Thermal Monitor Mode Used */
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#define GV3_TM_1 0x1 /* Thermal Monitor 1 */
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#define GV3_TM_2 0x2 /* Thermal Monitor 2 */
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/* GV3 State Transition parameters default value */
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#define GV3_UP_UTIL 95 /* def utilization(%) to go 1 up */
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#define GV3_DOWN_UTIL 95 /* def utilization(%) to go 1 down */
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#define GV3_UP_TIME 300 /* def time(millisec) to go 1 up */
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#define GV3_DOWN_TIME 1000 /* def time(millisec) to go 1 down */
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/* Thermal Throttle parameters default value */
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#define GV3_DUTY_CYCLE 0x8 /* throttle duty cycle : 50.0% */
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#define GV3_BUS_RATIO 0x8 /* throttle bus ratio : 800Mhz */
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/* Geyserville III specific MSRs */
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#define MSR_EBL_CR_POWERON 0x002a /* Power On Configuration */
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#define MSR_BBL_CR_CTL 0x0119 /* Control Register */
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#define MSR_BBL_CR_CTL3 0x011e /* Control Register 3 */
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#define MSR_CLOCK_FLEX_MAX 0x0194 /* Flexible Bus Ratio/VID Control */
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#define MSR_PERF_STS 0x0198 /* Performance (Geyserville) Status */
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#define MSR_PERF_CTL 0x0199 /* Performance (Geyserville) Control */
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#define MSR_GV_THERM 0x019d /* Geyserville Thermal Control */
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#define MSR_GV1P_REG_PTR 0x019e /* Geyserville 1+ Pointer */
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/* MSR_EBL_CR_POWERON bit difinition */
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#define EBL_RATIO 0x07c00000 /* RO Core Clock to System Bus Ratio */
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#define EBL_AGENT_ID 0x00300000 /* RO Agent ID */
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#define EBL_BUS_FREQ 0x00040000 /* RO System Bus Frequency */
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#define EBL_APIC_ID 0x00030000 /* RO APIC Cluster ID */
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#define EBL_PO_RESET 0x00004000 /* RO 1M Power On Reset */
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#define EBL_IOQ_DEP 0x00002000 /* RO In Order Queue Depth */
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#define EBL_BINI_OBS_EN 0x00001000 /* RO BINIT# Observation Enabled */
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#define EBL_AERR_OBS_EN 0x00000400 /* RO AERR# Observation Enabled */
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#define EBL_BIST 0x00000200 /* RO Execute BIST */
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#define EBL_TRI_STATE 0x00000100 /* RO Output Tri-state Enable */
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#define EBL_BINI_EN 0x00000080 /* RW BINIT# Enable */
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#define EBL_BERR_IE_EN 0x00000040 /* RW BERR# Enable, Internal Err */
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#define EBL_QUICK 0x00000020 /* RO Quickstart Mode */
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#define EBL_BERR_BR_EN 0x00000010 /* RW BERR# Enable, Bus Request */
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#define EBL_AERR_EN 0x00000008 /* RW AERR# Enable */
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#define EBL_RESP_CHK_EN 0x00000004 /* RW Response Error Check Enable */
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#define EBL_DATA_CHK_EN 0x00000002 /* RW Data Error Check Enable */
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/* MSR_BBL_CR_CTL3 bit difinition */
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#define BBL_L2_NOT 0x00800000 /* RO L2 Not Present */
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#define BBL_L2_RANGE 0x00700000 /* RO L2 Physical Address Range */
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#define BBL_L2_EN 0x00000100 /* RW L2 Enabled */
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#define BBL_L2_ECC_EN 0x00000020 /* RO L2 ECC Check Enabled */
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#define BBL_L2_HARD_EN 0x00000001 /* RO L2 Hardware Enabled */
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/* MSR_CLOCK_FLEX_MAX bit difinition */
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#define FLEX_EN 0x00010000 /* RW Flex Enable */
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#define FLEX_RATIO 0x00001f00 /* RW Flex Ratio */
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#define FLEX_VID 0x0000003f /* RW Flex VID */
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/* MSR_GV1P_REG_PTR bit difinition */
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#define GV1P_REG_PTR 0x0000ffff /* RW GV1P pointer register */
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/* MSR_PERF_CTL bit difinition */
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#define BUS_RATIO_SEL 0x00001f00 /* RW Bus Ratio Selection */
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#define GV_VID_SEL 0x0000003f /* RW VID Selection */
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/* MSR_PERF_STS bit difinition (upper 32) */
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#define BUS_RATIO_BOOT 0x1f000000 /* RO Boot Bus Ratio */
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#define GV_VID_BOOT 0x003f0000 /* RO Boot VID */
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#define BUS_RATIO_MAX 0x00001f00 /* RO Max Bus Ratio */
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#define GV_VID_MAX 0x0000003f /* RO Max VID */
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/* MSR_PERF_STS bit difinition (lower 32) */
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#define BUS_RATIO_MIN 0x1f000000 /* RO Min Bus Ratio */
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#define GV_TS 0x00200000 /* RO GV3 Transition Started */
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#define GV_CMD_SEEK 0x00100000 /* RO GV3 Transition Performing */
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#define GV_THERM_THROT 0x00080000 /* RO GV3 Thermal Throttle */
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#define GV_TT 0x00040000 /* RO Thermal Trip Active */
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#define GV_VIP 0x00020000 /* RO Voltage Transition Pending */
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#define GV_FIP 0x00010000 /* RO Frequency Change Pending */
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#define BUS_RATIO_STS 0x00001f00 /* RO Current Bus Ratio */
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#define GV_VID_STS 0x0000003f /* RO Current VID */
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/* MSR_GV_THERM bit difinition */
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#define GV_THROT_SEL 0x00010000 /* RW Thermal Management Mode */
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#define BUS_RATIO_THROT 0x00001f00 /* RW Throttling Bus Ratio */
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#define GV_VID_THROT 0x0000003f /* RW Throttling VID */
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#ifndef _ASMLANGUAGE
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/* frequency - VID table : state entry */
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typedef struct freqVidState {
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UINT16 no; /* state no. */
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UINT16 vid; /* VID_SEL value in MSR_PERF_CTL */
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UINT16 ratio; /* BUS_RATIO_SEL value in MSR_PERF_CTL */
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UINT16 power; /* power(mW) consumed by CPU in this state */
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} FREQ_VID_STATE;
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/* frequency - VID table : header */
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typedef struct freqVidHeader {
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UINT32 cpuId; /* CPU family-model-stepping value */
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UINT8 maxVid; /* VID_MAX value in MSR_PERF_STS */
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UINT8 maxRatio; /* BUS_RATIO_MAX value in MSR_PERF_STS */
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UINT8 nState; /* no of states supported by this CPU */
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FREQ_VID_STATE * pState;
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} FREQ_VID_HEADER;
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/* Thermal Monitor interrupt routines and arguments */
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typedef struct sysTherm {
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FUNCPTR hotRoutine; /* rtn to call on TM Hot int */
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INT32 hotArg; /* its argument */
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BOOL hotConnected;
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FUNCPTR coldRoutine; /* rtn to call on TM Cold int */
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INT32 coldArg; /* its argument */
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BOOL coldConnected;
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} SYS_THERM;
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/* function declarations */
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#if defined(__STDC__) || defined(__cplusplus)
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extern STATUS gv3LibInit (UINT32 mode, UINT32 upUtil, UINT32 downUtil,
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UINT32 upTime, UINT32 downTime,
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FUNCPTR acCheckRtn);
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extern STATUS gv3StateSet (UINT32 state);
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extern STATUS gv3DutyCycleSet (UINT32 dutyCycleIx);
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extern STATUS gv3DutyCycleEnable (BOOL enable);
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extern BOOL gv3DutyCycleCheck (void);
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extern BOOL gv3HotCheck (void);
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extern BOOL gv3AcCheck (void);
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extern STATUS gv3AutoEnable (BOOL enable);
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extern STATUS gv3AutoSet (UINT32 upUtil, UINT32 downUtil,
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UINT32 upTime, UINT32 downTime);
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extern STATUS gv3AutoGet (UINT32 * pUpUtil, UINT32 * pDownUtil,
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UINT32 * pUpTime, UINT32 * pDownTime);
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extern VOID gv3ShowInit (void);
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extern VOID gv3Show (void);
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#else /* __STDC__ */
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extern STATUS gv3LibInit ();
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extern STATUS gv3StateSet ();
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extern STATUS gv3DutyCycleSet ();
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extern STATUS gv3DutyCycleEnable ();
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extern BOOL gv3DutyCycleCheck ();
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extern BOOL gv3HotCheck ();
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extern BOOL gv3AcCheck ();
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extern STATUS gv3AutoEnable ();
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extern STATUS gv3AutoSet ();
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extern STATUS gv3AutoGet ();
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extern VOID gv3ShowInit ();
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extern VOID gv3Show ();
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#endif /* __STDC__ */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCregsGv3h */
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