108 lines
2.7 KiB
C
108 lines
2.7 KiB
C
/* regsArm.h - ARM registers */
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/*
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* Copyright (c) 1996, 1998, 2003, 2004, 2007, 2012 Wind River Systems, Inc.
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*
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* The right to copy, distribute or otherwise make use of this software
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* may be licensed only pursuant to the terms of an applicable Wind River
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* license agreement.
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*/
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/*
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modification history
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--------------------
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01i,09may12,j_b enable ARMARCH7M-specific header usage
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01h,03may12,j_b revert to remove ARMARCH7M-specific header usage
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01g,01may12,j_b Update for ARMv7M
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01f,18jun07,m_h Adding definition for WIND_CPU_STATE
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01e,25aug04,scm add lrReg alternative name
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01d,18mar04,scm add usr mode rtp support...
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01c,07may03,pes PAL conditional compilation cleanup.
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01b,15apr98,kkk added reg_pc, reg_sp, and reg_fp.
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01a,08may96,cdp written, based on I86 version
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*/
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#ifndef __INCregsArmh
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#define __INCregsArmh
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#if (CPU == ARMARCH7M)
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#include "arch/arm/arm-m/regsArm-m.h"
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#else /* (CPU == ARMARCH7M) */
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define GREG_NUM 15 /* has 15 32-bit general registers */
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#ifndef _ASMLANGUAGE
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/* REG_SET - ARM Register set
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* Note that the exception stack frame relies on the order of items
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* in this so don't change this without changing the ESF and the stub
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* in excALib which creates it.
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*/
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typedef struct /* REG_SET - ARM register set */
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{
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ULONG r[GREG_NUM]; /* general purpose registers 0-14 */
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INSTR *pc; /* program counter */
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ULONG cpsr; /* current PSR */
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ULONG ttbase; /* Trans Table Base */
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} REG_SET;
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typedef struct wind_cpu_state
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{
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REG_SET regs;
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} WIND_CPU_STATE;
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#define fpReg r[11] /* frame pointer */
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#define spReg r[13] /* stack pointer */
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#define lrReg r[14] /* link reg pointer */
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#define reg_pc pc /* program counter */
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#define reg_lr lrReg /* link reg pointer */
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#define reg_sp spReg /* stack pointer */
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#define reg_fp fpReg /* frame pointer */
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#endif /* _ASMLANGUAGE */
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#define ARM_REG_SIZE 4
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#define REG_SET_G_REG_BASE 0x00 /* data reg's base offset to REG_SET */
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#define REG_SET_G_REG_OFFSET(n) (REG_SET_G_REG_BASE + (n)*ARM_REG_SIZE)
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#define REG_SET_PC_OFFSET (REG_SET_G_REG_OFFSET(GREG_NUM))
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#define REG_SET_CPSR_OFFSET (REG_SET_PC_OFFSET + ARM_REG_SIZE)
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#define REG_SET_TTBASE_OFFSET (REG_SET_CPSR_OFFSET + ARM_REG_SIZE)
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#define PC_OFFSET REG_SET_PC_OFFSET
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/* PAL additions */
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/* moved here from h/private/taskLibP.h */
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#define WIND_TCB_R0 WIND_TCB_REGS
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#define WIND_TCB_R1 (WIND_TCB_R0+4*1)
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#define WIND_TCB_R4 (WIND_TCB_R0+4*4)
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#define WIND_TCB_R5 (WIND_TCB_R0+4*5)
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#define WIND_TCB_SP (WIND_TCB_R0+4*13)
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#define WIND_TCB_PC (WIND_TCB_R0+4*15)
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#define WIND_TCB_CPSR (WIND_TCB_PC+4)
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#define WIND_TCB_TTBASE (WIND_TCB_CPSR+4)
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/* End PAL */
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#ifdef __cplusplus
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}
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#endif
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#endif /* (CPU == ARMARCH7M) */
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#endif /* __INCregsArmh */
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