118 lines
4.2 KiB
C
118 lines
4.2 KiB
C
/* mmuArm1136jfLib.h - ARM 1136JF MMU library header file */
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/*
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* Copyright (c) 2004, 2010-2011 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01d,20dec11,jdw Add missing APIs to clear up warnings related to ttbr APIs
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01c,29apr10,pad Moved extern C statement after include statements.
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01b,09feb10,j_b update mmuArm1136jfTtbrSet for ASID support
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01a,07dec04,jb created
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*/
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#ifndef __INCmmuArm1136jfLibh
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#define __INCmmuArm1136jfLibh
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#include "memLib.h"
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#define MMU_ID_ARM1136JF 0x07B360
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#include "mmuArmArch6PalLib.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* 1136JF Specific definitions follow */
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/*
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* Values to be used when mmuEnable() is called. This will be after the MMU has
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* been initialised by sysInit()/romInit() and after cacheLib has set whatever
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* cache enable settings have been chosen.
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*
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* M 1 Enable MMU
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* A 0 Disable address alignment fault
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* C X ((D-)Cache Enable) Controlled by cacheLib
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* W X (Write Buffer) Controlled by cacheLib
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* P 1 (PROG32) should be set before this
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* D 1 (DATA32) should be set before this
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* L 1 (Late abort on earlier CPUs) ignore
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* B X (Big/Little-endian) should be set before this
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* S 1 (System)
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* R 0 (ROM)
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* F 0 Should be Zero
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* Z X (Branch prediction enable on 810) Controlled by cacheLib
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* I X (I-cache enable) Controlled by cacheLib
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*
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* For time being, do not enable the address alignment fault, as GCC
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* currently generates unaligned accesses in its code, and switching this
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* on will cause immediate faults. So, do not put it into the enable
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* mask.
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*
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* We used to clear all the Reserved/Should Be Zero bits when the
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* MMU/MPU was enabled, by including one bits for them in the definition
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* of MMU_ENABLE_MASK. We no longer do this, as CPU designers may extend
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* the definitions of the bits within the MMU Control Register. The MMU
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* Control register is initialised within romInit()/sysInit(), as the BSP
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* is the only place where the particular details of the CPU/MMU are
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* actually known. In general, it will be appropriate for the BSP to
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* initialise the MMUCR Reserved/Should Be Zero bits to zero. When the
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* MMU is enabled, we will only change the bits we are particularly
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* concerned about, by using a Read-Modify-Write strategy.
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*/
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/* This defines the operating mode MMUCR_ROM, MMUCR_SYSTEM, or neither */
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#define MMUCR_MODE 0 /* This is specific to ARMARCH6 */
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#define MMU_ENABLE_MASK (MMUCR_M_ENABLE | MMUCR_EXTENDED_PAGE)
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#define MMU_ENABLE_VALUE (MMUCR_M_ENABLE | MMUCR_MODE | MMUCR_EXTENDED_PAGE)
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#define MMU_MUST_SET_VALUE ( MMUCR_PROG32 | MMUCR_DATA32 | MMUCR_L_ENABLE | \
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MMUCR_W_ENABLE )
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#if (_BYTE_ORDER == _LITTLE_ENDIAN)
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#define MMU_INIT_VALUE ( MMU_MUST_SET_VALUE | MMUCR_MODE)
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#else
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#define MMU_INIT_VALUE ( MMU_MUST_SET_VALUE | MMUCR_BIGEND | MMUCR_MODE)
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#endif
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#ifndef _ASMLANGUAGE
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IMPORT void mmuArm1136jfLibInstall (VIRT_ADDR(physToVirt) (PHYS_ADDR),
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PHYS_ADDR(virtToPhys) (VIRT_ADDR));
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IMPORT void mmuArm1136jfTtbrSet (MMU_LEVEL_1_DESC *pTable, UINT32 asid);
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IMPORT MMU_LEVEL_1_DESC * mmuArm1136jfTtbrGet (void);
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IMPORT void mmuArm1136jfTtbrSetAll (UINT32 ttbr, UINT32 asid);
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IMPORT UINT32 mmuArm1136jfTtbrGetAll (void);
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IMPORT void mmuArm1136jfDacrSet (UINT32 dacrVal);
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IMPORT void mmuArm1136jfTLBIDFlushEntry (VIRT_ADDR *addr);
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IMPORT void mmuArm1136jfTLBIDFlushAll (void);
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IMPORT void mmuArm1136jfAEnable (UINT32 cacheState);
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IMPORT void mmuArm1136jfADisable (void);
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IMPORT STATUS mmuArm1136jfPBitSet (VIRT_ADDR virtAddr, UINT32 size);
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IMPORT STATUS mmuArm1136jfPBitClear (VIRT_ADDR virtAddr, UINT32 size);
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IMPORT STATUS mmuArm1136jfPBitGet (VIRT_ADDR virtAddr );
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IMPORT STATUS mmuArm1136jfAcrGet (void );
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IMPORT void mmuArm1136jfAcrSet (UINT32 acrVal);
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IMPORT STATUS mmuArm1136jfITcmrGet (void );
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IMPORT void mmuArm1136jfITcmrSet (UINT32 acrVal);
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IMPORT STATUS mmuArm1136jfDTcmrGet (void );
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IMPORT void mmuArm1136jfDTcmrSet (UINT32 acrVal);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCmmuArm1136jfLibh */
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