128 lines
3.3 KiB
C
128 lines
3.3 KiB
C
/* dsmArmLib.h - ARM disassembler header file */
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/*
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* Copyright (c) 1996-2005, 2010 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use of this software
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* may be licensed only pursuant to the terms of an applicable Wind River
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* license agreement.
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*/
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/*
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modification history
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--------------------
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01c,19oct10,jmp Updated INSTR_IS() macro to use VXDBG_INSTR_CMP()
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(CQ:WIND00185617).
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01b,29apr10,pad Moved extern C statement after include statements.
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01a,14jan05,rec add print function to dsmInst
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01c,09oct97.jpd added more Thumb instructions.
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01b,09sep97,cdp added more instructions.
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01a,09may96,cdp created.
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*/
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#ifndef __INCdsmArmLibh
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#define __INCdsmArmLibh
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#include <vwModNum.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* dsmLib status codes */
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#define S_dsmLib_UNKNOWN_INSTRUCTION (M_dsmLib | 1)
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/*
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* Macro and definitions for simple decoding of instuctions.
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* To check an instruction, it is ANDed with the IMASK_ and
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* the result is compared with the IOP_. The macro INSTR_IS
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* does this and returns !0 to indicate a match.
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*/
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#define INSTR_IS(pInstr,o) VXDBG_INSTR_CMP(pInstr,(IOP_##o),(IMASK_##o))
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#define IMASK_BL 0x0F000000 /* BL xxx */
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#define IOP_BL 0x0B000000
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#define IMASK_STMDB_SPP_FP_IP_LR_PC 0xFFFFF800 /* STMDB sp!,{..fp,ip,lr,pc} */
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#define IOP_STMDB_SPP_FP_IP_LR_PC 0xE92DD800
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#define IMASK_SUB_FP_IP_4 0xFFFFFFFF /* SUB fp,ip,#4 */
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#define IOP_SUB_FP_IP_4 0xE24CB004
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#define IMASK_SUB_FP_IP_4PLUS 0xFFFFF000 /* SUB fp,ip,#4+ */
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#define IOP_SUB_FP_IP_4PLUS 0xE24CB000
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#define IMASK_MOV_IP_SP 0xFFFFFFFF /* MOV ip,sp */
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#define IOP_MOV_IP_SP 0xE1A0C00D
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#define IMASK_MOVXX_LR_PC 0x0FFFFFFF /* MOVxx lr,pc */
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#define IOP_MOVXX_LR_PC 0x01A0E00F
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#define IMASK_STMDB_SPP_AREGS 0xFFFFFFF0 /* STMDB sp!,{a1-a4} */
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#define IOP_STMDB_SPP_AREGS 0xE92D0000
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#define IMASK_SUB_SP_SP 0xFFFFF000 /* SUB sp,sp,#n */
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#define IOP_SUB_SP_SP 0xE24DD000
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#define IMASK_MOVS_PC_LR 0xFFFFFFFF /* MOVS pc,lr */
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#define IOP_MOVS_PC_LR 0xE1B0F00E
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/* Thumb instructions */
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#define IMASK_T_BL0 0xF800 /* BL prefix */
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#define IOP_T_BL0 0xF000
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#define IMASK_T_BL1 0xF800 /* BL */
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#define IOP_T_BL1 0xF800
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#define IMASK_T_MOV_LR_PC 0xFFFF /* MOV lr,pc */
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#define IOP_T_MOV_LR_PC 0x46FE
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#define IMASK_T_SUB_SP_16 0xFFFF /* SUB sp,#16 */
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#define IOP_T_SUB_SP_16 0xB084
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#define IMASK_T_MOV_FP_LO 0xFFC7 /* MOV fp,loreg */
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#define IOP_T_MOV_FP_LO 0x4683
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#define IMASK_T_MOV_SP_LO 0xFFC7 /* MOV sp,loreg */
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#define IOP_T_MOV_SP_LO 0x4685
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#define IMASK_T_ADD_LO_SP 0xF800 /* ADD loreg, sp, #Imm */
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#define IOP_T_ADD_LO_SP 0xA800
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#define IMASK_T_POP_LO 0xFF00 /* POP {reglist} (not PC) */
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#define IOP_T_POP_LO 0xBC00
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#define IMASK_T_PUSH_LO 0xFF00 /* PUSH {reglist} (not LR) */
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#define IOP_T_PUSH_LO 0xB400
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#define IMASK_T_PUSH 0xFF00 /* PUSH {reglist} (inc LR) */
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#define IOP_T_PUSH 0xB500
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#define IMASK_T_BX_LO 0xFFC0 /* BX loreg */
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#define IOP_T_BX_LO 0x4700
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#define IMASK_T_MOV_LO_PC 0xFFF8 /* MOV loreg,pc */
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#define IOP_T_MOV_LO_PC 0x4678
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#define IMASK_T_MOV_LO_FP 0xFFF8 /* MOV loreg,fp */
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#define IOP_T_MOV_LO_FP 0x4658
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IMPORT int dsmNbytes(FAST INSTR *binInst);
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IMPORT int dsmInst(FAST INSTR *binInst, int address, VOIDFUNCPTR prtAddress,
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FUNCPTR oFn, int oArg);
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#ifndef _ASMLANGUAGE
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCdsmArmLibh */
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