140 lines
4.4 KiB
C
140 lines
4.4 KiB
C
/* vxbOmap35xxTimer.h - vxbus OMAP35xx timer interfaces header file */
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/*
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* Copyright (c) 2008-2011, 2015 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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14jan15,swu added support for AM437x. (US51994)
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01d,13jul11,clx add dm81xx timer support
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01c,07oct10,rec add tickless-idle support functions
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01b,02mar09,m_h Cleanup
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01a,08jul08,m_h written.
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*/
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/*
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DESCRIPTION
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This file provides the OMAP timers specific definitions.
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*/
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#ifndef __INCvxbOmap35xxTimerh
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#define __INCvxbOmap35xxTimerh
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#include <vxBusLib.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Maximum number of timers */
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#define OMAP35XX_MAX_TIMERS 12
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/*
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* These base addresses are used for purposes of identifying which timer is
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* being used
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*/
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#define OMAP35XX_BASE_ADDR_GPTIMER1 0x48318000
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#define OMAP35XX_BASE_ADDR_GPTIMER2 0x49032000
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#define OMAP35XX_BASE_ADDR_GPTIMER3 0x49034000
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#define OMAP35XX_BASE_ADDR_GPTIMER4 0x49036000
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#define OMAP35XX_BASE_ADDR_GPTIMER5 0x49038000
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#define OMAP35XX_BASE_ADDR_GPTIMER6 0x4903A000
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#define OMAP35XX_BASE_ADDR_GPTIMER7 0x4903C000
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#define OMAP35XX_BASE_ADDR_GPTIMER8 0x4903E000
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#define OMAP35XX_BASE_ADDR_GPTIMER9 0x49040000
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#define OMAP35XX_BASE_ADDR_GPTIMER10 0x48086000
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#define OMAP35XX_BASE_ADDR_GPTIMER11 0x48088000
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#define OMAP35XX_BASE_ADDR_GPTIMER12 0x48304000
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#define OMAP35XX_BASE_ADDR_CM_CLKOUT_CTRL 0x48004D70
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/* GP Timer offsets */
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#define OMAP35XX_TIMER_TIOCP_CFG_OFFSET 0x010
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#define OMAP35XX_TIMER_TISTAT_OFFSET 0x014
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#define OMAP35XX_TIMER_TISR_OFFSET 0x018
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#define OMAP35XX_TIMER_TIER_OFFSET 0x01C
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#define OMAP35XX_TIMER_TWER_OFFSET 0x020
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#define OMAP35XX_TIMER_TCLR_OFFSET 0x024
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#define OMAP35XX_TIMER_TCRR_OFFSET 0x028
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#define OMAP35XX_TIMER_TLDR_OFFSET 0x02C
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#define OMAP35XX_TIMER_TTGR_OFFSET 0x030
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#define OMAP35XX_TIMER_TWPS_OFFSET 0x034
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#define OMAP35XX_TIMER_TMAR_OFFSET 0x038
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#define OMAP35XX_TIMER_TCAR1_OFFSET 0x03C
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#define OMAP35XX_TIMER_TSICR_OFFSET 0x040
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#define OMAP35XX_TIMER_TCAR2_OFFSET 0x044
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#define OMAP35XX_TIMER_TPIR_OFFSET 0x048
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#define OMAP35XX_TIMER_TNIR_OFFSET 0x04C
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#define OMAP35XX_TIMER_TCVR_OFFSET 0x050
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#define OMAP35XX_TIMER_TOCR_OFFSET 0x054
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#define OMAP35XX_TIMER_TOWR_OFFSET 0x058
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/* DM81xx GP Timer offsets */
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#define DM81XX_TIMER_IRQSTATUS_OFFSET 0x028
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#define DM81XX_TIMER_IRQSTATUS_SET_OFFSET 0x02C
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#define DM81XX_TIMER_IRQWAKEEN_OFFSET 0x034
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#define DM81XX_TIMER_TIOCP_CFG_OFFSET 0x010
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#define DM81XX_TIMER_TCLR_OFFSET 0x038
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#define DM81XX_TIMER_TCRR_OFFSET 0x03C
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#define DM81XX_TIMER_TLDR_OFFSET 0x040
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#define DM81XX_TIMER_TTGR_OFFSET 0x044
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#define DM81XX_TIMER_TWPS_OFFSET 0x048
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#define DM81XX_TIMER_TMAR_OFFSET 0x04C
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#define DM81XX_TIMER_TCAR1_OFFSET 0x050
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#define DM81XX_TIMER_TSICR_OFFSET 0x054
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#define DM81XX_TIMER_TCAR2_OFFSET 0x058
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#define TIMER_W_PEND_TCLR 0x1
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#define TIMER_W_PEND_TCRR 0x2
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#define TIMER_W_PEND_TLDR 0x4
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#define TIMER_W_PEND_TTGR 0x8
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#define TIMER_W_PEND_TMAR 0x10
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#define TIMER_W_PEND_TPIR 0x20
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#define TIMER_W_PEND_TNIR 0x40
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#define TIMER_W_PEND_TCVR 0x80
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#define TIMER_W_PEND_TOCR 0x100
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#define TIMER_W_PEND_TOWR 0x200
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#define TIMER_POSTED 0x4
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#define OMAP35XX_TIMER_ID_OFFSET (0x0)
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/* AM437x Timer ID */
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#define AM437X_DMTIMER_ID (0x4FFF0301)
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#define AM437X_DMTIMER_1MS_ID (0x15)
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/* AM335x Timer ID */
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#define AM335X_DMTIMER_ID (0x40001000)
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#define AM335X_DMTIMER_1MS_ID (0x15)
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/* AM389x Timer ID */
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#define AM389X_DMTIMER_ID (0x4FFF1301)
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/* prototypes */
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#ifndef _ASMLANGUAGE
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IMPORT void omap35xxOneShotEnable (VXB_DEVICE_ID pInst, UINT32 nTicks);
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IMPORT UINT32 omap35xxOneShotDisable (VXB_DEVICE_ID pInst);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCvxbOmap35xxTimerh */
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