123 lines
3.6 KiB
C
123 lines
3.6 KiB
C
/* windArchLibP.h - private WIND header file for i86 */
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/*
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* Copyright (c) 2018 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01a,18jul18,r_h created for kernel page table isolation support (F10571)
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*/
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#ifndef __INCwindArchLibPh
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#define __INCwindArchLibPh
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#include <vsbConfig.h>
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#include <private/adrSpaceLibP.h>
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#ifdef _ASMLANGUAGE
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#include <private/offsetMacrosP.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef _WRS_CONFIG_KPTI
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#ifdef _WRS_CONFIG_LP64
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#define _WRS_WIND_RTP_VARS_ALIGN 512
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#define _WRS_WIND_RTP_VARS_ALIGN_SHIFT 9
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#define RTP_TRAMPOLINE_STACK_SIZE 192
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#define TSS_MAX_COUNT 1
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#else
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#define _WRS_WIND_RTP_VARS_ALIGN 1024
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#define _WRS_WIND_RTP_VARS_ALIGN_SHIFT 10
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#define RTP_TRAMPOLINE_STACK_SIZE 96
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#define TSS_MAX_COUNT 2
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#endif
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#define GDT_MAX_COUNT 12
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/* RTP region for 32-bit supervisor mode access */
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#ifndef _WRS_CONFIG_LP64
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#ifndef _ASMLANGUAGE
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IMPORT char *trampolineBaseAddr;
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#endif /* _ASMLANGUAGE */
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#define KERNEL_RTP_SUP_RGN_BASE trampolineBaseAddr
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#define KERNEL_RTP_SUP_RGN_SIZE 0x00400000
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#endif
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#define RTP_SUP_RGN_CODE_ADDR (KERNEL_RTP_SUP_RGN_BASE + 0x000000)
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#define RTP_SUP_RGN_CODE_SIZE 0x2000
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#define RTP_SUP_RGN_DATA_ADDR (KERNEL_RTP_SUP_RGN_BASE + RTP_SUP_RGN_CODE_SIZE)
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#define RTP_SUP_RGN_DATA_SIZE (RTP_SUP_RGN_IDT_SIZE + RTP_SUP_RGN_VARS_SIZE)
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/* space for 256 IDT entries, each entry is 16 bytes (4k total) */
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#define RTP_SUP_RGN_IDT_ADDRESS (RTP_SUP_RGN_DATA_ADDR)
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#define RTP_SUP_RGN_IDT_SIZE ((HIGH_VEC + 1) * 16)
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/* 256 bytes for each CPU for WIND_RTP_VARS (up to 16k) */
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#define RTP_SUP_RGN_VARS_ADDR (RTP_SUP_RGN_DATA_ADDR + RTP_SUP_RGN_IDT_SIZE)
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#define RTP_SUP_RGN_VARS_SIZE (_WRS_WIND_RTP_VARS_ALIGN * VX_MAX_SMP_CPUS)
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#ifndef _ASMLANGUAGE
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/*
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* per-CPU arch specific data accessible using the user-mode page table.
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* For x86 the total size (including the arch-independent part) is 512
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* bytes(64-bit mode) or 1024 bytes(32-bit mode), see
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* _WRS_WIND_RTP_VARS_ALIGN / _WRS_WIND_VARS_ALIGN.
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*
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* Note: unlike the windVarsArch, this is used for UP as well.
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*/
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typedef struct windRtpVarsArch
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{
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TSS tss[TSS_MAX_COUNT]; /* 0x010 / 0x020: TSS */
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#ifndef _WRS_CONFIG_LP64
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ULONG tss_pad; /* ----- / : for future use */
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#endif
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ULONG cr3Offset; /* 0x22c / 0x088: offset to user mode CR3 */
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GDT gdt[GDT_MAX_COUNT]; /* 0x230 / 0x090: GDT */
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#ifdef _WRS_CONFIG_LP64
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ULONG reserved[2]; /* ----- / 0x0f0: for future use */
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#endif
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char trampolineStack[RTP_TRAMPOLINE_STACK_SIZE];
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/* 0x290 / 0x100: trampoline stack */
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} WIND_RTP_VARS_ARCH;
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#define _WRS_WIND_RTP_VARS_ARCH WIND_RTP_VARS_ARCH cpu_archVars
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#define _WRS_WIND_RTP_VARS_ARCH_ACCESS(ix, var) \
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_WRS_WIND_RTP_VARS_ACCESS (ix, archVars.var)
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#define RTP_SUP_RGN_GDT_ADDRESS(cpu) \
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(&_WRS_WIND_RTP_VARS_ARCH_ACCESS (cpu, gdt[0]))
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#define RTP_SUP_RGN_TSS_ADDRESS(cpu) \
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(&_WRS_WIND_RTP_VARS_ARCH_ACCESS (cpu, tss[0]))
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#ifndef _WRS_CONFIG_LP64
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#define RTP_SUP_RGN_OSMTSS_ADDRESS(cpu) \
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(&_WRS_WIND_RTP_VARS_ARCH_ACCESS (cpu, tss[1]))
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* _WRS_CONFIG_KPTI */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCwindArchLibPh */
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