130 lines
3.5 KiB
C
130 lines
3.5 KiB
C
/* regs.h - CPU registers */
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/* Copyright 1984-2003, 2009-2010 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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03i,29apr10,pad Moved extern C statement after include statements.
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03h,19jun09,mze replacing PAD64
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03g,20jan09,jb Adding 64-bit support
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03f,07may03,pes PAL conditional compilation cleanup. Phase 2.
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03e,17apr03,dbt Added SIMLINUX support.
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03d,22oct01,dee Merge from T2.1.0 ColdFire
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03c,01mar00,frf Add SH4 support for T2.
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03b,23apr97,hk added SH support.
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03b,15aug97,cym added SIMNT support.
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03b,28nov96,cdp added ARM support.
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03a,26may94,yao added PPC support.
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02i,12jul95,ism added simsolaris support
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02h,19mar95,dvs removed #ifdef TRON - tron no longer supported.
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02g,04feb94,cd added extra field to REG_INDEX for MIPS (probably safe
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for all architectures really)
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02f,09jun93,hdn added support for I80X86
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02e,02dec93,pme added Am29K support.
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02d,11aug93,gae vxsim hppa.
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02c,20jun93,gae vxsim.
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02b,22sep92,rrr added support for c++
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02a,04jul92,jcf cleaned up.
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01k,26may92,rrr the tree shuffle
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-changed includes to have absolute path from h/
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01j,20feb92,yao added REG_INDEX.
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01i,09jan92,jwt converted CPU==SPARC to CPU_FAMILY==SPARC.
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01h,04oct91,rrr passed through the ansification filter
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-fixed #else and #endif
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-changed copyright notice
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01g,02aug91,ajm added MIPS support
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01f,19jul91,gae renamed architecture specific include file to be xx<arch>.h.
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01e,29apr91,hdn added defines and macros for TRON architecture.
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01d,25oct90,shl fixed CPU_FAMILY logic so 68k and sparc won't clash when
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compiling for sparc.
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01c,05oct90,shl added copyright notice.
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made #endif ANSI style.
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01b,28sep90,del added include i960/regs.h for I960 CPU_FAMILY.
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01a,07aug89,gae written.
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*/
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#ifndef __INCregsh
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#define __INCregsh
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#if CPU_FAMILY==I960
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#include "arch/i960/regsI960.h"
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#endif /* CPU_FAMILY==I960 */
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#if CPU_FAMILY==MC680X0
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#include "arch/mc68k/regsMc68k.h"
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#endif /* CPU_FAMILY==MC680X0 */
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#if CPU_FAMILY==COLDFIRE
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#include "arch/coldfire/regsColdfire.h"
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#endif /* CPU_FAMILY==COLDFIRE */
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#if CPU_FAMILY==MIPS
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#include "arch/mips/regsMips.h"
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#endif /* CPU_FAMILY==MIPS */
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#if CPU_FAMILY==PPC
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#include "arch/ppc/regsPpc.h"
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#endif /* CPU_FAMILY==PPC */
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#if CPU_FAMILY==SPARC
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#include "arch/sparc/regsSparc.h"
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#endif /* CPU_FAMILY==SPARC */
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#if CPU_FAMILY==SIMSPARCSOLARIS
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#include "arch/simsolaris/regsSimsolaris.h"
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#endif /* CPU_FAMILY==SIMSPARCSOLARIS */
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#if CPU_FAMILY==SIMLINUX
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#include "arch/simlinux/regsSimlinux.h"
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#endif /* CPU_FAMILY==SIMLINUX */
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#if CPU_FAMILY==SIMNT
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#include "arch/simnt/regsSimnt.h"
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#endif /* CPU_FAMILY==SIMNT */
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#if CPU_FAMILY==I80X86
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#ifndef _WRS_CONFIG_LP64
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#include "arch/i86/regsI86.h"
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#else
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#include "arch/i86/x86_64/regsX86_64.h"
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#endif /* LP64 */
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#endif /* CPU_FAMILY==I80X86 */
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#if CPU_FAMILY==AM29XXX
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#include "arch/am29k/regsAm29k.h"
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#endif /* CPU_FAMILY==AM29XXX */
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#if CPU_FAMILY==SH
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#include "arch/sh/regsSh.h"
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#endif /* CPU_FAMILY==SH */
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#if CPU_FAMILY==ARM
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#include "arch/arm/regsArm.h"
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#endif /* CPU_FAMILY==ARM */
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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typedef struct regindex
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{
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char *regName; /* pointer to register name */
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int regOff; /* offset to entry in REG_SET */
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#if defined (_WRS_REG_INDEX_REGWIDTH)
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int regWidth; /* register width */
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#endif
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#if (CPU_FAMILY==COLDFIRE)
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int regWidth; /* register width */
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int regStandard; /* register is a "standard" register */
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#endif
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} REG_INDEX;
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCregsh */
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