185 lines
4.8 KiB
C
185 lines
4.8 KiB
C
/* usbTcdFslConfig.h - Defines silicon config options to FSL TCD */
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/*
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* Copyright (c) 2009, 2013 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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Modification history
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--------------------
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01b,09aug13,ljg Set USB_SBUSCFG to INCR8 for MPC5125 errata workaround
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(WIND00405093)
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01a,09sep09,w_x created for various BSP configurations (WIND00180575)
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*/
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/*
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DESCRIPTION
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Defines the configuration macros to the USB TCD (target controller driver)
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for the Freescale USB Dual-Role device.
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*/
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#ifndef __INCusbTcdFslConfigh
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#define __INCusbTcdFslConfigh
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* These will be overriden by BSP config.h configurations;
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* These options must be changed according to the silicon
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* configuration.
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*/
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/*
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* Set to TRUE if the Dual-Role USB controller
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* USB registers (such as USBCMD/USBSTS regsiters)
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* are in big endian.
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*
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* (e.g, some MPC5121E silicon versions should be TRUE)
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*/
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#ifndef FSL_USB_DR_DEVICE_BE_REG
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# define FSL_USB_DR_DEVICE_BE_REG FALSE
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#endif
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/*
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* Set to TRUE if the Dual-Role USB controller
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* data strcuctures (such as dQH/dTD structures)
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* are in big endian.
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*
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* (e.g, some MPC5121E silicon versions should be TRUE)
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*/
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#ifndef FSL_USB_DR_DEVICE_BE_DESC
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# define FSL_USB_DR_DEVICE_BE_DESC FALSE
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#endif
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/*
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* Set to TRUE if the Dual-Role USB controller
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* has system config registers (such as SNOOP registers)
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*
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* (e.g, MPC8313E silicon versions should be TRUE)
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*/
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#ifndef FSL_USB_DR_DEVICE_SYS_CONF
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# define FSL_USB_DR_DEVICE_SYS_CONF FALSE
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#endif
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/*
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* Set to TRUE if the Dual-Role USB controller
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* setup packet buffer is in big endian. Most silicons
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* use the native CPU endian for the setup packet buffer,
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* but some MPC5121E silicon versions use litte endian
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* for setup packet buffer even it is big endian CPU.
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*
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* (e.g, some MPC5121E silicon versions should be FALSE)
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*/
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#ifndef FSL_USB_DR_DEVICE_BE_SETUP
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# if (_BYTE_ORDER == _BIG_ENDIAN)
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# define FSL_USB_DR_DEVICE_BE_SETUP TRUE /* In BE system default to BE */
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# else
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# define FSL_USB_DR_DEVICE_BE_SETUP FALSE /* In LE system default to LE */
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# endif
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#endif
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/*
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* Set to TRUE if the Dual-Role USB controller
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* USBMODE register has a ES (Endian Selction) field.
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* If it has this field, it can be used to change the byte
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* alignment of the transfer buffers to match CPU endian mode.
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* If the CPU has this field, the TCD will set the field
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* according to the CPU endian it runs on to match them.
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*
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* (e.g, MPC5121E and i.MX31 silicon versions should be TRUE)
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*/
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#ifndef FSL_USB_DR_DEVICE_BUFFER_ES
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# define FSL_USB_DR_DEVICE_BUFFER_ES FALSE
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#endif
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/*
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* Each hardware platform may have different platform specific hardware
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* initialization procedures, such as PIN MUX and module CLK initilization.
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* Specify this macro with the FUNCPTR of the BSP specific USB device module
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* hardware initlization routine.
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*/
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#ifndef FSL_USB_DR_DEVICE_HW_INIT
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# define FSL_USB_DR_DEVICE_HW_INIT NULL
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#endif
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/*
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* Specify the register base address of the USB device module.
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*
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* The base address is the address that adding 0x100 will reach
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* the CAPLENGTH register, and adding 0x140 will reach the USBCMD
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* register.
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*
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* This is platform specific.
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*/
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#ifndef FSL_USB_DR_DEVICE_IO_BASE
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# error "Please define FSL_USB_DR_DEVICE_IO_BASE in BSP config.h"
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#endif
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/*
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* Specify the interrupt number of the USB device module.
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*
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* The interrupt number is the one through which a USB endpoint
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* interrupt can be reported.
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*
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* This is platform specific.
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*/
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#ifndef FSL_USB_DR_DEVICE_INT_NUM
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# error "Please define FSL_USB_DR_DEVICE_INT_NUM in BSP config.h"
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#endif
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/*
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* Specify the PHY mode of the USB device module.
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*
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* The PHY mode is specific to the silicon implementation and the board
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* hardware design. You may need to refer to both the silicon mannuals
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* for usable options for the port and the board schematic for the
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* hardware wiring (selection) of the actual used PHY.
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*
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* The avaiable FSL_USB_DR_DEVICE_PHY_MODE options are:
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*
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* #define FSL_USB_DR_PHY_ULPI 0x0001
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* #define FSL_USB_DR_PHY_UTMI8 0x0002
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* #define FSL_USB_DR_PHY_UTMI16 0x0003
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* #define FSL_USB_DR_PHY_SERIAL 0x0004
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*
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* Based on this FSL_USB_DR_DEVICE_PHY_MODE configuration, the TCD will write
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* proper values in the PORTSCn PTS and PTW fields.
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*
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* This is platform specific.
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*/
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#ifndef FSL_USB_DR_DEVICE_PHY_MODE
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# error "Please define FSL_USB_DR_DEVICE_PHY_MODE in BSP config.h"
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#endif
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/*
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* Specify the platform type of the USB device.
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*/
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#ifndef FSL_USB_DR_DEVICE_PLATFORM_TYPE
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# define FSL_USB_DR_DEVICE_PLATFORM_TYPE 0
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCusbTcdFslConfigh */
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