306 lines
13 KiB
C
306 lines
13 KiB
C
/* vxPpcLib.h - header for board dependent library routines for the PowerPC */
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/*
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* Copyright (c) 1996-1997, 2000-2004, 2006-2012 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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02j,03dec12,pcs Decouple macro PPC_e500mc for e6500 core.
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02i,03may11,syt add support for PPC465.
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02h,09oct10,x_z add support for PPC476.
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02g,26apr10,pmr add L1CSR2 funcs
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02f,10seo09,x_z add vxSvrGet()
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02e,20nov08,pmr remove vxHid1Get/Set for e500mc
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02d,04sep08,pmr e500mc hard float
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02c,13jun07,mmi import vxIctcSet() and vxIctcGet(), vxC1StateSet(), removed
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deprecated API, added copyright notice
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02b,02may07,dcc added declaration of vxSdaSet().
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02a,26oct06,to SMP: moved vxCpuIndexGet to vxCpuLib.h
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01z,24aug06,to SMP: added vxCpuIndexGet
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01y,09jun04,rec add 32-bit access routines for PPC970 HID registers
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01x,22apr04,to delete K&R prototypes.
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01w,18mar04,rec PPC970 merges
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01v,25mar04,dtr Add vxIvor1Set.
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01u,31mar03,dtr Adding vxHid1Set function.
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01t,12nov02,mil Updated support for PPC85XX.
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01s,02aug02,pcs Add support for PPC85XX and make it the same as PPC603 for
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the present.
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01r,28jan02,rcs added vxImmrIsbGet() and vxImmrDevGet()
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01q,24oct01,jtp Add support for 440 decrementer
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01p,22oct01,dtr Inclusion of vxKeyedDecReload function for some 860 bsps.
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SPR65678.
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01o,08oct01,mil added comments to various prototypes (SPR 9221).
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01n,15aug01,pch Add support for PPC_NO_REAL_MODE & PPC440
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01m,02may01,dat 65984, Portable C Code, added vxDecReload, vxHid1Get
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01l,25oct00,s_m renamed PPC405 cpu types
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01k,12jun00,alp Added PPC405 support
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01j,22mar00,tam added missing prototypes for PPC860
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01i,14jul97,mas prototypes for accessing DAR, DSISR, SRR0, SRR1 (SPR 8918).
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01h,31mar97,tam added prototypes for DMA register access routines.
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01g,10feb97,tam added prototypes for vxFpscrGet/Set()
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01f,29oct96,tam added prototypes for vxPowerDown() , vxPowerModeSet() and
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vxPowerModeGet(); added power management mode macros.
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01e,18jun96,tam added prototypes for PPC403 debug register access routines.
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01d,17jun96,tpr added vxDerGet(), vxDerSet(), vxImmrGet() and
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vxImmrSet() prototypes.
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01c,29may96,tam added prototypes for vxTimeBaseSet/Get (spr #6604).
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01b,28feb96,tam added some PPC403 declarations.
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01a,23feb96,tpr written.
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*/
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#ifndef __INCvxPpcLibh
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#define __INCvxPpcLibh
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* DMA channel definition for the vxDmaXXGet/Set() routines */
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#define DMA_CHANNEL_0 0
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#define DMA_CHANNEL_1 1
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#define DMA_CHANNEL_2 2
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#define DMA_CHANNEL_3 3
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/* function declarations */
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#ifndef _ASMLANGUAGE
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IMPORT void vxMsrSet (UINT32); /* machine status reg */
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IMPORT UINT32 vxMsrGet (void);
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IMPORT void vxSdaSet (void * pRegs);
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#if (CPU == PPC85XX)
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IMPORT UINT32 vxDearGet (void); /* data exc addr reg */
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IMPORT void vxDearSet (UINT32);
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IMPORT UINT32 vxCsrr0Get (void); /* save/restore reg 0 */
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IMPORT void vxCsrr0Set (UINT32);
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IMPORT UINT32 vxCsrr1Get (void); /* save/restore reg 1 */
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IMPORT void vxCsrr1Set (UINT32);
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IMPORT UINT32 vxMcsrr0Get (void); /* save/restore reg 0 */
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IMPORT void vxMcsrr0Set (UINT32);
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IMPORT UINT32 vxMcsrr1Get (void); /* save/restore reg 1 */
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IMPORT void vxMcsrr1Set (UINT32);
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#ifdef _WRS_SPE_SUPPORT
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IMPORT UINT32 vxSpefscrGet (void); /* FP status control reg */
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IMPORT void vxSpefscrSet (UINT32);
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#endif /* _WRS_SPE_SUPPORT */
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IMPORT void vxDecarSet (UINT32); /* dec auto reload reg */
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IMPORT UINT32 vxL1CSR0Get (void); /* L1 control status reg 0 */
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IMPORT void vxL1CSR0Set (UINT32);
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IMPORT UINT32 vxL1CSR1Get (void); /* L1 control status reg 1 */
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IMPORT void vxL1CSR1Set (UINT32);
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#ifdef L1CSR2
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IMPORT UINT32 vxL1CSR2Get (void); /* L1 control status reg 2 */
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IMPORT void vxL1CSR2Set (UINT32);
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#endif /* L1CSR2 */
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IMPORT UINT32 vxL1CFG0Get (void); /* L1 config reg 0 */
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IMPORT UINT32 vxL1CFG1Get (void); /* L1 config reg 1 */
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IMPORT void vxIvor1Set (UINT32); /* Set Mchk exception offset */
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#else /* CPU == PPC85XX */
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IMPORT void vxDarSet (UINT32); /* data addr reg */
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IMPORT UINT32 vxDarGet (void);
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IMPORT void vxDsisrSet (UINT32); /* DSI source reg */
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IMPORT UINT32 vxDsisrGet (void);
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#endif /* CPU == PPC85XX */
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IMPORT void vxSrr0Set (UINT32); /* save/restore reg 0 */
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IMPORT UINT32 vxSrr0Get (void);
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IMPORT void vxSrr1Set (UINT32); /* save/restore reg 1 */
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IMPORT UINT32 vxSrr1Get (void);
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IMPORT UINT32 vxFirstBit (UINT32); /* get 1st bit set using cntlzw */
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IMPORT UINT32 vxPvrGet (void); /* processor version reg */
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#if (CPU == PPC603) || (CPU == PPC604) || (CPU == PPC85XX)
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IMPORT UINT32 vxSvrGet (void); /* system version reg */
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#endif
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IMPORT UINT32 (*_func_vxSvrGet) (void);
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#define _PPC_VX_SVR_GET ((_func_vxSvrGet == NULL) ? 0 : (_func_vxSvrGet) ())
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IMPORT void vxDecSet (UINT32); /* decrementer reg */
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IMPORT UINT32 vxDecGet (void);
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IMPORT UINT32 vxDecReload (UINT32); /* reload with lantency skew adj */
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# if (CPU == PPC970)
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IMPORT void vxHid0Set (UINT64 *); /* hardware imp dependent reg 0 */
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IMPORT void vxHid1Set (UINT64 *); /* hardware imp dependent reg 1 */
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IMPORT void vxHid4Set (UINT64 *); /* hardware imp dependent reg 4 */
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IMPORT void vxHid5Set (UINT64 *); /* hardware imp dependent reg 5 */
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IMPORT void vxHid0Get (UINT64 *); /* hardware imp dependent reg 0 */
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IMPORT void vxHid1Get (UINT64 *); /* hardware imp dependent reg 1 */
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IMPORT void vxHid4Get (UINT64 *); /* hardware imp dependent reg 4 */
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IMPORT void vxHid5Get (UINT64 *); /* hardware imp dependent reg 5 */
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IMPORT UINT32 vxHid0LGet (void); /* hardware imp dependent reg 0 Low */
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IMPORT UINT32 vxHid1LGet (void); /* hardware imp dependent reg 1 Low */
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IMPORT UINT32 vxHid4LGet (void); /* hardware imp dependent reg 4 Low */
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IMPORT UINT32 vxHid5LGet (void); /* hardware imp dependent reg 5 Low */
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IMPORT UINT32 vxHid0HGet (void); /* hardware imp dependent reg 0 High */
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IMPORT UINT32 vxHid1HGet (void); /* hardware imp dependent reg 1 High */
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IMPORT UINT32 vxHid4HGet (void); /* hardware imp dependent reg 4 High */
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IMPORT UINT32 vxHid5HGet (void); /* hardware imp dependent reg 5 High */
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#else /* CPU == PPC970 */
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IMPORT void vxHid0Set (UINT32); /* hardware imp dependent reg 0 */
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IMPORT UINT32 vxHid0Get (void);
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# if (!defined(PPC_e500mc) && !defined(PPC_e6500))
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IMPORT void vxHid1Set (UINT32); /* hardware imp dependent reg 1 */
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IMPORT UINT32 vxHid1Get (void);
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# endif /* !PPC_e500mc && !PPCe6500 */
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# ifdef _PPC_745x
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IMPORT UINT32 vxIctcGet (void); /* Get Instruction cache throttling reg */
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IMPORT void vxIctcSet (UINT32); /* Set hardware cache throttling reg */
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# endif /* _PPC_745x */
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#endif /* CPU == PPC970 */
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# ifdef _WRS_ARCH_HAS_DPM
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IMPORT void vxDpmSet (BOOL setDpmBit);
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# endif /* _WRS_ARCH_HAS_DPM */
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IMPORT void vxC1StateSet (void);
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IMPORT void vxTimeBaseSet (UINT32 tbu, UINT32 tbl); /* time base up/lower */
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IMPORT void vxTimeBaseGet (UINT32 * pTbu, UINT32 * pTbl);
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IMPORT void vxFpscrSet (UINT32); /* FP status control reg */
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IMPORT UINT32 vxFpscrGet (void);
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#if ((CPU == PPC403) || (CPU == PPC405) || (CPU == PPC405F) || \
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(CPU == PPC440) || (CPU == PPC85XX) || (CPU == PPC476) || (CPU == PPC465))
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# if ((CPU == PPC440) || (CPU == PPC85XX) || (CPU == PPC476) || (CPU == PPC465))
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IMPORT void vxDecIntEnable (void);
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IMPORT void vxDecIntAck (void);
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#else /* CPU == PPC440, PPC85XX, PPC476 , PPC465 */
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IMPORT UINT32 vxExierEnable (UINT32); /* ext interrupt enable reg */
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IMPORT UINT32 vxExierDisable (UINT32);
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IMPORT void vxPitSet (UINT32); /* prog interval timer */
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IMPORT UINT32 vxPitGet (void);
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IMPORT void vxPitIntEnable (void); /* timer ctrl reg set PIT int en */
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IMPORT void vxPitIntAck (void); /* clear TSR PIT pending bit */
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# endif /* CPU == PPC440, PPC85XX, PPC476, PPC465 */
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IMPORT void vxFitIntEnable (void); /* timer ctrl reg set FIT int en */
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IMPORT void vxFitIntDisable (void);
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IMPORT void vxFitIntAck (void); /* clear TSR FIT pending bit */
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# if !((CPU == PPC440) || (CPU == PPC85XX) || (CPU == PPC476) || (CPU == PPC465))
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IMPORT UINT32 vxExisrGet (void); /* ext interrupt status reg */
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IMPORT void vxExisrClear (UINT32);
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IMPORT UINT32 vxExierGet (void); /* ext interrupt enable reg */
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IMPORT void vxExierSet (UINT32);
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# endif /* CPU != PPC440, PPC85XX, PPC476, PPC465 */
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# ifndef PPC_NO_REAL_MODE
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IMPORT UINT32 vxDccrGet (void); /* data cache ctrl reg */
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IMPORT void vxDccrSet (UINT32);
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IMPORT UINT32 vxIccrGet (void); /* instr cache ctrl reg */
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IMPORT void vxIccrSet (UINT32);
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# endif /* PPC_NO_REAL_MODE */
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# if ((CPU == PPC440) || (CPU == PPC85XX) || (CPU == PPC476) || (CPU == PPC465))
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IMPORT UINT32 vxIvprGet (void);
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IMPORT void vxIvprSet (UINT32);
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# else /* CPU == PPC440, PPC85XX, PPC476, PPC465 */
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IMPORT UINT32 vxEvprGet (void); /* exception prefix reg */
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IMPORT void vxEvprSet (UINT32);
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IMPORT UINT32 vxIocrGet (void); /* input/ouput config reg */
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IMPORT void vxIocrSet (UINT32);
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# endif /* CPU == PPC440, PPC85XX, PPC476, PPC465 */
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IMPORT UINT32 vxTcrGet (void); /* timer ctrl reg */
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IMPORT void vxTcrSet (UINT32);
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IMPORT UINT32 vxTsrGet (void); /* timer status reg */
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IMPORT void vxTsrSet (UINT32);
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# if ((CPU == PPC440) || (CPU == PPC85XX) || (CPU == PPC476) || (CPU == PPC465))
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IMPORT UINT32 vxDbcr0Get (void);
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IMPORT void vxDbcr0Set (UINT32);
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IMPORT UINT32 vxDbcr1Get (void);
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IMPORT void vxDbcr1Set (UINT32);
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IMPORT UINT32 vxDbcr2Get (void);
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IMPORT void vxDbcr2Set (UINT32);
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# if ((CPU == PPC440) || (CPU == PPC476) || (CPU == PPC465))
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IMPORT UINT32 vxDbdrGet (void);
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IMPORT void vxDbdrClear (UINT32);
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# endif /* CPU == PPC440, PPC476, PPC465 */
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# else /* CPU == PPC440, PPC85XX, PPC476, PPC465 */
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IMPORT void vxBesrSet (UINT32); /* bus error syndrome reg */
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IMPORT UINT32 vxDbcrGet (void); /* debug ctrl reg */
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IMPORT void vxDbcrSet (UINT32);
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# endif /* CPU == PPC440, PPC85XX, PPC476, PPC465 */
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IMPORT UINT32 vxDbsrGet (void); /* debug status reg */
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IMPORT void vxDbsrClear (UINT32);
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IMPORT UINT32 vxDac1Get (void); /* data addr cmp reg 1 */
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IMPORT void vxDac1Set (UINT32);
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IMPORT UINT32 vxDac2Get (void); /* data addr cmp reg 2 */
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IMPORT void vxDac2Set (UINT32);
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IMPORT UINT32 vxIac1Get (void); /* instr addr cmp reg 1 */
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IMPORT void vxIac1Set (UINT32);
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IMPORT UINT32 vxIac2Get (void); /* instr addr cmp reg 2 */
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IMPORT void vxIac2Set (UINT32);
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# if (CPU == PPC403)
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IMPORT void vxDmacrSet (UINT32 regVal, UINT32 dmaRegNo);
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IMPORT UINT32 vxDmacrGet (UINT32 dmaRegNo);
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IMPORT void vxDmasrSet (UINT32 regVal);
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IMPORT UINT32 vxDmasrGet (void);
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IMPORT void vxDmaccSet (UINT32 regVal, UINT32 dmaRegNo);
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IMPORT UINT32 vxDmaccGet (UINT32 dmaRegNo);
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IMPORT void vxDmactSet (UINT32 regVal, UINT32 dmaRegNo);
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IMPORT UINT32 vxDmactGet (UINT32 dmaRegNo);
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IMPORT void vxDmadaSet (UINT32 regVal, UINT32 dmaRegNo);
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IMPORT UINT32 vxDmadaGet (UINT32 dmaRegNo);
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IMPORT void vxDmasaSet (UINT32 regVal, UINT32 dmaRegNo);
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IMPORT UINT32 vxDmasaGet (UINT32 dmaRegNo);
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# elif (CPU != PPC85XX) /* i.e. non-403/non-85XX */
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IMPORT UINT32 vxIac3Get (void);
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IMPORT void vxIac3Set (UINT32);
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IMPORT UINT32 vxIac4Get (void);
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IMPORT void vxIac4Set (UINT32);
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# endif /* CPU == PPC403 : PPC85XX */
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#endif /* CPU == PPC4xx, PPC85XX */
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#if ((CPU == PPC603) || (CPU == PPC604))
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IMPORT UINT32 vxImmrDevGet (void); /* Get PART/MASK bits of IMMR */
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IMPORT UINT32 vxImmrIsbGet (void); /* Get ISB bits of IMMR */
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#endif /* (CPU == PPC603) || (CPU == PPC604) */
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#if (CPU == PPC860)
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IMPORT void vxImmrSet (UINT32); /* internal mem map reg */
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IMPORT UINT32 vxImmrGet (void);
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IMPORT UINT32 vxImmrDevGet (void); /* Get PART/MASK bits of IMMR */
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IMPORT UINT32 vxImmrIsbGet (void); /* Get ISB bits of IMMR */
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IMPORT void vxDerSet (UINT32); /* debug enable reg */
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IMPORT UINT32 vxDerGet (void);
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IMPORT UINT32 vxKeyedDecReload (UINT32); /* vxDecReload a locked DEC */
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IMPORT void vxMTwbSet (UINT32); /* MMU table walk base reg */
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IMPORT UINT32 vxMTwbGet (void);
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IMPORT void vxMdCtrSet (UINT32); /* data MMU ctrl reg */
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IMPORT UINT32 vxMdCtrGet (void);
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IMPORT void vxMiCtrSet (UINT32); /* instr MMU ctrl reg */
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IMPORT UINT32 vxMiCtrGet (void);
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IMPORT void vxIcCstSet (UINT32); /* instr cache ctrl status reg */
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IMPORT UINT32 vxIcCstGet (void);
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IMPORT void vxIcAdrSet (UINT32); /* instr cache addr reg */
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IMPORT UINT32 vxIcAdrGet (void);
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IMPORT UINT32 vxIcDatGet (void); /* instr cache data port */
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IMPORT void vxDcCstSet (UINT32); /* data cache ctrl status reg */
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IMPORT UINT32 vxDcCstGet (void);
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IMPORT void vxDcAdrSet (UINT32); /* data cache addr reg */
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IMPORT UINT32 vxDcAdrGet (void);
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#endif /* (CPU == PPC860) */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCvxPpcLibh */
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