72 lines
1.5 KiB
C
72 lines
1.5 KiB
C
/* cacheArm946eLib.h - ARM 946E cache library header file */
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/*
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* Copyright (c) 2000-2006 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01e,16jun06,m_h non-cacheAIM direct calls
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01d,22may06,m_h Palify
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01c,08feb05,rec use VIRT_ADDR and PHYS_ADDR instead of void
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01b,11dec03,scm flushing out aim...
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01a,20jul00,jpd created, based on cacheArm940tLib.h
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*/
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#ifndef __INCcacheArm946eLibh
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#define __INCcacheArm946eLibh
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Some cache designs (e.g. Harvard) have D-cache either fully or
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* partially not coherent with I-cache
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*/
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#define ARMCACHE_NOT_COHERENT TRUE
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/*
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* This is a writethrough cache
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*/
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#define ARMCACHE_HAS_WRITETHROUGH TRUE
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/*
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* Does not have a mini-cache
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*/
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#define ARMCACHE_HAS_MINICACHE FALSE
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/*
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* Do not need an Instruction Memory Barrier
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*/
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#define ARMCACHE_NEEDS_IMB FALSE
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#ifndef _ASMLANGUAGE
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IMPORT void cacheArm946eLibInstall (VIRT_ADDR(physToVirt) (PHYS_ADDR),
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PHYS_ADDR(virtToPhys) (VIRT_ADDR));
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/* definitions to allow for non-cacheAIM direct calls */
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#define cacheArm946eDClearDisable cacheAim946eDClearDisable
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IMPORT void cacheArm946eDClearDisable (void);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCcacheArm946eLibh */
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