111 lines
4.9 KiB
C
111 lines
4.9 KiB
C
/* sysM5200Sdma.h - Motorola MPC5200 Smartcomm DMA controller interface header */
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/* Copyright 1990-2005 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01b,27dec04,k_p cleanups
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01a,17Jul03,pkr written
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*/
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#ifndef __INCm5200Sdmah
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#define __INCm5200Sdmah
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/* includes */
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct sdma_register_set
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{
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volatile UINT32 taskBar; /* MBAR_SDMA + 0x00 sdTpb */
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volatile UINT32 currentPointer; /* MBAR_SDMA + 0x04 sdMdeComplex */
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volatile UINT32 endPointer; /* MBAR_SDMA + 0x08 sdMdeComplex */
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volatile UINT32 variablePointer; /* MBAR_SDMA + 0x0c sdMdeComplex */
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/* The following are Priority Task Decoder (ptd) UINTs in
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* sdma/rtl_v/sdPtd.v.
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*
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* The ptd UINTister map below is from the smartcomm spec, table 3-2,
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* page 3-54.
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*
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* The spec shows the ptd map as 20 words, but sdPtd.v has only
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* implemented 19
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*
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* The word commented out below is the one which is not implemented.
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*/
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volatile UINT8 IntVect1; /* MBAR_SDMA + 0x10 sdPtd */
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volatile UINT8 IntVect2; /* MBAR_SDMA + 0x11 sdPtd */
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volatile UINT16 PtdCntrl; /* MBAR_SDMA + 0x12 sdPtd */
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volatile UINT32 IntPend; /* MBAR_SDMA + 0x14 sdPtd */
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volatile UINT32 IntMask; /* MBAR_SDMA + 0x18 sdPtd */
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volatile UINT32 TCR01; /* MBAR_SDMA + 0x1c sdPtd */
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volatile UINT32 TCR23; /* MBAR_SDMA + 0x20 sdPtd */
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volatile UINT32 TCR45; /* MBAR_SDMA + 0x24 sdPtd */
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volatile UINT32 TCR67; /* MBAR_SDMA + 0x28 sdPtd */
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volatile UINT32 TCR89; /* MBAR_SDMA + 0x2c sdPtd */
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volatile UINT32 TCRAB; /* MBAR_SDMA + 0x30 sdPtd */
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volatile UINT32 TCRCD; /* MBAR_SDMA + 0x34 sdPtd */
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volatile UINT32 TCREF; /* MBAR_SDMA + 0x38 sdPtd */
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volatile UINT8 IPR[32]; /*MBAR_SDMA + 0x3c ..
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* MBAR_SDMA + 0x5b sdPtd
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*/
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volatile UINT32 res1; /* reserved */
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volatile UINT32 res2; /* reserved */
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volatile UINT32 res3; /* reserved */
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volatile UINT32 MDEDebug; /* MBAR_SDMA + 0x68 sdMdeComplex */
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volatile UINT32 ADSDebug; /* MBAR_SDMA + 0x6c sdAdsTop */
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volatile UINT32 Value1; /* MBAR_SDMA + 0x70 sdDbg */
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volatile UINT32 Value2; /* MBAR_SDMA + 0x74 sdDbg */
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volatile UINT32 Control; /* MBAR_SDMA + 0x78 sdDbg */
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volatile UINT32 Status; /* MBAR_SDMA + 0x7c sdDbg */
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volatile UINT32 EU00; /* MBAR_SDMA + 0x80 sdMac macer UINT */
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volatile UINT32 EU01; /* MBAR_SDMA + 0x84 sdMac macemr UINT */
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volatile UINT32 EU02; /* MBAR_SDMA + 0x88 unused */
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volatile UINT32 EU03; /* MBAR_SDMA + 0x8c unused */
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volatile UINT32 EU04; /* MBAR_SDMA + 0x90 unused */
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volatile UINT32 EU05; /* MBAR_SDMA + 0x94 unused */
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volatile UINT32 EU06; /* MBAR_SDMA + 0x98 unused */
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volatile UINT32 EU07; /* MBAR_SDMA + 0x9c unused */
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volatile UINT32 EU10; /* MBAR_SDMA + 0xa0 unused */
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volatile UINT32 EU11; /* MBAR_SDMA + 0xa4 unused */
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volatile UINT32 EU12; /* MBAR_SDMA + 0xa8 unused */
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volatile UINT32 EU13; /* MBAR_SDMA + 0xac unused */
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volatile UINT32 EU14; /* MBAR_SDMA + 0xb0 unused */
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volatile UINT32 EU15; /* MBAR_SDMA + 0xb4 unused */
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volatile UINT32 EU16; /* MBAR_SDMA + 0xb8 unused */
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volatile UINT32 EU17; /* MBAR_SDMA + 0xbc unused */
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volatile UINT32 EU20; /* MBAR_SDMA + 0xc0 unused */
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volatile UINT32 EU21; /* MBAR_SDMA + 0xc4 unused */
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volatile UINT32 EU22; /* MBAR_SDMA + 0xc8 unused */
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volatile UINT32 EU23; /* MBAR_SDMA + 0xcc unused */
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volatile UINT32 EU24; /* MBAR_SDMA + 0xd0 unused */
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volatile UINT32 EU25; /* MBAR_SDMA + 0xd4 unused */
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volatile UINT32 EU26; /* MBAR_SDMA + 0xd8 unused */
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volatile UINT32 EU27; /* MBAR_SDMA + 0xdc unused */
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volatile UINT32 EU30; /* MBAR_SDMA + 0xe0 unused */
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volatile UINT32 EU31; /* MBAR_SDMA + 0xe4 unused */
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volatile UINT32 EU32; /* MBAR_SDMA + 0xe8 unused */
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volatile UINT32 EU33; /* MBAR_SDMA + 0xec unused */
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volatile UINT32 EU34; /* MBAR_SDMA + 0xf0 unused */
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volatile UINT32 EU35; /* MBAR_SDMA + 0xf4 unused */
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volatile UINT32 EU36; /* MBAR_SDMA + 0xf8 unused */
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volatile UINT32 EU37; /* MBAR_SDMA + 0xfc unused */
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} sdma_regs;
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extern sdma_regs *sysSDMA;
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#define SDMA_PTDCNTRL_PE 1
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCm5200Sdmah */
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