87 lines
1.9 KiB
C
87 lines
1.9 KiB
C
/* hd146818.h - Hitachi 146818 RTC Real Time Clock header */
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/* Copyright 1991-1992 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01e,22sep92,rrr added support for c++
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01d,26may92,rrr the tree shuffle
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01c,04oct91,rrr passed through the ansification filter
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-fixed #else and #endif
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-changed ASMLANGUAGE to _ASMLANGUAGE
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-changed copyright notice
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01b,07jun91,hdn defined HD146818_REG_OFFSET.
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01a,26feb91,hdn written.
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*/
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#ifndef __INChd146818h
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#define __INChd146818h
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define HD146818_REG_OFFSET 3
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#ifndef _ASMLANGUAGE
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typedef struct
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{
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UCHAR pad0[HD146818_REG_OFFSET];
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UCHAR seconds;
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UCHAR pad1[HD146818_REG_OFFSET];
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UCHAR secAlarm;
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UCHAR pad2[HD146818_REG_OFFSET];
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UCHAR minutes;
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UCHAR pad3[HD146818_REG_OFFSET];
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UCHAR minAlarm;
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UCHAR pad4[HD146818_REG_OFFSET];
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UCHAR hours;
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UCHAR pad5[HD146818_REG_OFFSET];
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UCHAR hrAlarm;
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UCHAR pad6[HD146818_REG_OFFSET];
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UCHAR dayOfWeek;
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UCHAR pad7[HD146818_REG_OFFSET];
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UCHAR date;
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UCHAR pad8[HD146818_REG_OFFSET];
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UCHAR month;
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UCHAR pad9[HD146818_REG_OFFSET];
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UCHAR year;
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UCHAR pad10[HD146818_REG_OFFSET];
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UCHAR controlA;
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UCHAR pad11[HD146818_REG_OFFSET];
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UCHAR controlB;
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UCHAR pad12[HD146818_REG_OFFSET];
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UCHAR controlC;
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UCHAR pad13[HD146818_REG_OFFSET];
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UCHAR controlD;
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} RTC;
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#endif /* _ASMLANGUAGE */
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/* bit values for control register A */
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#define RTC_UIP 0x80
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#define RTC_1MHZ 0x10
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#define RTC_32KHZ 0x20
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#define RTC_DV_RESET 0x60
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/* bit values for control register B */
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#define RTC_SET 0x80
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#define RTC_PIE 0x40
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#define RTC_AIE 0x20
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#define RTC_UIE 0x10
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#define RTC_SQWE 0x08
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#define RTC_DM 0x04
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#define RTC_24 0x02
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#define RTC_DSE 0x01
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/* bit values for control register C */
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#define RTC_IRQF 0x80
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#define RTC_PF 0x40
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#define RTC_AF 0x20
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#define RTC_UF 0x10
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INChd146818h */
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