176 lines
6.4 KiB
C
176 lines
6.4 KiB
C
/* ppc555SciSio.h - header file for ppc555Sci serial driver */
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/* Copyright 1984-1997, 2010 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01b,29apr10,pad Moved extern C statement after include statements.
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01a,22mar99,zl written based on templateSio.h, m68332Sio.h and m68332.h
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*/
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#ifndef __INCppc555SciSioh
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#define __INCppc555SciSioh
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#ifndef _ASMLANGUAGE
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#include "sioLib.h"
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#include "drv/multi/ppc555Siu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Additional hardware options to the ones in sioLib.h
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*/
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#define QUEUED 0x100
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/*
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* QSM - Register definitions for the Queued Serial Module (QSM)
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*/
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#define PPC555_QSM_MCR(base) ((VUINT16 *) (base + 0x305000))
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#define PPC555_QSM_TEST(base) ((VUINT16 *) (base + 0x305002))
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#define PPC555_QSM_DSCI_ILR(base) ((VUINT16 *) (base + 0x305004))
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#define PPC555_QSM_QSPI_ILR(base) ((VUINT16 *) (base + 0x305006))
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#define PPC555_QSM_SCI1_CR0(base) ((VUINT16 *) (base + 0x305008))
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#define PPC555_QSM_SCI1_CR1(base) ((VUINT16 *) (base + 0x30500a))
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#define PPC555_QSM_SCI1_SR(base) ((VUINT16 *) (base + 0x30500c))
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#define PPC555_QSM_SCI1_DR(base) ((VUINT16 *) (base + 0x30500e))
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#define PPC555_QSM_QPDR(base) ((VUINT16 *) (base + 0x305014))
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#define PPC555_QSM_QPAR(base) ((VUINT8 *) (base + 0x305016))
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#define PPC555_QSM_QDDR(base) ((VUINT8 *) (base + 0x305017))
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#define PPC555_QSM_SPCR0(base) ((VUINT16 *) (base + 0x305018))
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#define PPC555_QSM_SPCR1(base) ((VUINT16 *) (base + 0x30501a))
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#define PPC555_QSM_SPCR2(base) ((VUINT16 *) (base + 0x30501c))
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#define PPC555_QSM_SPCR3(base) ((VUINT8 *) (base + 0x30501e))
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#define PPC555_QSM_SPSR(base) ((VUINT8 *) (base + 0x30501f))
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#define PPC555_QSM_SCI2_CR0(base) ((VUINT16 *) (base + 0x305020))
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#define PPC555_QSM_SCI2_CR1(base) ((VUINT16 *) (base + 0x305022))
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#define PPC555_QSM_SCI2_SR(base) ((VUINT16 *) (base + 0x305024))
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#define PPC555_QSM_SCI2_DR(base) ((VUINT16 *) (base + 0x305026))
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#define PPC555_QSM_QSCI1_CR(base) ((VUINT16 *) (base + 0x305028))
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#define PPC555_QSM_QSCI1_SR(base) ((VUINT16 *) (base + 0x30502a))
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#define PPC555_QSM_QSCI1_SCTQ(base) ((VUINT16 *) (base + 0x30502c))
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#define PPC555_QSM_QSCI1_SCRQ(base) ((VUINT16 *) (base + 0x30504c))
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/* QSM_DSCI_ILR - DSCI Interrupt Level Register */
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#define QSM_QILR_SCI_MSK 0x8f00 /* SCI interrupt level mask */
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#define QSM_QILR_SCI_SHIFT 8 /* SCI interrupt level shift */
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/* QSM_SCCR0 - Control Register 0 */
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#define QSM_SCCR0_OTHR 0x8000 /* Select baud rate source clk */
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#define QSM_SCCR0_LNKBD 0x4000 /* Link baud */
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#define QSM_SCCR0_SCBR_MSK 0x1FFF /* Baud rate mask */
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/* QSM_SCCR1 - Control Register 1 */
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#define QSM_SCCR1_SBK 0x0001 /* send break */
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#define QSM_SCCR1_RWU 0x0002 /* receiver wakeup enable */
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#define QSM_SCCR1_RE 0x0004 /* receiver enable */
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#define QSM_SCCR1_TE 0x0008 /* transmitter enable */
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#define QSM_SCCR1_ILIE 0x0010 /* idle-line interrupt enable */
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#define QSM_SCCR1_RIE 0x0020 /* receiver interrupt enable */
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#define QSM_SCCR1_TCIE 0x0040 /* transmit complete interrupt enable */
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#define QSM_SCCR1_TIE 0x0080 /* transmit interrupt enable */
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#define QSM_SCCR1_WAKE 0x0100 /* wakeup by address mark */
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#define QSM_SCCR1_M 0x0200 /* mode select: 0= 8 data bits, 1 = 9 */
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#define QSM_SCCR1_PE 0x0400 /* parity enable */
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#define QSM_SCCR1_PT 0x0800 /* parity type: 1=Odd, 0=Even */
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#define QSM_SCCR1_ILT 0x1000 /* idle line detect type */
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#define QSM_SCCR1_WOMS 0x2000 /* wired or mode for SCI Pins */
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#define QSM_SCCR1_LOOPS 0x4000 /* test SCI operation */
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/* QSM_SCSR - Status Register */
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#define QSM_SCSR_PF 0x0001 /* parity error flag */
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#define QSM_SCSR_FE 0x0002 /* framing error flag */
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#define QSM_SCSR_NF 0x0004 /* noise error flag */
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#define QSM_SCSR_OR 0x0008 /* overrun error flag */
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#define QSM_SCSR_IDLE 0x0010 /* idle-line detected flag */
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#define QSM_SCSR_RAF 0x0020 /* receiver active flag */
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#define QSM_SCSR_RDRF 0x0040 /* receive data register full flag */
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#define QSM_SCSR_TC 0x0080 /* transmit complete */
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#define QSM_SCSR_TDRE 0x0100 /* transmit date register empty flag */
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/* QSM_QSCCR - Queued SCI Control Register */
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#define QSM_QSCCR_QTPNT_MSK 0xF000 /* Queue transmit pointer */
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#define QSM_QSCCR_QTHFI 0x0800 /* Rcv queue top-half full intr. */
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#define QSM_QSCCR_QBHFI 0x0400 /* Rcv queue bottom-half full intr. */
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#define QSM_QSCCR_QTHEI 0x0200 /* Xmt queue top-half empty intr. */
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#define QSM_QSCCR_QBHEI 0x0100 /* Xmt queue bottom-half empty intr. */
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#define QSM_QSCCR_QTE 0x0040 /* Queue transmit enable */
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#define QSM_QSCCR_QRE 0x0020 /* Queue receive enable */
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#define QSM_QSCCR_QTWE 0x0010 /* Queue transmit wrap enable */
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#define QSM_QSCCR_QTSZ_MSK 0x000F /* Queue transfer size */
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/* QSM_SCSR - Queued SCI Status Register */
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#define QSM_QSCSR_QOR 0x1000 /* Receiver queue overrun error */
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#define QSM_QSCSR_QTHF 0x0800 /* Receiver queue top-half full */
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#define QSM_QSCSR_QBHF 0x0400 /* Receiver queue bottom-half full */
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#define QSM_QSCSR_QTHE 0x0200 /* Xmitter queue top-half empty */
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#define QSM_QSCSR_QBHE 0x0100 /* Xmitter queue bottom-half empty */
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#define QSM_QSCSR_QRPNT_MSK 0x00F0 /* Queue receive pointer */
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#define QSM_QSCSR_QPEND_MSK 0x000F /* Queue pending */
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/*
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* device and channel structures
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*/
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typedef struct
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{
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/* must be first */
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SIO_CHAN sio; /* standard SIO_CHAN element */
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/* callbacks */
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STATUS (*getTxChar) ();
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STATUS (*putRcvChar) ();
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void * getTxArg;
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void * putRcvArg;
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/* register addresses */
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volatile UINT16 * sccr0; /* control register 0 */
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volatile UINT16 * sccr1; /* control register 1 */
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volatile UINT16 * scsr; /* status register */
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volatile UINT16 * scdr; /* data register */
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volatile UINT16 * scilr; /* interrupt level register */
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volatile UINT16 * qsccr; /* queued control register */
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volatile UINT16 * qscsr; /* queued status register */
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volatile UINT16 * scrq; /* receive queue */
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volatile UINT16 * sctq; /* transmit queue */
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/* misc */
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int intLevel;
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int baudRate;
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int clockRate; /* CPU clock frequency (Hz) */
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int mode; /* current mode (interrupt or poll) */
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int options; /* Hardware options */
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} PPC555SCI_CHAN;
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/*
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* function prototypes
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*/
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IMPORT void ppc555SciDevInit (PPC555SCI_CHAN *pChan);
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IMPORT void ppc555SciDevInit2(PPC555SCI_CHAN *pChan);
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IMPORT void ppc555SciInt (PPC555SCI_CHAN *pChan);
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#endif /* _ASMLANGUAGE */
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#endif /* __STDC__ */
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#ifdef __cplusplus
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}
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#endif /* __INCppc555SciSioh */
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