74 lines
1.6 KiB
C
74 lines
1.6 KiB
C
/* i8259a.h - Intel 8259a PIC (Programmable Interrupt Controller) */
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/* Copyright 1984-1996 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01e,17mar97,hdn added function declarations.
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01d,03jan95,vin added PIC_ISR_MASK, PIC_IRR_MASK, OCW3
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01c,16aug93,hdn deleted PIC_BASE_ADRS macros.
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01b,16jun93,hdn updated to 5.1.
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01a,15may92,hdn written.
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*/
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#ifndef __INCi8259ah
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#define __INCi8259ah
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* The macro PIC_REG_ADDR_INTERVAL must be defined
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* when including this header.
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*/
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/* default definitions */
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#define CAST
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#define PIC_ADRS(base,reg) (CAST (base+(reg*PIC_REG_ADDR_INTERVAL)))
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/* register definitions */
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#define PIC_port1(base) PIC_ADRS(base,0x00) /* port 1. */
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#define PIC_port2(base) PIC_ADRS(base,0x01) /* port 2. */
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/* alias */
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#define PIC_IMASK(base) PIC_port2(base) /* Interrupt mask. */
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#define PIC_IACK(base) PIC_port1(base) /* Interrupt acknowledge. */
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#define PIC_ISR_MASK(base) PIC_port1(base) /* in-service register mask */
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#define PIC_IRR_MASK(base) PIC_port1(base) /* interrupt request reg */
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#define OCW3_DEF 0x08 /* 3rd default control word */
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#define OCW3_PCB 0x04 /* Polling Control Bit */
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#define OCW3_ISR 0x03 /* Read in-service reg */
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#define OCW3_IRR 0x02 /* Read inter request reg */
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#ifndef _ASMLANGUAGE
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#if defined(__STDC__) || defined(__cplusplus)
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IMPORT int sysIntLevel (void);
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IMPORT VOID sysIntLock (void);
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IMPORT VOID sysIntUnlock (void);
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#else
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IMPORT int sysIntLevel ();
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IMPORT VOID sysIntLock ();
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IMPORT VOID sysIntUnlock ();
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#endif /* __STDC__ */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCi8259ah */
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