122 lines
3.1 KiB
C
122 lines
3.1 KiB
C
/* dbgSimntLib.h - header file for arch dependent portion of debugger */
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/*
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* Copyright (c) 1998,2004,2010 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use of this
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* software may be licensed only pursuant to the terms of an applicable
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* Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01g,22oct10,jmp Removed obsolete DSM() macro - Replaced by VXDBG_INSTR_CMP().
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01f,19may10,elp 64 bits support.
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01f,29apr10,pad Moved extern C statement after include statements.
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01e,18may04,jmp fixed instrI86.h reference.
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01d,07apr04,jmp adapted to share trcArchLib between VxSim/i86 and i86 arches.
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01c,11feb04,elg Add syscall instruction size macro.
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01b,09feb04,jeg added DSM() macro definition
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01a,29apr98,cym written based on x86 version.
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*/
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#ifndef __INCdbgSimntLibh
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#define __INCdbgSimntLibh
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/* includes */
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#include <vsbConfig.h>
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#if (CPU==SIMNT)
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#include <arch/simnt/instrSimpentium.h>
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#elif (CPU==SIMLINUX)
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#include <arch/simlinux/instrSimpentium.h>
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#endif /* CPU == SIMNT */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* defines */
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#define BRK_INST 0x1000 /* instruction hardware breakpoint */
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#define BRK_DATAW1 0x1400 /* data write 1 byte breakpoint */
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#define BRK_DATAW2 0x1500 /* data write 2 byte breakpoint */
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#define BRK_DATAW4 0x1700 /* data write 4 byte breakpoint */
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#define BRK_DATARW1 0x1c00 /* data read-write 1 byte breakpoint */
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#define BRK_DATARW2 0x1d00 /* data read-write 2 byte breakpoint */
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#define BRK_DATARW4 0x1f00 /* data read-write 4 byte breakpoint */
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#define BRK_HARDWARE 0x1000 /* hardware breakpoint bit */
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#define BRK_HARDMASK 0x1f00 /* hardware breakpoint mask */
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#define TRACE_FLAG (0x0100) /* TF in EFLAGS */
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#define INT_FLAG (0x0200) /* IF in EFLAGS */
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#define DBG_INST_ALIGN (1)
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#ifndef _ASMLANGUAGE
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#define BREAK_INST 0xcc /* int 3 */
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#define DBG_BREAK_INST 0xcc /* int 3 */
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#define DBG_SYSCALL_SIZE 2
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#define BREAK_ESF EXC_INFO
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#define TRACE_ESF EXC_INFO
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/* register indexes */
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#ifdef _WRS_CONFIG_LP64
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#define R15 (0)
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#define R14 (1)
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#define R13 (2)
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#define R12 (3)
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#define R11 (4)
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#define R10 (5)
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#define R9 (6)
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#define R8 (7)
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#define RDI (8)
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#define RSI (9)
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#define RBP (10)
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#define RSP (11)
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#define RBX (12)
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#define RDX (13)
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#define RCX (14)
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#define RAX (15)
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#define RFLAGS (16)
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#else /* _WRS_CONFIG_LP64 */
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#define EDI (0)
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#define ESI (1)
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#define EBP (2)
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#define ESP (3)
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#define EBX (4)
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#define EDX (5)
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#define ECX (6)
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#define EAX (7)
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#define EFLAGS (8)
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#endif /* _WRS_CONFIG_LP64 */
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#define _WRS_TRC_ARGS_COUNT 5 /* number of arguments to print in */
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/* stack trace */
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/* hardware breakpoint registers */
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typedef struct /* DBG_REGS */
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{
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unsigned int db0; /* debug register 0 */
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unsigned int db1; /* debug register 1 */
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unsigned int db2; /* debug register 2 */
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unsigned int db3; /* debug register 3 */
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unsigned int db6; /* debug register 6 */
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unsigned int db7; /* debug register 7 */
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} DBG_REGS;
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* INCdbgSimntLibh */
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