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neelimap
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/* lptDrv.h - IBM-PC LPT */
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/* Copyright 1984-2000, 2010 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01h,29apr10,pad Moved extern C statement after include statements.
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01g,23mar01,sru add register spacing field to LPT_RESOURCE SPR# 65937
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01f,23aug00,jgn move _ASMLANGUAGE guard to prevent header file problems with
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assembler builds
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01e,04jan00,dat SPR 29875, chg'd SEMAPHOREs to SEM_IDs
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01d,22nov99,stv added missing header files (SPR #24014).
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01c,10dec97,ms added lptResources import
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01b,18oct96,hdn re-written.
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01a,13oct94,hdn written.
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*/
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#ifndef __INClptDrvh
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#define __INClptDrvh
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#ifndef _ASMLANGUAGE
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/* includes */
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#include "iosLib.h"
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#include "semLib.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct lptDev /* LPT_DEV */
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{
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DEV_HDR devHdr;
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BOOL created; /* TRUE if this device has been created */
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BOOL autofeed; /* TRUE if enable autofeed */
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BOOL inservice; /* TRUE if interrupt in service */
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ULONG data; /* data register */
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ULONG stat; /* status register */
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ULONG ctrl; /* control register */
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int intCnt; /* interrupt count */
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int retryCnt; /* retry count */
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int busyWait; /* loop count for BUSY wait */
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int strobeWait; /* loop count for STROBE wait */
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int timeout; /* timeout second for syncSem */
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int intLevel; /* interrupt level */
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SEM_ID muteSem; /* mutex semaphore */
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SEM_ID syncSem; /* sync semaphore */
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} LPT_DEV;
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typedef struct lptResource /* LPT_RESOURCE */
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{
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int ioBase; /* IO base address */
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int intVector; /* interrupt vector */
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int intLevel; /* interrupt level */
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BOOL autofeed; /* TRUE if enable autofeed */
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int busyWait; /* loop count for BUSY wait */
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int strobeWait; /* loop count for STROBE wait */
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int retryCnt; /* retry count */
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int timeout; /* timeout second for syncSem */
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int regDelta; /* register address spacing */
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} LPT_RESOURCE;
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/* IO address (LPT) */
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#define N_LPT_CHANNELS 3 /* max LPT channels */
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/* register definitions */
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#define CAST
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#define LPT_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
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#define LPT_ADRS(base,reg) (CAST (base+(reg*LPT_REG_ADDR_INTERVAL)))
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/* register spacing based on header file definition */
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#define LPT_DATA(base) LPT_ADRS(base,0x00) /* data reg. */
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#define LPT_STAT(base) LPT_ADRS(base,0x01) /* status reg. */
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#define LPT_CTRL(base) LPT_ADRS(base,0x02) /* control reg. */
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/* register spacing based on resource structure */
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#define LPT_DATA_RES(resource) (resource->ioBase + (0 * resource->regDelta))
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#define LPT_STAT_RES(resource) (resource->ioBase + (1 * resource->regDelta))
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#define LPT_CTRL_RES(resource) (resource->ioBase + (2 * resource->regDelta))
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/* control register */
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#define C_STROBE 0x01 /* STROBE signal */
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#define C_AUTOFEED 0x02 /* AUTOFEED signal */
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#define C_NOINIT 0x04 /* INITIALIZE signal */
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#define C_SELECT 0x08 /* SELECT INPUT signal */
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#define C_ENABLE 0x10 /* ENABLE interrupt */
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#define C_INPUT 0x20 /* DATA DIRECTION control bit */
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/* status register */
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#define S_NODERR 0x08 /* Device error */
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#define S_SELECT 0x10 /* Device selected */
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#define S_PERR 0x20 /* Device out of paper */
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#define S_NOACK 0x40 /* Printer ready */
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#define S_NOBUSY 0x80 /* Device busy */
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#define S_MASK 0xb8 /* mask bits */
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/* ioctl functions */
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#define LPT_SETCONTROL 0
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#define LPT_GETSTATUS 1
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IMPORT LPT_RESOURCE lptResources[];
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/* function declarations */
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#if defined(__STDC__) || defined(__cplusplus)
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STATUS lptDrv (int channels, LPT_RESOURCE *pResource);
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STATUS lptDevCreate (char *name, int channel);
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#else
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STATUS lptDrv ();
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STATUS lptDevCreate ();
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#endif /* __STDC__ */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INClptDrvh */
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/* m8260IOPort.h - Motorola MPC8260 I/O Port header file */
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/* Copyright 1984-1999 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01a,12sep99,ms_ created from m8260Sio.h, 01b
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*/
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/*
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* This file contains constants for the I/O Ports in the Motorola
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* MPC8260 PowerQUICC II integrated Communications Processor
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*/
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#ifndef __INCm8260IOPorth
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#define __INCm8260IOPorth
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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/* I/O Port Configuration Registers */
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/*** Port A data direction reg ***/
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#define M8260_IOP_PADIR(base) ((VINT32 *) ((base) + 0x010D00))
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/*** Port A pin assign reg ***/
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#define M8260_IOP_PAPAR(base) ((VINT32 *) ((base) + 0x010D04))
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/*** Port A special options reg ***/
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#define M8260_IOP_PASO(base) ((VINT32 *) ((base) + 0x010D08))
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/*** Port A open drain reg ***/
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#define M8260_IOP_PAODR(base) ((VINT32 *) ((base) + 0x010D0C))
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/*** Port A data reg ***/
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#define M8260_IOP_PADAT(base) ((VINT32 *) ((base) + 0x010D10))
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/*** Port B data direction reg ***/
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#define M8260_IOP_PBDIR(base) ((VINT32 *) ((base) + 0x010D20))
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/*** Port B pin assign reg ***/
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#define M8260_IOP_PBPAR(base) ((VINT32 *) ((base) + 0x010D24))
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/*** Port B special options reg ***/
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#define M8260_IOP_PBSO(base) ((VINT32 *) ((base) + 0x010D28))
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/*** Port B open drain reg ***/
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#define M8260_IOP_PBODR(base) ((VINT32 *) ((base) + 0x010D2C))
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/*** Port B Data register ***/
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#define M8260_IOP_PBDAT(base) ((VINT32 *) ((base) + 0x010D30))
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/*** Port C data direction reg ***/
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#define M8260_IOP_PCDIR(base) ((VINT32 *) ((base) + 0x010D40))
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/*** Port C pin assign reg ***/
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#define M8260_IOP_PCPAR(base) ((VINT32 *) ((base) + 0x010D44))
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/*** Port C special options reg ***/
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#define M8260_IOP_PCSO(base) ((VINT32 *) ((base) + 0x010D48))
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/*** Port C open drain reg ***/
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#define M8260_IOP_PCODR(base) ((VINT32 *) ((base) + 0x010D4C))
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/*** Port C data reg ***/
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#define M8260_IOP_PCDAT(base) ((VINT32 *) ((base) + 0x010D50))
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/*** Port D data direction reg ***/
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#define M8260_IOP_PDDIR(base) ((VINT32 *) ((base) + 0x010D60))
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/*** Port D pin assign reg ***/
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#define M8260_IOP_PDPAR(base) ((VINT32 *) ((base) + 0x010D64))
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/*** Port D special options reg ***/
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#define M8260_IOP_PDSO(base) ((VINT32 *) ((base) + 0x010D68))
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/*** Port D open drain reg ***/
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#define M8260_IOP_PDODR(base) ((VINT32 *) ((base) + 0x010D6C))
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/*** Port D data reg ***/
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#define M8260_IOP_PDDAT(base) ((VINT32 *) ((base) + 0x010D70))
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCm8260IOPorth */
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