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/* intMipsLib.h - MIPS-specific interrupt library header file */
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/* Copyright 1999,2007, 2009-2011 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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01h,25may11,slk Add 64bit interrupt support for xlx
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01g,29apr10,pad Moved extern C statement after include statements.
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01f,07jul09,slk add _inline_intCpuMicroLock and _inline_intCpuMicroUnlock
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01e,13mar09,slk fix _ASMLANGUAGE defined area
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01d,24feb09,slk fix zero register references
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01c,16feb09,slk add inline intCpuLock and intCpuUnlock macros for R2 variants
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01b,04oct07,d_c Add extended interrupts for RMI _xlr variant
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01a,26oct99,dra created.
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*/
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#ifndef __INCintMipsLibh
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#define __INCintMipsLibh
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#ifndef _ASMLANGUAGE
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#include <vsbConfig.h>
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#include <arch/mips/mipsExcPage.h>
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#if defined(MIPSXX_xlp) || defined(MIPSXX_xlr) || \
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defined(_WRS_MIPS_NETLOGIC_CPU)
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#include <arch/mips/xlxLib.h>
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#endif /* defined(MIPSXX_xlp) || defined(MIPSXX_xlr) ||
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defined(_WRS_MIPS_NETLOGIC_CPU) */
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef _WRS_INLINE_intCpuLock
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#if defined(_WRS_MIPS_ENABLE_R2_ISA)
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#if defined (__DCC__)
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__asm volatile int _inline_intCpuLock ()
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{
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! "$2"
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di $2
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ehb
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}
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#elif defined (__GNUC__)
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#define _inline_intCpuLock() intCpuLock()
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#else /* __GNUC__ */
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#define _inline_intCpuLock() intCpuLock()
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#endif /* __DCC__ */
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#else /* _WRS_MIPS_ENABLE_R2_ISA */
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#define _inline_intCpuLock() intCpuLock()
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#endif /* _WRS_MIPS_ENABLE_R2_ISA */
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#endif /* _WRS_INLINE_intCpuLock */
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#ifdef _WRS_INLINE_intCpuMicroLock
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#if defined(_WRS_MIPS_ENABLE_R2_ISA)
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#if defined (__DCC__)
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__asm volatile int _inline_intCpuMicroLock ()
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{
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! "$2"
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di $2
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ehb
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}
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#elif defined (__GNUC__)
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#define _inline_intCpuMicroLock() intCpuMicroLock()
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#else /* __GNUC__ */
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#define _inline_intCpuMicroLock() intCpuMicroLock()
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#endif /* __DCC__ */
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#else /* _WRS_MIPS_ENABLE_R2_ISA */
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#define _inline_intCpuMicroLock() intCpuMicroLock()
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#endif /* _WRS_MIPS_ENABLE_R2_ISA */
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#endif /* _WRS_INLINE_intCpuMicroLock */
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#ifdef _WRS_INLINE_intCpuUnlock
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#if defined(_WRS_MIPS_ENABLE_R2_ISA)
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#if defined (__DCC__)
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#define _inline_intCpuUnlock(key) intCpuUnlock(key)
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#elif defined (__GNUC__)
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#define _inline_intCpuUnlock(key) intCpuUnlock(key)
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#else /* __GNUC__ */
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#define _inline_intCpuUnlock(key) intCpuUnlock(key)
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#endif /* __DCC__ */
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#else /* _WRS_MIPS_ENABLE_R2_ISA */
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#define _inline_intCpuUnlock(key) intCpuUnlock(key)
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#endif /* _WRS_MIPS_ENABLE_R2_ISA */
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#endif /* _WRS_INLINE_intCpuUnlock */
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#ifdef _WRS_INLINE_intCpuMicroUnlock
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#if defined(_WRS_MIPS_ENABLE_R2_ISA)
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#if defined (__DCC__)
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__asm volatile void _inline_intCpuMicroUnlock (int key)
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{
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% reg key ;
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.set noreorder
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mtc0 key, $12
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ehb
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.set reorder
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}
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#elif defined (__GNUC__)
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#define _inline_intCpuMicroUnlock(key) intCpuMicroUnlock(key)
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#else /* __GNUC__ */
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#define _inline_intCpuMicroUnlock(key) intCpuMicroUnlock(key)
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#endif /* __DCC__ */
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#else /* _WRS_MIPS_ENABLE_R2_ISA */
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#define _inline_intCpuMicroUnlock(key) intCpuMicroUnlock(key)
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#endif /* _WRS_MIPS_ENABLE_R2_ISA */
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#endif /* _WRS_INLINE_intCpuMicroUnlock */
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#if defined(__STDC__) || defined(__cplusplus)
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extern int intCRGet (void);
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extern void intCRSet (int value);
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extern int intSRGet (void);
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extern int intSRSet (int value);
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extern int intDisable (int);
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extern int intEnable (int);
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#if defined(MIPSXX_xlp) || defined(MIPSXX_xlr) || \
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defined(_WRS_MIPS_NETLOGIC_CPU)
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extern UINT64 intExtendedEnable (UINT64);
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extern UINT64 intExtendedDisable (UINT64);
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#endif /* defined(MIPSXX_xlp) || defined(MIPSXX_xlr) ||
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defined(_WRS_MIPS_NETLOGIC_CPU) */
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#else /* defined(__STDC__) || defined(__cplusplus) */
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extern int intCRGet ();
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extern void intCRSet ();
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extern int intSRGet ();
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extern int intSRSet ();
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extern int intDisable ();
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extern int intEnable ();
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#if defined(MIPSXX_xlp) || defined(MIPSXX_xlr) || \
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defined(_WRS_MIPS_NETLOGIC_CPU)
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extern UINT64 intExtendedEnable (UINT64);
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extern UINT64 intExtendedDisable (UINT64);
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#endif /* defined(MIPSXX_xlp) || defined(MIPSXX_xlr) ||
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defined(_WRS_MIPS_NETLOGIC_CPU) */
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#endif /* defined(__STDC__) || defined(__cplusplus) */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __INCintMipsLibh */
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