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/* dbgI86Lib.h - header file for arch dependent portion of debugger */
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/*
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* Copyright (c) 1991,1993,1997-1998,2002-2005,2009-2010,2012,2016
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* Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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modification history
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--------------------
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01v,20may16,jmp Imported from vxWorks 7 for WB4 debug support:
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Added 8 bytes hardware breakpoint support (US11680).
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Added VXDBG_HAS_HW_BP_SUPPORT_CHECK as VxDBG provides support
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to dynamically detect if HW BP support is enabled on this
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architecture (US39045).
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01u,16oct12,scm WIND00376020 - fast system call support...
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01t,22oct10,jmp Removed obsolete DSM() macro - Replaced by VXDBG_INSTR_CMP().
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01s,29jul10,pad Moved extern C statement after include statements.
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01r,19jun09,mze replacing PAD64
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01q,20mar09,jmp removed DBG_INST_ALIGN definition (Use the default one).
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01p,10feb09,jb Adding 64-bit Support
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01p,31mar09,dbt Disable hardware breakpoint support for Hypervisor
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Guest OS (CQ:WIND00161733).
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01o,16feb05,aeg changed wdbDbgCtxXXX() prototypes (SPR #106381).
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01n,14oct04,elg Rename wdbDbgCtxXXX() in wdbCtxXXX().
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01m,01sep04,elg Define context load/save for WDB.
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01l,19aug04,jb Fix for SPRs 100660, 100729, and 100748
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01k,25jun04,elg Undefine WDB_CTX_LOAD() to use standard definition
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(SPR #98730).
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01j,27apr04,jmp adapted to share trcArchLib between VxSim/i86 and i86 arches.
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01i,02mar04,jb Adding StepOverSyscall support
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01h,17jul03,c_c Fixed build.
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01g,16sep02,pai Updated with commonly used manifest constants.
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01f,30may02,hdn added WDB_CTX_LOAD() define (spr 75694)
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01e,11mar98,dbt corrected problems introduced by the SENS merge
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added Copyright.
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01d,13feb98,hdn fixed BRK_DATAxx macros.
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01d,30dec97,dbt modified and added some defines for new breakpoint scheme.
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01c,29nov93,hdn added a definition EDI - EFLAGS.
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01b,27aug93,hdn added support for c++
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01a,11sep91,hdn written based on TRON version.
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*/
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#ifndef __INCI86dbgh
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#define __INCI86dbgh
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#ifdef _WRS_CONFIG_LP64
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#include "arch/i86/x86_64/dbgX86_64Lib.h"
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#else
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/* includes */
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#include "arch/i86/esfI86.h"
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#include "arch/i86/regsI86.h"
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#include "arch/i86/instrI86.h"
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#include <vsbConfig.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* defines */
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#define BRK_INST (0x00) /* instruction hardware breakpoint */
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#define BRK_DATAW1 (0x01) /* data write 1 byte breakpoint */
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#define BRK_DATAW2 (0x05) /* data write 2 byte breakpoint */
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#define BRK_DATAW4 (0x0d) /* data write 4 byte breakpoint */
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#define BRK_DATAW8 (0x09) /* data write 8 byte breakpoint */
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#define BRK_DATARW1 (0x03) /* data read-write 1 byte breakpoint */
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#define BRK_DATARW2 (0x07) /* data read-write 2 byte breakpoint */
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#define BRK_DATARW4 (0x0f) /* data read-write 4 byte breakpoint */
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#define BRK_DATARW8 (0x0b) /* data read-write 8 byte breakpoint */
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#define DEFAULT_HW_BP (BRK_DATARW1) /* default hardware breakpoint */
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#define BRK_HARDWARE (0x10) /* hardware breakpoint bit */
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#define BRK_HARDMASK (0x0f) /* hardware breakpoint mask */
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#define SAVED_DBGREGS (0x18) /* 6 debug registers */
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#define SAVED_REGS (0x38) /* 8 + 6 registers */
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#define TRACE_FLAG (0x0100) /* TF in EFLAGS */
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#define INT_FLAG (0x0200) /* IF in EFLAGS */
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#define DBG_HARDWARE_BP 1 /* hardware breakpoint support */
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#define VXDBG_HAS_HW_BP_SUPPORT_CHECK 1
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/* VxDBG provides HW BP support detection */
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#ifndef _ASMLANGUAGE
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#define DBG_BREAK_INST (0xcc) /* int 3 */
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#if (CPU != PENTIUM)
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#define DBG_SYSCALL_SIZE 2
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#define DBG_SYSCALL_INST 0x5a5d340f
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#define DBG_SYSCALL_INST_MASK 0xffffffff
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#else
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#define DBG_SYSCALL_SIZE 7
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#define DBG_SYSCALL_INST 0x0000009A
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#endif /* (CPU != PENTIUM) */
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/* offsets to register fields in type REG_SET */
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#define EDI (0)
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#define ESI (1)
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#define EBP (2)
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#define ESP (3)
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#define EBX (4)
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#define EDX (5)
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#define ECX (6)
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#define EAX (7)
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#define EFLAGS (8)
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/* context save/load for WDB */
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#define WDB_CTX_SAVE(pRegs) (_wdbCtxSave (pRegs))
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#define WDB_CTX_LOAD(pRegs) (_wdbCtxLoad (pRegs))
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/* typedefs */
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/* aliases for type <ESF0> */
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typedef ESF0 BREAK_ESF;
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typedef ESF0 TRACE_ESF;
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/* hardware breakpoint registers */
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typedef struct /* DBG_REGS */
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{
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unsigned int db0; /* debug register 0 */
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unsigned int db1; /* debug register 1 */
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unsigned int db2; /* debug register 2 */
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unsigned int db3; /* debug register 3 */
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unsigned int db6; /* debug register 6 */
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unsigned int db7; /* debug register 7 */
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} DBG_REGS;
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/* function declarations */
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extern void _wdbCtxLoad (const REG_SET *);
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extern int _wdbCtxSave (const REG_SET *);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _WRS_CONFIG_LP64 */
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#endif /* __INCI86dbgh */
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