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/* i82527.h - definitions for Intel 82527 CAN Controller */
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/* Copyright 2001 Wind River Systems, Inc. */
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/*
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modification history
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--------------------
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09nov01,dnb modified for integration into Tornado
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12jul01,jac written
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*/
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/*
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DESCRIPTION
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This file contains the functions declarations, specific to the
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Intel 82527 CAN controller, that implement the interface defined
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in the wnCAN.h header file.
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*/
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#ifndef _I82527_H_
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#define _I82527_H_
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/* max number of message objects for i82527 */
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#define I82527_MAX_MSG_OBJ 15
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/* bit constants */
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#define I82527_B_INIT 0x01 /* is 1 after reset or busoff, must be set to 0 1st time */
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#define I82527_B_IE 0x02 /* interrupt enable, must be 1 for using msg obj int's */
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#define I82527_B_SIE 0x04 /* status interrupt enable, can be 0 */
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#define I82527_B_EIE 0x08 /* Error interrupt enable, can be 0 */
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#define I82527_B_CCE 0x40 /* config change enable, must be 0 for accessing cfg reg's*/
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/* status register */
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#define I82527_B_LEC0 0x01
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#define I82527_B_LEC1 0x02
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#define I82527_B_LEC2 0x04
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#define I82527_B_TXOK 0x08
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#define I82527_B_RXOK 0x10
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#define I82527_B_WAKE 0x20
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#define I82527_B_WARN 0x40 /* read-only, must be 0 for bus transfer */
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#define I82527_B_BOFF 0x80 /* read-only, must be 0 for bus transfer */
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/* CPU interface register */
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#define I82527_B_CEN 0x01
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#define I82527_B_MUX 0x04
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#define I82527_B_SLEEP 0x08
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#define I82527_B_PWD 0x10
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#define I82527_B_DMC 0x20
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#define I82527_B_DSC 0x40
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#define I82527_B_RSTST 0x80
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struct i82527ChipSpecific
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{
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BOOL busOffInt;
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BOOL wakeUpInt;
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BOOL errorInt;
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};
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extern const UINT g_i82527chnType[I82527_MAX_MSG_OBJ];
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void i82527_registration(void);
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void i82527ISR(ULONG context);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* _I82527_H_ */
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