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/*
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******************************************************************************
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* SOURCE FILE
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*
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* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: Sec4Driver.h,v $ $Revision: 1.7.12.1 $
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* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/Sec4Driver.h,v $
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* $Author: jsheng $
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* $State: Exp $ $Locker: $
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*
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* INTERPEAK_COPYRIGHT_STRING
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******************************************************************************
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*/
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/*
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****************************************************************************
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* 1 DESCRIPTION
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****************************************************************************
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*/
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/****************************************************************************
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* Sec4Driver.h - Private/local include file for SEC4 security driver
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* Based on Sec2Driver.h for SEC2 security driver
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****************************************************************************
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* Copyright (c) 2003, 2004 Freescale Semiconductor
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* All Rights Reserved. Proprietary and Confidential.
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*
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* NOTICE: The information contained in this file is proprietary
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* to Freescale Semiconductor, and is being made available to
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* Freescale's customers under strict license agreements.
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* Use or disclosure of this information is permissible only
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* under the terms of the existing license agreement.
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***************************************************************************/
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/* Revision History:
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* 1.0 Mar 11,2011 Based on Sec2Driver.h v1.2
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* 1.1 Added IPSec using shared descriptors and queue interface
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*/
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#ifndef SEC4DRIVER_H
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#define SEC4DRIVER_H
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/* assume VXWORKS */
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#include "iosLib.h"
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#include "msgQLib.h"
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#include "semLib.h"
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#include "signal.h"
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#ifdef _WRS_CONFIG_WRHV_GUEST
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#include <wrhv/vbi.h>
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#endif /* _WRS_CONFIG_WRHV_GUEST */
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#define IVEC_TO_INUM(intVec) ((int) (intVec))
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#define INUM_TO_IVEC(intNum) ((VOIDFUNCPTR *) (intNum))
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#define __vpa(pa) (pa)
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#include "Sec4.h"
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#define VERSION "1.1"
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#define SEC4_DEVNAME "sec4"
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/* Name for Processing Complete task */
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#define SEC4_PC_TASKNAME "tSEC4_pc"
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/* Interrupt for Job queues of the SEC4 */
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#ifdef _WRS_CONFIG_BSP_FSL_P1010_RDB
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#define INUM_SEC4_BASE (12 + 29) /* Job queue 0 in SEC4 core is wired to #29 within the P1010 */
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#elif defined(_WRS_CONFIG_BSP_FSL_P4080_DS) || defined(_WRS_CONFIG_BSP_WRSBCP4080)
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#define INUM_SEC4_BASE (16 + 72) /* Job queue 0 in SEC4 core is wired to #72 within the P4080 */
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#define INUM_SEC4_JQ0 (INUM_SEC4_BASE)
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#define INUM_SEC4_JQ1 (INUM_SEC4_BASE + 1)
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#define INUM_SEC4_JQ2 (INUM_SEC4_BASE + 2)
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#define INUM_SEC4_JQ3 (INUM_SEC4_BASE + 3)
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#endif
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#ifdef _WRS_CONFIG_WRHV_GUEST
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/* When we are on top of a hypervisor, this can't be extracted by sysGetPeripheralBase() */
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/* This address should correspond to the CCSBAR */
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#define PERIPHERAL_BASE (0xFE000000ULL)
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#endif
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/* Define an offset from the peripheral base register where the core */
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/* should be located relative to */
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#ifdef _WRS_CONFIG_BSP_FSL_P1010_RDB
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#define SEC4X_BASE_OFFSET (0x00030000)
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#elif defined(_WRS_CONFIG_BSP_FSL_P4080_DS) || defined(_WRS_CONFIG_BSP_WRSBCP4080)
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#define SEC4X_BASE_OFFSET (0x00300000)
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#endif
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/* Offset relative to SEC4X_BASE_OFFSET for job queues */
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#define SEC4X_JQ_BASE_SIZE (0x1000)
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#define SEC4X_JQ0_BASE_OFFSET (0x1000)
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#define SEC4X_JQ1_BASE_OFFSET (SEC4X_JQ0_BASE_OFFSET + (1 * SEC4X_JQ_BASE_SIZE))
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#define SEC4X_JQ2_BASE_OFFSET (SEC4X_JQ0_BASE_OFFSET + (2 * SEC4X_JQ_BASE_SIZE))
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#define SEC4X_JQ3_BASE_OFFSET (SEC4X_JQ0_BASE_OFFSET + (3 * SEC4X_JQ_BASE_SIZE))
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#define SEC4X_NOOF_JOB_QUEUES (4)
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/* Offset relative to SEC4X_BASE_OFFSET for queue interface */
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#define SEC4X_QI_BASE_OFFSET (0x00007000)
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/* SEC 4 Job Queue ID */
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#define SEC4X_JQ0_ID (0)
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#define SEC4X_JQ1_ID (1)
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#define SEC4X_JQ2_ID (2)
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#define SEC4X_JQ3_ID (3)
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/* Maximum number of cores using SEC4 */
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#define SEC4_MAXNOOF_CORES (7)
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/* Spin lock IDs to protect shared between cores objects */
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#ifdef SEC4_USE_QI
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#define SEC4_SA_CACHE_SPINLOCK_ID (3)
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#endif
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#ifdef SEC4_USE_SHARED_JOB_QUEUE
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#define SEC4_SH_JQ_SPINLOCK_ID (4)
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#endif
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/* Default IPsec SA cache size (may be altered during run-time) */
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#define SEC4_IPSEC_NOOF_SA_CACHE_ENTRIES_DEFAULT (256)
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/*
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* Debug message type enabler switches for SEC4DebugLevel:
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* DBGTXT_SETRQ - all messages from request setups
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* DBGTXT_SVCRQ - all messages from request servicing
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* DBGTXT_INITDEV - all messages from initialization
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* DBGTXT_DESCSHOW - content of each DPD before it's queued
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* DBGTXT_INFO - general driver information messages
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*/
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#ifdef DEBUG
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#define DBGTXT_SETRQ ((unsigned long)0x00000001)
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#define DBGTXT_SVCRQ ((unsigned long)0x00000002)
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#define DBGTXT_INITDEV ((unsigned long)0x00000004)
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#define DBGTXT_DESCSHOW ((unsigned long)0x00000008)
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#define DBGTXT_INFO ((unsigned long)0x00000010)
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#define DBGTXT_INTERPEAK ((unsigned long)0x00000020)
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#define DBGTXT_ERROR ((unsigned long)0x00000040)
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extern unsigned long SEC4DebugLevel;
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#define SEC4Dump(LEVEL,STRING) \
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do { \
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unsigned long _level = (LEVEL); \
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if ((_level == 0)||(SEC4DebugLevel & _level)) { \
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printf STRING; \
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} \
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} while (0)
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#define SEC4DbgDo(LEVEL,FUNCTION) \
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do { \
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unsigned long _level = (LEVEL); \
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if ((_level == 0)||(SEC4DebugLevel & _level)) { \
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FUNCTION; \
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} \
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} while (0)
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#else
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#define SEC4Dump(LEVEL,STRING)
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#define SEC4DbgDo(LEVEL,FUNCTION)
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#endif
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#define IOLockJobEnqueue() (void) semTake(JobEnqueueSemId, WAIT_FOREVER)
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#define IOUnLockJobEnqueue() (void) semGive(JobEnqueueSemId)
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#define IO_STATUS int
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/*! \def PROCESSING_COMPLETE_PRIORITY
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\brief #ProcessingComplete() Task priority
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*/
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#define PROCESSING_COMPLETE_PRIORITY (3)
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/*! \def PROCESSING_COMPLETE_STACKSIZE
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\brief #ProcessingComplete() Task stack size
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*/
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/* #define PROCESSING_COMPLETE_STACKSIZE (2048) */
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#define PROCESSING_COMPLETE_STACKSIZE (4096)
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#ifdef SEC4_POLLED_MODE
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/*! \def POLL_COMPLETE_PRIORITY
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\brief #PollComplete() Task priority
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*/
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#define POLL_COMPLETE_PRIORITY (3)
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/*! \def POLL_COMPLETE_STACKSIZE
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\brief #PollComplete() Task stack size
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*/
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#define POLL_COMPLETE_STACKSIZE (4096)
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#endif
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/* SEC4 core values as presented in version register (SECVID) */
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#define SEC4_COREID (0x00000a10)
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typedef struct completed_job{
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int jobStatus;
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GENERIC_REQ *req;
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} COMPLETED_JOB;
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/* SEC4_GLOBAL
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A definition used to control allocation and referencing
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of global variables.
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When the definition is not set it is considered
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to be used as a reference (extern is prepended).
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When the definition is set (to nothing) it is considered to be
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allocating the global variable. This is done in one place
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only. In init.c
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*/
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#ifndef SEC4_GLOBAL
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#define SEC4_GLOBAL extern
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#endif
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/*! \var SEM_ID JobEnqueueSemId
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\brief A global variable which is used as a mutual exclusion
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semaphore for enqueueing jobs to the SEC4 engine.
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The variable is not used directly. It used by calling
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#IOLockJobEnqueue() to lock and #IOUnLockJobEnqueue()
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to unlock.
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*/
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SEC4_GLOBAL SEM_ID JobEnqueueSemId;
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/* The queue identifier is used to queue register values read by the
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ISR (#InterruptServiceRoutine()) to the deferred interrupt process
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routine (#ProcessingComplete())
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*/
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SEC4_GLOBAL MSG_Q_ID IsrMsgQId;
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/* OS's identification of the device*/
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SEC4_GLOBAL int driverNum;
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/*! \var DEV_HDR vxworksDrvDev
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\brief Used in driver startup.
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*/
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SEC4_GLOBAL DEV_HDR vxworksDrvDev;
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/* coremask holds the core ID register for version/feature control */
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SEC4_GLOBAL unsigned long coremask;
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/* Register driver and it's handlers with the OS */
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IO_STATUS IORegisterDriver(void);
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/* Set up internal driver semaphores */
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void IOInitSemaphores(void);
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/* Initialize driver queues */
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IO_STATUS IOInitQs(uint16_t size);
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/* Enable/Disable the hardware interrupt */
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IO_STATUS IOConnectInterrupt(void);
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void IODisconnectInterrupt(void);
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/* Open a new connection to this driver */
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int SEC4Open(DEV_HDR *, int, int);
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/* Close a connection to this driver */
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int SEC4Close(int);
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/* Request a driver operation*/
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int SEC4_ioctl(int, register int, register void *);
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/* Driver's top level ISR handler */
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void InterruptServiceRoutine(t_Handle h_App,
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void* p_JobDesc,
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t_Handle h_Context,
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uint32_t jobStatus);
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/* ISR's Deferred processing (bottom half) handler */
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extern void ProcessingComplete(void);
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#ifdef SEC4_POLLED_MODE
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extern void PollComplete(void);
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#endif
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/* Take a user request, build a job descriptor, and submit it for processing */
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int ProcessRequest(GENERIC_REQ *req, int callingTaskId);
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/* Get current values of SEC4 status registers. */
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int GetStatus(STATUS_REQ *pStatus, int callingTaskId);
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#ifdef SEC4_USE_QI
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int SEC4_ipsec_esp_encrypt(uint16_t sa_index, uint8_t *buf, uint16_t inOffset, uint16_t pktlen,
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uint16_t outOffset, uint8_t poolId);
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int SEC4_ipsec_esp_decrypt(uint16_t sa_index, uint8_t *buf, uint16_t inOffset, uint16_t pktlen,
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uint16_t outOffset, uint8_t poolId);
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void SEC4_qportal_set(void *qportal);
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void SEC4_bportal_set(void *bportal, uint32_t poolId);
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void SEC4_qman_enqueue_fqix_base_set(uint32_t ixBase);
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void SEC4_qman_dequeue_fqix_set(uint32_t ixBaseEncrypt, uint32_t ixBaseDecrypt);
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int SEC4_populate_sa(uint32_t spi, uint8_t ipsecVer, uint8_t proto,
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e_IpsecAuthenAlg authAlg, e_IpsecCryptoAlg cryptoAlg,
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uint8_t *authKey, uint8_t authKeySize, uint8_t *cryptoKey,
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uint8_t cryptoKeySize, uint8_t *iv, uint16_t sa_index, int enc);
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void SEC4_ipsec_set_sa_cache_size(uint32_t noofEntries);
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void SEC4_ipsec_set_shm(void *p, uint32_t size);
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#endif /* SEC4_USE_QI */
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#endif /* SEC4DRIVER_H */
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