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neelimap
2026-07-30 11:19:44 +05:30
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commit afc7070c1f
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components/ip_net2-6.9/ipfreescale/sec2/1_2/Sec2.h
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components/ip_net2-6.9/ipfreescale/sec2/1_2/Sec2Descriptors.h
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/****************************************************************************
* Sec2Descriptors.h - Descriptor construction definitions for the SEC2.x
* security processing core family
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2000. All rights reserved
* Copyright (c) 2003, 2004 Motorola Inc., Freescale Semiconductor
* Copyright (c) 2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor. and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/*
* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* May 24,2003 sec - update types for ECC operations
* Aug 23,2003 sec - add TLS support
* Nov 22,2004 sec - merge in Linux changes
* Jan 17,2004 sec - change header for outbound CCMP requests
* 1.2 Jan 27,2005 sec - delete and typedef some obsolete names, remove
* nonpad IPSec types
*/
/*
* Header constants for AESA_CRYPT_REQ / DPD_AESA_CRYPT_GROUP
* Note that CCM and SRT modes are not handled by this request type,
* they are deployed in the SRTP and CCMP request types.
* Basic AES ECB, CBC, and counter mode are handled here.
*/
const unsigned long AesaDesc[1*NUM_AESA_CRYPT_DESC] = {
/* DPD_AESA_CBC_ENCRYPT_CRYPT OpId 0x6000 */
/* CM = 1 (cbc), encrypt on */
/* desc type = 2 (common, nosnoop) */
0x60300010,
/* DPD_AESA_CBC_DECRYPT_CRYPT OpId 0x6001 */
/* CM = 1 (cbc), encrypt off */
/* desc type = 2 (common, nosnoop) */
0x60200010,
/* DPD_AESA_CBC_DECRYPT_CRYPT_RDK OpId 0x6002 */
/* RDK = noexpand, CM = 1 (cbc), encrypt off */
/* desc type = 2 (common, nosnoop) */
0x60a00010,
/* DPD_AESA_ECB_ENCRYPT_CRYPT OpId 0x6003 */
/* CM = 0 (ecb), encrypt on */
/* desc type = 2 (common, nosnoop) */
0x60100010,
/* DPD_AESA_ECB_DECRYPT_CRYPT_RDK OpId 0x6004 */
/* CM = 0 (ecb), encrypt off */
/* desc type = 2 (common, nosnoop) */
0x60000010,
/* DPD_AESA_ECB_DECRYPT_CRYPT OpId 0x6005 */
/* RDK = noexpand, CM = 1 (ecb), encrypt off */
/* desc type = 2 (common, nosnoop) */
0x60800010,
/* DPD_AESA_CTR_CRYPT OpId 0x6006 */
/* CM = 2 (ctr), encrypt off */
/* desc type = 2 (common, nosnoop) */
0x60600010,
/* DPD_AESA_CTR_HMAC OpId 0x6007 */
/* CM = 2 (ctr), encrypt off */
/* desc type = 24 (HMAC-snoop) */
0x606000c0,
};
/*
* Header constants for RNG_REQ / DPD_RNG_GROUP
*/
const unsigned long RngDesc[1*NUM_RNGA_DESC] = {
/* DPD_RNG_GETRN Req OpId 0x1000 */
0x40000010
};
/*
* Header constants for DES_CBC_CRYPT_REQ / DPD_DES_CBC_GROUP
*/
const unsigned long DesCbcReq[1 * NUM_DES_CBC_DESC] = {
/* DPD_SDES_CBC_CTX_ENCRYPT Req OpId 0x2500 */
0x20500010,
/* DPD_SDES_CBC_CTX_DECRYPT Req OpId 0x2501 */
0x20400010,
/* DPD_TDES_CBC_CTX_ENCRYPT Req OpId 0x2502 */
0x20700010,
/* DPD_TDES_CBC_CTX_DECRYPT Req OpId 0x2503 */
0x20600010
};
/*
* Header constants for DES_CRYPT_REQ / DPD_DES_ECB_GROUP
*/
const unsigned long DesReq[1*NUM_DES_DESC] = {
/* DPD_SDES_ECB_ENCRYPT Req OpId 0x2600 */
0x20100010,
/* DPD_SDES_ECB_DECRYPT Req OpId 0x2601 */
0x20000010,
/* DPD_TDES_ECB_ENCRYPT Req OpId 0x2602 */
0x20300010,
/* DPD_TDES_ECB_DECRYPT Req OpId 0x2603 */
0x20200010
};
/*
* Header constants for
* ARC4_LOADCTX_CRYPT_REQ / DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP
*/
const unsigned long Rc4LoadCtxUnloadCtxReq[1*NUM_RC4_LOADCTX_UNLOADCTX_DESC] = {
/* DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP OpId 0x3400 */
0x10700050
};
/*
* Header constants for
* ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ / DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP
*/
const unsigned long Rc4LoadKeyUnloadCtxReq[1*NUM_RC4_LOADKEY_UNLOADCTX_DESC] = {
/* DPD_RC4_LDKEY_CRYPT_ULCTX Req OpId 0x3500 */
0x10200050
};
/*
* Header constants for HASH_REQ / DPD_HASH_LDCTX_HASH_ULCTX_GROUP
*/
const unsigned long MdhaReq[1*NUM_MDHA_DESC] = {
/* DPD_SHA256_LDCTX_HASH_ULCTX OpId 0x4400 */
0x30100010,
/* DPD_MD5_LDCTX_HASH_ULCTX OpId 0x4401 */
0x30200010,
/* DPD_SHA_LDCTX_HASH_ULCTX OpId 0x4402 */
0x30000010,
/* DPD_SHA256_LDCTX_IDGS_HASH_ULCTX OpId 0x4403 */
0x31100010,
/* DPD_MD5_LDCTX_IDGS_HASH_ULCTX OpId 0x4404 */
0x31200010,
/* DPD_SHA_LDCTX_IDGS_HASH_ULCTX OpId 0x4405 */
0x31000010,
/* DPD_SHA256_CONT_HASH_ULCTX OpId 0x4406 */
0x38100010,
/* DPD_MD5_CONT_HASH_ULCTX OpId 0x4407 */
0x38200010,
/* DPD_SHA_CONT_HASH_ULCTX OpId 0x4408 */
0x38000010
};
/*
* Header constants for HASH_REQ / DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP
*/
const unsigned long MdhaPadReq[1*NUM_MDHA_PAD_DESC] = {
/* DPD_SHA256_LDCTX_HASH_PAD_ULCTX OpId 0x4500 */
0x30500010,
/* DPD_MD5_LDCTX_HASH_PAD_ULCTX OpId 0x4501 */
0x30600010,
/* DPD_SHA_LDCTX_HASH_PAD_ULCTX OpId 0x4502 */
0x30400010,
/* DPD_SHA256_LDCTX_IDGS_HASH_PAD_ULCTX OpId 0x4503 */
0x31500010,
/* DPD_MD5_LDCTX_IDGS_HASH_PAD_ULCTX OpId 0x4504 */
0x31600010,
/* DPD_SHA_LDCTX_IDGS_HASH_PAD_ULCTX OpId 0x4505 */
0x31400010,
/* DPD_SHA256_CONT_HASH_PAD_ULCTX OpId 0x4506 */
0x38500010,
/* DPD_MD5_CONT_HASH_PAD_ULCTX OpId 0x4507 */
0x38600010,
/* DPD_SHA_CONT_HASH_PAD_ULCTX OpId 0x4508 */
0x38400010
};
/*
* Header constants for HMAC_PAD_REQ / DPD_HASH_LDCTX_HMAC_ULCTX_GROUP
*/
/* NOTE: The MD4 Descriptors are no longer supported */
const unsigned long HmacPadReq[1*NUM_HMAC_PAD_DESC] = {
/* DPD_SHA256_LDCTX_HMAC_ULCTX Req OpId 0x4a00 */
0x31900010,
/* DPD_MD5_LDCTX_HMAC_ULCTX Req OpId 0x4a01 */
0x31A00010,
/* DPD_SHA_LDCTX_HMAC_ULCTX Req OpId 0x4a02 */
0x31800010,
/* DPD_SHA256_LDCTX_HMAC_PAD_ULCTX Req OpId 0x4a03 */
0x31D00010,
/* DPD_MD5_LDCTX_HMAC_PAD_ULCTX Req OpId 0x4a04 */
0x31E00010,
/* DPD_SHA_LDCTX_HMAC_PAD_ULCTX Req OpId 0x4a05 */
0x31C00010,
};
/*
* Header constants for MOD_EXP_REQ DPD_MM_LDCTX_EXP_ULCTX_GROUP
*/
const unsigned long PkhaMmExpReq[1*NUM_MM_EXP_DESC] = {
/* DPD_MM_LDCTX_EXP_ULCTX Req OpId 0x5100 */
0x50200080
};
/*
* Header constants for MOD_SS_EXP_REQ / DPD_MM_SS_RSA_EXP
*/
const unsigned long PkhaMmSsExpReq[1*NUM_MM_SS_EXP_DESC] = {
/* DPD_MM_SS_RSA_EXP Req OpId 0x5b00 */
0x58000080
};
/*
* Header constants for MOD_R2MODN_REQ / DPD_MM_LDCTX_R2MODN_ULCTX_GROUP
*/
const unsigned long PkhaModR2modnReq[1 * NUM_MOD_R2MODN_DESC] = {
/* DPD_MM_LDCTX_R2MODN_ULCTX Req OpId 0x5200 */
0x50300080
};
/*
* Header constants for MOD_RRMODP_REQ / DPD_MM_LDCTX_RRMODP_ULCTX_GROUP
*/
const unsigned long PkhaMmRrmodpReq[1*NUM_MM_RRMODP_DESC] = {
/* DPD_MM_LDCTX_RRMODP_ULCTX Req OpId 0x5300 */
0x50400080
};
/*
* Header constants for MOD_2OP_REQ / DPD_MM_LDCTX_2OP_ULCTX_GROUP
*/
const unsigned long PkhaMod2OpReq[1 * NUM_MOD_2OP_DESC] = {
/* DPD_MOD_LDCTX_MUL1_ULCTX Req OpId 0x5400 */
0x53000080,
/* DPD_MOD_LDCTX_MUL2_ULCTX Req OpId 0x5401 */
0x54000080,
/* DPD_MOD_LDCTX_ADD_ULCTX Req OpId 0x5402 */
0x51000080,
/* DPD_MOD_LDCTX_SUB_ULCTX Req OpId 0x5403 */
0x52000080,
/* DPD_POLY_LDCTX_A0_B0_MUL1_ULCTX Req OpId 0x5404 */
0x56000080,
/* DPD_POLY_LDCTX_A0_B0_MUL2_ULCTX Req OpId 0x5405 */
0x57000080,
/* DPD_POLY_LDCTX_A0_B0_ADD_ULCTX Req OpId 0x5406 */
0x55000080,
/* DPD_POLY_LDCTX_A1_B0_MUL1_ULCTX Req OpId 0x5407 */
0x56400080,
/* DPD_POLY_LDCTX_A1_B0_MUL2_ULCTX Req OpId 0x5408 */
0x57400080,
/* DPD_POLY_LDCTX_A1_B0_ADD_ULCTX Req OpId 0x5409 */
0x55400080,
/* DPD_POLY_LDCTX_A2_B0_MUL1_ULCTX Req OpId 0x540a */
0x56800080,
/* DPD_POLY_LDCTX_A2_B0_MUL2_ULCTX Req OpId 0x540b */
0x57800080,
/* DPD_POLY_LDCTX_A2_B0_ADD_ULCTX Req OpId 0x540c */
0x55800080,
/* DPD_POLY_LDCTX_A3_B0_MUL1_ULCTX Req OpId 0x540d */
0x56c00080,
/* DPD_POLY_LDCTX_A3_B0_MUL2_ULCTX Req OpId 0x540e */
0x57c00080,
/* DPD_POLY_LDCTX_A3_B0_ADD_ULCTX Req OpId 0x540f */
0x55c00080,
/* DPD_POLY_LDCTX_A0_B1_MUL1_ULCTX Req OpId 0x5410 */
0x56100080,
/* DPD_POLY_LDCTX_A0_B1_MUL2_ULCTX Req OpId 0x5411 */
0x57100080,
/* DPD_POLY_LDCTX_A0_B1_ADD_ULCTX Req OpId 0x5412 */
0x55100080,
/* DPD_POLY_LDCTX_A1_B1_MUL1_ULCTX Req OpId 0x5413 */
0x56500080,
/* DPD_POLY_LDCTX_A1_B1_MUL2_ULCTX Req OpId 0x5414 */
0x57500080,
/* DPD_POLY_LDCTX_A1_B1_ADD_ULCTX Req OpId 0x5415 */
0x55500080,
/* DPD_POLY_LDCTX_A2_B1_MUL1_ULCTX Req OpId 0x5416 */
0x56900080,
/* DPD_POLY_LDCTX_A2_B1_MUL2_ULCTX Req OpId 0x5417 */
0x57900080,
/* DPD_POLY_LDCTX_A2_B1_ADD_ULCTX Req OpId 0x5418 */
0x55900080,
/* DPD_POLY_LDCTX_A3_B1_MUL1_ULCTX Req OpId 0x5419 */
0x56d00080,
/* DPD_POLY_LDCTX_A3_B1_MUL2_ULCTX Req OpId 0x541a */
0x57d00080,
/* DPD_POLY_LDCTX_A3_B1_ADD_ULCTX Req OpId 0x541b */
0x55d00080,
/* DPD_POLY_LDCTX_A0_B2_MUL1_ULCTX Req OpId 0x541c */
0x56200080,
/* DPD_POLY_LDCTX_A0_B2_MUL2_ULCTX Req OpId 0x541d */
0x57200080,
/* DPD_POLY_LDCTX_A0_B2_ADD_ULCTX Req OpId 0x541e */
0x55200080,
/* DPD_POLY_LDCTX_A1_B2_MUL1_ULCTX Req OpId 0x541f */
0x56600080,
/* DPD_POLY_LDCTX_A1_B2_MUL2_ULCTX Req OpId 0x5420 */
0x57600080,
/* DPD_POLY_LDCTX_A1_B2_ADD_ULCTX Req OpId 0x5421 */
0x55600080,
/* DPD_POLY_LDCTX_A2_B2_MUL1_ULCTX Req OpId 0x5422 */
0x56a00080,
/* DPD_POLY_LDCTX_A2_B2_MUL2_ULCTX Req OpId 0x5423 */
0x57a00080,
/* DPD_POLY_LDCTX_A2_B2_ADD_ULCTX Req OpId 0x5424 */
0x55a00080,
/* DPD_POLY_LDCTX_A3_B2_MUL1_ULCTX Req OpId 0x5425 */
0x56e00080,
/* DPD_POLY_LDCTX_A3_B2_MUL2_ULCTX Req OpId 0x5426 */
0x57e00080,
/* DPD_POLY_LDCTX_A3_B2_ADD_ULCTX Req OpId 0x5427 */
0x55e00080,
/* DPD_POLY_LDCTX_A0_B3_MUL1_ULCTX Req OpId 0x5428 */
0x56300080,
/* DPD_POLY_LDCTX_A0_B3_MUL2_ULCTX Req OpId 0x5429 */
0x57300080,
/* DPD_POLY_LDCTX_A0_B3_ADD_ULCTX Req OpId 0x542a */
0x55300080,
/* DPD_POLY_LDCTX_A1_B3_MUL1_ULCTX Req OpId 0x542b */
0x56700080,
/* DPD_POLY_LDCTX_A1_B3_MUL2_ULCTX Req OpId 0x542c */
0x57700080,
/* DPD_POLY_LDCTX_A1_B3_ADD_ULCTX Req OpId 0x542d */
0x55700080,
/* DPD_POLY_LDCTX_A2_B3_MUL1_ULCTX Req OpId 0x542e */
0x56b00080,
/* DPD_POLY_LDCTX_A2_B3_MUL2_ULCTX Req OpId 0x542f */
0x57b00080,
/* DPD_POLY_LDCTX_A2_B3_ADD_ULCTX Req OpId 0x5430 */
0x55b00080,
/* DPD_POLY_LDCTX_A3_B3_MUL1_ULCTX Req OpId 0x5431 */
0x56f00080,
/* DPD_POLY_LDCTX_A3_B3_MUL2_ULCTX Req OpId 0x5432 */
0x57f00080,
/* DPD_POLY_LDCTX_A3_B3_ADD_ULCTX Req OpId 0x5433 */
0x55f00080
};
/*
* Header constants for ECC_POINT_REQ / DPD_EC_LDCTX_kP_ULCTX_GROUP
* These descriptors use the "packed" format
*/
const unsigned long PkhaEccPointReq[1*NUM_EC_POINT_DESC] = {
/* DPD_EC_FP_AFF_PT_MULT OpId 0x5800 */
0x50500048,
/* DPD_EC_FP_PROJ_PT_MULT OpId 0x5801 */
0x50700048,
/* DPD_EC_F2M_AFF_PT_MULT OpId 0x5802 */
0x50600048,
/* DPD_EC_F2M_PROJ_PT_MULT OpId 0x5803 */
0x50800048,
/* DPD_EC_FP_LDCTX_ADD_ULCTX OpId 0x5804 */
0x50900048,
/* DPD_EC_FP_LDCTX_DOUBLE_ULCTX OpId 0x5805 */
0x50a00048,
/* DPD_EC_F2M_LDCTX_ADD_ULCTX OpId 0x5806 */
0x50b00048,
/* DPD_EC_F2M_LDCTX_DOUBLE_ULCTX OpId 0x5807 */
0x50c00048
};
/*
* Header constants for ECC_2OP_REQ / DPD_EC_2OP_GROUP
*/
const unsigned long PkhaEcc2OpReq[1*NUM_EC_2OP_DESC] = {
/* DPD_EC_F2M_LDCTX_MUL1_ULCTX Req OpId 0x5900 */
0x50800048
};
/*
* Header constants for ECC_SPKBUILD_REQ / DPD_EC_SPKBUILD_GROUP
*/
const unsigned long PkhaEccSpkbuildReq[1*NUM_EC_SPKBUILD_DESC] =
{
/* DPD_EC_SPKBUILD Req OpId 0x5c00 */
0x5ff00038
};
/*
* Header constants for ECC_PTADD_DBL
*/
const unsigned long PkhaEccPtaddDblReq[1 * NUM_EC_PTADD_DBL_DESC] =
{
/* DPD_EC_FPADD Req OpId 0x5d00 */
0x50900058,
/* DPD_EC_FPDBL Req OpId 0x5d01 */
0x50a00058,
/* DPD_EC_F2MADD Req OpId 0x5d02 */
0x50b00058,
/* DPD_EC_F2MDBL Req OpId 0x5d03 */
0x50c00058
};
/*
* Header constants for IPSEC_CBC_REQ / DPD_IPSEC_CBC_GROUP
*/
const unsigned long IpsecCbcReq[1*NUM_IPSEC_CBC_DESC] = {
/* DPD_IPSEC_CBC_SDES_ENCRYPT_MD5_PAD OpId 0x7000 */
0x20531e20,
/* DPD_IPSEC_CBC_SDES_ENCRYPT_SHA_PAD OpId 0x7001 */
0x20531c20,
/* DPD_IPSEC_CBC_SDES_ENCRYPT_SHA256_PAD OpId 0x7002 */
0x20531d20,
/* DPD_IPSEC_CBC_SDES_DECRYPT_MD5_PAD OpId 0x7003 */
0x20431e22,
/* DPD_IPSEC_CBC_SDES_DECRYPT_SHA_PAD OpId 0x7004 */
0x20431c22,
/* DPD_IPSEC_CBC_SDES_DECRYPT_SHA256_PAD OpId 0x7005 */
0x20431d22,
/* DPD_IPSEC_CBC_TDES_ENCRYPT_MD5_PAD OpId 0x7006 */
0x20731e20,
/* DPD_IPSEC_CBC_TDES_ENCRYPT_SHA_PAD OpId 0x7007 */
0x20731c20,
/* DPD_IPSEC_CBC_TDES_ENCRYPT_SHA256_PAD OpId 0x7008 */
0x20731d20,
/* DPD_IPSEC_CBC_TDES_DECRYPT_MD5_PAD OpId 0x7009 */
0x20631e22,
/* DPD_IPSEC_CBC_TDES_DECRYPT_SHA_PAD OpId 0x700a */
0x20631c22,
/* DPD_IPSEC_CBC_TDES_DECRYPT_SHA256_PAD OpId 0x700b */
0x20631d22
};
/*
* Header constants for IPSEC_ECB_REQ / DPD_IPSEC_ECB_GROUP
*/
const unsigned long IpsecEcbReq[1*NUM_IPSEC_ECB_DESC] = {
/* DPD_IPSEC_ECB_SDES_ENCRYPT_MD5_PAD OpId 0x7100 */
0x20131e20,
/* DPD_IPSEC_ECB_SDES_ENCRYPT_SHA_PAD OpId 0x7101 */
0x20131c20,
/* DPD_IPSEC_ECB_SDES_ENCRYPT_SHA256_PAD OpId 0x7102 */
0x20131d20,
/* DPD_IPSEC_ECB_SDES_DECRYPT_MD5_PAD OpId 0x7103 */
0x20031e22,
/* DPD_IPSEC_ECB_SDES_DECRYPT_SHA_PAD OpId 0x7104 */
0x20031c22,
/* DPD_IPSEC_ECB_SDES_DECRYPT_SHA256_PAD OpId 0x7105 */
0x20031d22,
/* DPD_IPSEC_ECB_TDES_ENCRYPT_MD5_PAD OpId 0x7106 */
0x20331e20,
/* DPD_IPSEC_ECB_TDES_ENCRYPT_SHA_PAD OpId 0x7107 */
0x20331c20,
/* DPD_IPSEC_ECB_TDES_ENCRYPT_SHA256_PAD OpId 0x7108 */
0x20331d20,
/* DPD_IPSEC_ECB_TDES_DECRYPT_MD5_PAD OpId 0x7109 */
0x20231e22,
/* DPD_IPSEC_ECB_TDES_DECRYPT_SHA_PAD OpId 0x710a */
0x20231c22,
/* DPD_IPSEC_ECB_TDES_DECRYPT_SHA256_PAD OpId 0x710b */
0x20231d22
};
/*
* Header constants for IPSEC_AES_CBC_REQ / DPD_IPSEC_AES_CBC_GROUP
*/
const unsigned long IpsecAesCbcReq[1*NUM_IPSEC_AES_CBC_DESC] = {
/* DPD_IPSEC_AES_CBC_ENCRYPT_MD5_APAD OpId 0x8000 */
0x60331E20,
/* DPD_IPSEC_AES_CBC_ENCRYPT_SHA_APAD OpId 0x8001 */
0x60331C20,
/* DDPD_IPSEC_AES_CBC_ENCRYPT_SHA256_APAD OpId 0x8002 */
0x60331D20,
/* DPD_IPSEC_AES_CBC_ENCRYPT_MD5 OpId 0x8003 */
0x60331a20,
/* DPD_IPSEC_AES_CBC_ENCRYPT_SHA OpId 0x8004 */
0x60331820,
/* DDPD_IPSEC_AES_CBC_ENCRYPT_SHA256 OpId 0x8005 */
0x60331920,
/* DPD_IPSEC_AES_CBC_DECRYPT_MD5_APAD OpId 0x8006 */
0x60231e22,
/* DPD_IPSEC_AES_CBC_DECRYPT_SHA_APAD OpId 0x8007 */
0x60231c22,
/* DDPD_IPSEC_AES_CBC_DECRYPT_SHA256_APAD OpId 0x8008 */
0x60231d22,
/* DPD_IPSEC_AES_CBC_DECRYPT_MD5 OpId 0x8009 */
0x60231a22,
/* DPD_IPSEC_AES_CBC_DECRYPT_SHA OpId 0x800a */
0x60231822,
/* DDPD_IPSEC_AES_CBC_DECRYPT_SHA256 OpId 0x800b */
0x60231922
};
/*
* Header constants for IPSEC_AES_ECB_REQ / DPD_IPSEC_AES_ECB_GROUP
*/
const unsigned long IpsecAesEcbReq[1*NUM_IPSEC_AES_ECB_DESC] = {
/* DPD_IPSEC_AES_ECB_ENCRYPT_MD5_APAD OpId 0x8100 */
0x60131E20,
/* DPD_IPSEC_AES_ECB_ENCRYPT_SHA_APAD OpId 0x8101 */
0x60131C20,
/* DDPD_IPSEC_AES_ECB_ENCRYPT_SHA256_APAD OpId 0x8102 */
0x60131D20,
/* DPD_IPSEC_AES_ECB_ENCRYPT_MD5 OpId 0x8103 */
0x60131a20,
/* DPD_IPSEC_AES_ECB_ENCRYPT_SHA OpId 0x8104 */
0x60131820,
/* DDPD_IPSEC_AES_ECB_ENCRYPT_SHA256 OpId 0x8105 */
0x60131920,
/* DPD_IPSEC_AES_ECB_DECRYPT_MD5_APAD OpId 0x8106 */
0x60031e22,
/* DPD_IPSEC_AES_ECB_DECRYPT_SHA_APAD OpId 0x8107 */
0x60031c22,
/* DDPD_IPSEC_AES_ECB_DECRYPT_SHA256_APAD OpId 0x8108 */
0x60031d22,
/* DPD_IPSEC_AES_ECB_DECRYPT_MD5 OpId 0x8109 */
0x60031a22,
/* DPD_IPSEC_AES_ECB_DECRYPT_SHA OpId 0x810a */
0x60031822,
/* DDPD_IPSEC_AES_ECB_DECRYPT_SHA256 OpId 0x810b */
0x60031922
};
/*
* Header constants for IPSEC_ESP_REQ / DPD_IPSEC_ESP_GROUP
*/
const unsigned long IpsecEspReq[1*NUM_IPSEC_ESP_DESC] = {
/* DPD_IPSEC_ESP_OUT_SDES_ECB_CRPT_MD5_PAD OpId 0x7500 */
0x20131e08,
/* DPD_IPSEC_ESP_OUT_SDES_ECB_CRPT_SHA_PAD OpId 0x7501 */
0x20131c08,
/* DPD_IPSEC_ESP_OUT_SDES_ECB_CRPT_SHA256_PAD OpId 0x7502 */
0x20131d08,
/* DPD_IPSEC_ESP_IN_SDES_ECB_DCRPT_MD5_PAD OpId 0x7503 */
0x20031e0a,
/* DPD_IPSEC_ESP_IN_SDES_ECB_DCRPT_SHA_PAD OpId 0x7504 */
0x20031c0a,
/* DPD_IPSEC_ESP_IN_SDES_ECB_DCRPT_SHA256_PAD OpId 0x7505 */
0x20031d0a,
/* DPD_IPSEC_ESP_OUT_SDES_CBC_CRPT_MD5_PAD OpId 0x7506 */
0x20531e08,
/* DPD_IPSEC_ESP_OUT_SDES_CBC_CRPT_SHA_PAD OpId 0x7507 */
0x20531c08,
/* DPD_IPSEC_ESP_OUT_SDES_CBC_CRPT_SHA256_PAD OpId 0x7508 */
0x20531d08,
/* DPD_IPSEC_ESP_IN_SDES_CBC_DCRPT_MD5_PAD OpId 0x7509 */
0x20431e0a,
/* DPD_IPSEC_ESP_IN_SDES_CBC_DCRPT_SHA_PAD OpId 0x750a */
0x20431c0a,
/* DPD_IPSEC_ESP_IN_SDES_CBC_DCRPT_SHA256_PAD OpId 0x750b */
0x20431d0a,
/* DPD_IPSEC_ESP_OUT_TDES_CBC_CRPT_MD5_PAD OpId 0x750c */
0x20731e08,
/* DPD_IPSEC_ESP_OUT_TDES_CBC_CRPT_SHA_PAD OpId 0x750d */
0x20731c08,
/* DPD_IPSEC_ESP_OUT_TDES_CBC_CRPT_SHA256_PAD OpId 0x750e */
0x20731d08,
/* DPD_IPSEC_ESP_IN_TDES_CBC_DCRPT_MD5_PAD OpId 0x750f */
0x20631e0a,
/* DPD_IPSEC_ESP_IN_TDES_CBC_DCRPT_SHA_PAD OpId 0x7510 */
0x20631c0a,
/* DPD_IPSEC_ESP_IN_TDES_CBC_DCRPT_SHA256_PAD OpId 0x7511 */
0x20631d0a,
/* DPD_IPSEC_ESP_OUT_TDES_ECB_CRPT_MD5_PAD OpId 0x7512 */
0x20331e08,
/* DPD_IPSEC_ESP_OUT_TDES_ECB_CRPT_SHA_PAD OpId 0x7513 */
0x20331c08,
/* DPD_IPSEC_ESP_OUT_TDES_ECB_CRPT_SHA256_PAD OpId 0x7514 */
0x20331d08,
/* DPD_IPSEC_ESP_IN_TDES_ECB_DCRPT_MD5_PAD OpId 0x7515 */
0x20231e0a,
/* DPD_IPSEC_ESP_IN_TDES_ECB_DCRPT_SHA_PAD OpId 0x7516 */
0x20231c0a,
/* DPD_IPSEC_ESP_IN_TDES_ECB_DCRPT_SHA256_PAD OpId 0x7517 */
0x20231d0a
};
/*
* Header constants for CCMP_REQ / DPD_CCMP_GROUP
*/
const unsigned long CcmpReq[1*NUM_CCMP_DESC] = {
/* DPD_802_11_CCMP_OUTBOUND OpId 0x6500 */
0x6b100018,
/* DPD_802_11_CCMP_INBOUND OpId 0x6501) */
0x6b00001a
};
/*
* Header constants for SRTP_REQ / DPD_SRTP_GROUP
*/
const unsigned long SrtpReq[1*NUM_SRTP_DESC] = {
/* DPD_SRTP_OUTBOUND OpId 0x8500 */
0x60631c28,
/* DPD_SRTP_INBOUND OpId 0x8501 */
0x60631c2a
};
/*
* Header constants for KEA_CRYPT_REQ / DPD_KEA_CRYPT_GROUP
*/
const unsigned long KeaReq[1 * NUM_KEA_CRYPT_DESC] = {
/* DPD_KEA_f8_UPLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 0) OpId 0xa000 */
0x71800010,
/* DPD_KEA_f8_DOWNLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 1) OpId 0xa000 */
0x71c00010,
/* DPD_KEA_f9_UPLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 2) OpId 0xa000 */
0x71a00010,
/* DPD_KEA_f9_DOWNLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 3) OpId 0xa000 */
0x71e00010,
};
/*
* Header constants for TLS_BLOCK_INBOUND_REQ / DPD_TLS_BLOCK_INBOUND_GROUP
*/
const unsigned long TlsBlockInboundReq[1 * NUM_TLS_BLOCK_INBOUND_DESC] = {
/* DPD_TLS_BLOCK_INBOUND OpId 0x9000 */
0x00000000
};
/*
* Header constants for TLS_BLOCK_OUTBOUND_REQ / DPD_TLS_BLOCK_OUTBOUND_GROUP
*/
const unsigned long TlsBlockOutboundReq[1 * NUM_TLS_BLOCK_OUTBOUND_DESC] = {
/* DPD_TLS_BLOCK_OUTBOUND OpId 0x9100 */
0x00000000
};
/*
* Header constants for TLS_STREAM_INBOUND_REQ / DPD_TLS_STREAM_INBOUND_GROUP
*/
const unsigned long TlsStreamInboundReq[1 * NUM_TLS_STREAM_INBOUND_DESC] = {
/* DPD_TLS_STREAM_INBOUND OpId 0x9200 */
0x00000000
};
/*
* Header constants for TLS_STREAM_OUTBOUND_REQ / DPD_TLS_STREAM_OUTBOUND_GROUP
*/
const unsigned long TlsStreamOutboundReq[1 * NUM_TLS_STREAM_OUTBOUND_DESC] = {
/* DPD_TLS_STREAM_OUTBOUND OpId 0x9300 */
0x00000000
};
components/ip_net2-6.9/ipfreescale/sec2/1_2/Sec2Driver.h
+1352
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File diff suppressed because it is too large Load Diff
components/ip_net2-6.9/ipfreescale/sec2/1_2/Sec2Notify.h
+138
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@@ -0,0 +1,138 @@
/****************************************************************************
* Sec2Notify.h - ISR register transfer definitions for the SEC2.x
* security core family
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2000. All rights reserved
* Copyright (c) 2003-2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/*
* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* 1.1.0 Nov 22,2004 sec - move GENERIC_REQ to global header out of necessity
* 1.2 Jan 27,2005
*/
#ifndef SEC2NOTIFY_H
#define SEC2NOTIFY_H
/*! \struct STATUS_REQ
\brief structure used to indicate the state of the SEC2 as well as the
driver. Returned as a pointer by GetStatus() and imbedded in all
requests.
*/
typedef struct
{
unsigned long ChaAssignmentStatusRegister[2]; /*!< A copy of the contents of
\b ChaAssignmentStatusRegister
register in SEC2Driver.h
*/
unsigned long InterruptControlRegister[2]; /*!< A copy of the contents of
\b InterruptControlRegister
register in SEC2Driver.h
*/
unsigned long InterruptStatusRegister[2]; /*!< A copy of the contents of
\b InterruptStatusRegister
register in SEC2Driver.h
*/
unsigned long IdRegister; /*!< A copy of the contents of
\b IdRegister
register in SEC2Driver.h
*/
unsigned long ChannelStatusRegister[NUM_CHANNELS][2]; /*!< A copy of the contents of
the \b ChannelPointerStatusRegister"s"
registers in SEC2Driver.h
*/
unsigned long ChannelConfigurationRegister[NUM_CHANNELS][2]; /*!< A copy of the contents of
the \b ChannelConfigRegister"s"
registers in SEC2Driver.h
*/
unsigned long CHAInterruptStatusRegister[NUM_CHAS][2]; /*!< A copy of the contents of
the \b ChaInterruptStatusRegister"s"
registers in SEC2Driver.h
*/
unsigned long QueueEntryDepth; /*!< A copy of the
\b QueueEntryDepth global
in SEC2Driver.h
*/
unsigned long FreeChannels; /*!< A copy of the
\b FreeChannels global
in SEC2Driver.h
*/
unsigned long FreeRngas; /*!< A copy of the
\b FreeRngas global
in SEC2Driver.h
*/
unsigned long FreeAfhas; /*!< A copy of the
\b FreeAfhas global
in SEC2Driver.h
*/
unsigned long FreeDesas; /*!< A copy of the
\b FreeDesas global
in SEC2Driver.h
*/
unsigned long FreeMdhas; /*!< A copy of the
\b FreeMdhas global
in SEC2Driver.h
*/
unsigned long FreePkhas; /*!< A copy of the
\b FreePkhas global
in SEC2Driver.h
*/
unsigned long FreeAesas; /*!< A copy of the
\b FreeAesa global
in SEC2Driver.h
*/
unsigned long FreeKeas; /*!< A copy of the
\b FreeKeas global
in SEC2Driver.h
*/
unsigned long BlockSize; /*!< A copy of the
\b BlockSize global
in SEC2Driver.h
*/
} STATUS_REQ;
typedef STATUS_REQ SEC2_STATUS;
typedef void* PSEC2_NOTIFY_CTX;
/*! \struct SEC2_NOTIFY_ON_ERROR_CTX
\brief structure used in all requests to indicate the nature
of errors.
*/
typedef struct
{
unsigned long errorcode; /*!< Error that
the request generated
*/
void *request; /*!< Pointer to
original request
*/
STATUS_REQ driverstatus; /*!< Detailed information
as to the state of the
hardware and the driver
at the time of an error
*/
} SEC2_NOTIFY_ON_ERROR_CTX, *PSEC2_NOTIFY_ON_ERROR_CTX;
typedef void (*PSEC2_NOTIFY_ROUTINE) (PSEC2_NOTIFY_CTX pCtx);
typedef void (*PSEC2_NOTIFY_ON_ERROR_ROUTINE) (PSEC2_NOTIFY_ON_ERROR_CTX pErrCtx);
#endif
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_cha.c
+332
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@@ -0,0 +1,332 @@
/****************************************************************************
* sec2_cha.c - Channel/CHA operations code for SEC2 Driver
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
* Copyright (c) 2003, 2004 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/* Revision History:
* 1.0 Aug 24,2003 dgs adapted from the final version of mpc18x
* 1.1.0 Nov 15,2004 sec - merge linux changes from prior versions
* 1.2 Jan 27,2005
*/
#include "Sec2Driver.h"
/* Interpeak begin */
#undef NUM_CHANNELS
#define NUM_CHANNELS (num_channels)
extern int num_channels;
/* Interpeak end */
int ReleaseCha(unsigned long channelCha, int callingTaskId, BOOLEAN locked);
/****************************************************************/
/* Function Name: ChaNumToType */
/* Purpose: To translate the the CHA number to the CHA chaType */
/* Input: cha - CHA Number */
/* Output: ChaType */
/****************************************************************/
int ChaNumToType(int cha)
{
switch (cha)
{
case CHA_AFHA:
return (CHA_AFHA);
case CHA_DES:
return (CHA_DES);
case CHA_MDHA:
return (CHA_MDHA);
case CHA_RNG:
return (CHA_RNG);
case CHA_PKHA:
return (CHA_PKHA);
case CHA_AESA:
return (CHA_AESA);
default:
return (SEC2_INVALID_CHA_TYPE);
}
} /* End of ChaNumToType */
/* this should only be called with channel assignments locked */
/********************************************************************/
/* Function Name: CheckChas */
/* Purpose: Check to see if the CHA is available (at least one of */
/* this type of CHA is available) */
/* Input: The opId requested */
/* Output: SEC2_SUCCESS if this type of CHA is available */
/* otherwise the error code */
/********************************************************************/
int CheckChas(unsigned long OpId)
{
unsigned int chaType = 0;
switch (OpId & 0xf000)
{
case 0x1000: /* RNG Group */
chaType |= CHA_RNGA_BITMASK;
break;
case 0x2000: /* Des Groups */
chaType |= CHA_DESA_BITMASK;
break;
case 0x3000: /* RC4 Groups */
chaType |= CHA_AFHA_BITMASK;
break;
case 0x4000: /* MD Groups */
chaType |= CHA_MDHA_BITMASK;
break;
case 0x5000: /* PK Groups */
chaType |= CHA_PKHA_BITMASK;
break;
case 0x6000: /* AES Groups */
chaType |= CHA_AESA_BITMASK;
break;
case 0x7000: /* ipsec Des + MD Groups */
chaType |= (CHA_MDHA_BITMASK | CHA_DESA_BITMASK);
break;
case 0x8000: /* ipsec aes + md groups */
chaType |= (CHA_MDHA_BITMASK | CHA_AESA_BITMASK);
break;
default:
/* invalid opId */
return (SEC2_INVALID_OPERATION_ID);
}
if (((chaType & CHA_AFHA_BITMASK) != 0) && (FreeAfhas == 0))
{
return (SEC2_CHA_NOT_AVAILABLE);
}
else if (((chaType & CHA_DESA_BITMASK) != 0) && (FreeDesas == 0))
{
return (SEC2_CHA_NOT_AVAILABLE);
}
else if (((chaType & CHA_MDHA_BITMASK) != 0) && (FreeMdhas == 0))
{
return (SEC2_CHA_NOT_AVAILABLE);
}
else if (((chaType & CHA_RNGA_BITMASK) != 0) && (FreeRngas == 0))
{
return (SEC2_CHA_NOT_AVAILABLE);
}
else if (((chaType & CHA_PKHA_BITMASK) != 0) && (FreePkhas == 0))
{
return (SEC2_CHA_NOT_AVAILABLE);
}
else if (((chaType & CHA_AESA_BITMASK) != 0) && (FreeAesas == 0))
{
return (SEC2_CHA_NOT_AVAILABLE);
}
else if (((chaType & CHA_KEA_BITMASK) != 0) && (FreeKeas == 0))
{
return (SEC2_CHA_NOT_AVAILABLE);
}
/* CHA(s) are available, return OK */
return (SEC2_SUCCESS);
}
/********************************************************************/
/* Function Name: ReleaseChannel */
/* Purpose: To free a reserved channel */
/* */
/* Input: channel - the channel number (1-4) */
/* callingTaskId - the task id */
/* locked - TRUE or FALSE */
/* Return: SEC2_SUCCESS if success otherwise the error code */
/********************************************************************/
int ReleaseChannel(unsigned long channel, int callingTaskId, BOOLEAN locked)
{
int cha, chaType;
SEC2Dump(DBGTXT_SVCRQ, ("ReleaseChannel(%ld, taskID=0x%8x, lock=%d)\n", channel, callingTaskId, locked));
/* check channel value */
if ((channel == 0) || (channel > NUM_CHANNELS)) return (SEC2_INVALID_CHANNEL);
if (!locked)
IOLockChannelAssignment();
/* check that calling task is the channel's owner */
if (ChannelAssignments[channel - 1].ownerTaskId != callingTaskId)
{
/* error, caller is not the channel owner */
if (!locked)
IOUnLockChannelAssignment();
return (SEC2_INVALID_CHANNEL);
}
/* release all cha's assigned to this channel */
for (cha=0; cha<NUM_CHAS; cha++)
{
if (ChaAssignments[cha] == (unsigned char) channel)
{
/* determine cha type from cha number */
chaType = ChaNumToType(cha);
/* release the cha */
ReleaseCha((channel << 8) | chaType, callingTaskId, TRUE);
}
}
FreeChannels++;
/* release the channel */
ChannelAssignments[channel - 1].assignment = CHANNEL_FREE;
if (!locked)
{
IOUnLockChannelAssignment();
/* schedule queued requests on any freed channels */
ScheduleNext();
}
return (SEC2_SUCCESS);
} /* end of ReleaseChannel */
/**************************************************************************/
/* Function Name: ReleaseCha */
/* Purpose: To release a specific CHA */
/* or a manual channel. */
/* Input: channelCha - the bottom eight bits is the CHA chaType */
/* the next eight bits is the channel number (1-4) */
/* callingTaskId - the task id */
/* locked - TRUE or FALSE */
/* Return: SEC2_SUCCESS if success otherwise the error code */
/**************************************************************************/
int ReleaseCha(unsigned long channelCha, int callingTaskId, BOOLEAN locked)
{
unsigned char channel = (unsigned char)((channelCha >> 8) & 0xFF);
unsigned char chaType = (unsigned char)(channelCha & 0xFF);
unsigned long chaStatus[2] = {0,0};
/* unsigned long temp[2] = {0,0}; */
int cha;
int numChas;
SEC2Dump(DBGTXT_SVCRQ, ("ReleaseCha(%ld, taskID=0x%8x, lock=%d)\n", channelCha, callingTaskId, locked));
/* check chaType value */
if ((chaType != CHA_AFHA) && (chaType != CHA_DES) && (chaType != CHA_MDHA)
&& (chaType != CHA_RNG) && (chaType != CHA_PKHA)
&& (chaType != CHA_AESA)
)
return (SEC2_INVALID_CHA_TYPE);
if (!locked)
IOLockChannelAssignment();
/* check that callingTaskId matches the channel owner */
if (ChannelAssignments[channel - 1].ownerTaskId != callingTaskId)
{
/* error, cha owner is not current task */
if (!locked)
IOUnLockChannelAssignment();
return (SEC2_INVALID_CHANNEL);
}
/* determine number of CHAs for the chaType */
switch (chaType)
{
case CHA_AFHA:
numChas = NUM_AFHAS;
break;
case CHA_DES:
numChas = NUM_DESAS;
break;
case CHA_MDHA:
numChas = NUM_MDHAS;
break;
case CHA_RNG:
numChas = NUM_RNGAS;
break;
case CHA_PKHA:
numChas = NUM_PKHAS;
break;
case CHA_AESA:
numChas = NUM_AESAS;
break;
}
/* find the CHA to release */
for (cha=chaType; cha<(chaType+numChas); cha++)
{
/* see if the CHA is assigned to the given channel */
if (ChaAssignments[cha] == channel)
{
/* found a CHA assigned to the given channel */
/* release the CHA */
chaStatus[0] = *(unsigned long *)(ChaAssignmentStatusRegister);
chaStatus[1] = *(unsigned long *)(ChaAssignmentStatusRegister + 1);
if (cha < 4)
{
chaStatus[0] &= (~(0xF << (cha * 8)));
ChaAssignments[cha] = CHA_DYNAMIC;
}
else
{
chaStatus[1] &= (~(0xF << ((cha - 4) * 8)) << 16);
ChaAssignments[cha] = CHA_DYNAMIC;
}
*(ChaAssignmentControlRegister) = chaStatus[0];
*(ChaAssignmentControlRegister + 1) = chaStatus[1];
/* reset the CHA */
*(ChaResetControlRegister[cha_idx[cha]]) = CHA_SOFTWARE_RESET;
*(ChaResetControlRegister[cha_idx[cha]] + 1) = 0;
break;
}
}
/* see if we found a CHA to release */
if (cha >= (chaType + numChas))
{
/* we didn't find a CHA to release, return an error */
if (!locked)
IOUnLockChannelAssignment();
return (SEC2_INVALID_CHA_TYPE);
}
/* update free CHA counts */
switch (chaType)
{
case CHA_AFHA:
FreeAfhas++;
break;
case CHA_DES:
FreeDesas++;
break;
case CHA_MDHA:
FreeMdhas++;
break;
case CHA_RNG:
FreeRngas++;
break;
case CHA_PKHA:
FreePkhas++;
break;
case CHA_AESA:
FreeAesas++;
break;
}
if (!locked)
{
IOUnLockChannelAssignment();
/* schedule queued requests on any freed CHAs */
ScheduleNext();
}
return (SEC2_SUCCESS);
} /* End of ReleaseCha */
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_dpd.c
+402
View File
@@ -0,0 +1,402 @@
/****************************************************************************
* sec2_dpd.c -- Code to construct a packet descriptor for SEC2 Driver
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
* Copyright (c) 2003-2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/*
* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* May 26,2004 sec - add support for scatter pointers
* 1.1.0 Nov 16,2004 sec - incorporate linux changes from prior versions
* 1.1.1 Dec 16,2004 sec - clean up prototypes and warnings
* 1.2 Jan 27,2005 sec - bugfix in DPD dumper
*/
#include "Sec2Driver.h"
#include "Sec2Descriptors.h"
#include "sec2_dpd_Table.h"
static int VerifyRequest(void *request, DPD_DETAILS_ENTRY *pDesc);
static DPD_DETAILS_ENTRY *GetRequestDescEntry(unsigned long opId);
/* Build a SEC2-channel-compatible fragment map from a generic one */
/* inList: external linked list */
/* ptrEnt: will become head of compatible list we'll construct */
/* */
int MapScatterFragments(unsigned long inList,
unsigned long *ptrEnt)
{
int i, listSiz;
EXT_SCATTER_ELEMENT *inElem;
SCATTER_ELEMENT *outList;
inElem = (EXT_SCATTER_ELEMENT *)inList;
/* How many elements to alloc? */
listSiz = 0;
while (inElem != NULL)
{
listSiz++;
inElem = inElem->next;
}
SEC2Dump(DBGTXT_SETRQ, ("MapScatterFragments(): list 0x%08lx has %d fragments\n", inList, listSiz));
/* Allocate a chunk off the driver's available heap */
outList = malloc(sizeof(SCATTER_ELEMENT) * listSiz);
if (outList == NULL)
return(SEC2_FRAGMENT_POOL_EXHAUSTED);
/* Stuff allocated chunk with caller's info */
i = 0;
inElem = (EXT_SCATTER_ELEMENT *)inList;
while (inElem != NULL)
{
outList[i].segAddr = (void *)__vpa((unsigned long)inElem->fragment);
outList[i].segLen = (unsigned short)inElem->size;
outList[i].linkStat = 0;
inElem = inElem->next;
SEC2Dump(DBGTXT_SETRQ,
("MapScatterFragments(): new fragment 0x%08x, %d bytes\n",
(unsigned)outList[i].segAddr,
outList[i].segLen));
i++;
}
/* once done, set the "return" bit in the last element */
outList[i - 1].linkStat |= SEGLIST_RETURN;
*ptrEnt = __vpa((unsigned long)outList);
return(SEC2_SUCCESS);
}
/* Free a SEC2-hardware-compatible fragment chain. antithesis of MapScatterFragments */
/* Should be called upon as part of a channel interrupt cleanup process */
void UnmapScatterFragments(unsigned long *ptrEnt)
{
/* free((void *)ChannelAssignments[channel].Dpds[i]->fld[j].ptr); */
}
/*
* Convert driver-native request structure to DPD and insert
*/
int RequestToDpd(register GENERIC_REQ *pReq, register int channel)
{
#define DPDPTR (ChannelAssignments[channel].Dpds[dpdCount])
register DPD_DETAILS_ENTRY *pDesc;
register unsigned long opId;
register int i, status;
register int dpdCount;
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): req @0x%08x ch%d\n", (unsigned)pReq, channel+1));
if (pReq == NULL)
return SEC2_NULL_REQUEST;
dpdCount = 0;
/* process request(s) */
/* do {stuff} while pReq points to real request */
do
{
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): get entry for opId 0x%08lx\n", pReq->opId));
pDesc = GetRequestDescEntry (pReq->opId);
if (pDesc == NULL)
return SEC2_INVALID_OPERATION_ID;
/* Validate the contents of the request */
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): VerifyRequest(0x%08x, 0x%08x)\n", (unsigned)pReq, (unsigned)pDesc));
status = VerifyRequest(pReq, pDesc);
if (status != SEC2_SUCCESS)
return status;
/* If there are insufficient DPDs save the current request
list entry and offset. Indicate that the request is "chunked"
*/
if (dpdCount >= MAX_DPDS)
return (SEC2_INSUFFICIENT_REQS);
/*
* We have sufficient resources (DPD slots) to process this request.
* Initialize a DPD and link the prior DPD to this one (if it is not the first)
*/
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): clear DPD 0x%08x\n", (unsigned)DPDPTR));
memset(DPDPTR, 0x00, sizeof(DPD));
/* fill in the dpd header */
opId = pReq->opId;
DPDPTR->header = pDesc->hdrDesc[1*(opId & DESC_NUM_MASK)];
/* For each field in a request: */
for (i = 0; i < NUM_DPD_FLDS && pDesc->fld[i].txt != NULL; i++)
{
if (*(long *)pDesc->fld[i].txt == *(long *)"NIL") {
DPDPTR->fld[i].ptr = 0;
DPDPTR->fld[i].len = 0;
}
else
{
/* deal with basic pointer */
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): converting entry %d->0x%08x\n", i, *(unsigned int *)((unsigned int)pReq + pDesc->fld[i].ptrOffset1st)));
/* if offset AND caller specfied non-NULL pointer, assign/convert that pointer */
if ((pDesc->fld[i].ptrOffset1st != 0) &&
*(unsigned int *)((unsigned int)pReq + pDesc->fld[i].ptrOffset1st))
DPDPTR->fld[i].ptr = __vpa(*(unsigned int *) ((unsigned int)pReq + pDesc->fld[i].ptrOffset1st));
/* if scatter pointer, deal with special case */
if (pReq->scatterBufs & (0x01 << i))
{
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): pointer word %d is scattered\n", i+1));
/* this should be linked list to fragment map, do conversion */
status = MapScatterFragments(*(unsigned int *)((unsigned int)pReq + pDesc->fld[i].ptrOffset1st),
&(DPDPTR->fld[i].ptr));
if (status != SEC2_SUCCESS) /* map failed? */
return(status);
}
/* deal with length */
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): set length = %d\n", *(unsigned int *)((unsigned int)pReq + pDesc->fld[i].lenOffset1st)));
DPDPTR->fld[i].len = *(unsigned int *) ((unsigned int)pReq + pDesc->fld[i].lenOffset1st);
DPDPTR->fld[i].len <<= 16;
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): set offset= %d\n", *(unsigned int *)((unsigned int)pReq + pDesc->fld[i].extOffset)));
if (pDesc->fld[i].extOffset != 0)
DPDPTR->fld[i].len |= *(unsigned int *) ((unsigned int)pReq + pDesc->fld[i].extOffset) << 8;
if (pReq->scatterBufs & (0x01 << i))
DPDPTR->fld[i].len |= PTRTYPE_JBIT; /* set scatter flag bit */
}
}
#ifdef DBG
/* If DPD dump requested, show this packet descriptor content */
if (SEC2DebugLevel | DBGTXT_DPDSHOW) {
SEC2Dump(DBGTXT_DPDSHOW,
("DPD header = 0x%08lx\n", DPDPTR->header));
SEC2Dump(DBGTXT_DPDSHOW,
("Primary EU/Mode 0x%02lx:%02lx, ",
(DPDPTR->header & 0xf0000000) >> 28,
(DPDPTR->header & 0x0ff00000) >> 20));
SEC2Dump(DBGTXT_DPDSHOW,
("Secondary EU/Mode 0x%02lx:%02lx, ",
(DPDPTR->header & 0x000f0000) >> 16,
(DPDPTR->header & 0x0000ff00) >> 8));
SEC2Dump(DBGTXT_DPDSHOW,
("Type 0x%02lx, ",
(DPDPTR->header & 0x000000f8) >> 3));
if (DPDPTR->header & 0x00000002)
SEC2Dump(DBGTXT_DPDSHOW, ("Inbound, "));
else
SEC2Dump(DBGTXT_DPDSHOW, ("Outbound, "));
if (DPDPTR->header & 0x00000001)
SEC2Dump(DBGTXT_DPDSHOW, ("Done\n"));
else
SEC2Dump(DBGTXT_DPDSHOW, ("\n"));
for (i = 0; i < NUM_DPD_FLDS; i++)
SEC2Dump(DBGTXT_DPDSHOW,
("DPD ptr:len/ext p%d = 0x%08lx:%08lx\n",
i,
DPDPTR->fld[i].ptr,
DPDPTR->fld[i].len));
} /* if (DPD SHOW) */
#endif
/* Move onto the next block
*/
pReq = (GENERIC_REQ *)pReq->nextReq;
dpdCount++;
} while (pReq != NULL); /* End while (request != NULL) */
return SEC2_SUCCESS;
} /* end of RequestToDpd */
/*
* Validate request content
*/
int VerifyRequest(register void *request, register DPD_DETAILS_ENTRY *pDesc)
{
register int i;
register unsigned long len;
/* register unsigned long addr; */
for (i = 0; i < NUM_DPD_FLDS && pDesc->fld[i].txt != NULL; i++)
{
/* A NULL pointer to a size checking function means "don't bother checking" */
if (pDesc->fld[i].pFncSize != NULL)
{
len = *(unsigned int *)((unsigned int)request + pDesc->fld[i].lenOffset1st);
if (!pDesc->fld[i].pFncSize(len))
{
SEC2Dump(DBGTXT_SETRQ,
("VerifyRequest->fld(%s) Invalid Length=%ld\n",
pDesc->fld[i].txt, len));
return SEC2_INVALID_LENGTH;
}
}
/* check Extent Length < 128 */
if (pDesc->fld[i].extOffset != 0)
{
len = *(unsigned int *)((unsigned int)request + pDesc->fld[i].extOffset);
if (len >= 128)
return SEC2_INVALID_LENGTH;
}
}
return SEC2_SUCCESS;
}
/* Scan the DPDDetails table for a particular opId value. Return a pointer
to the entry if it is found, NULL otherwise
*/
DPD_DETAILS_ENTRY *GetRequestDescEntry(unsigned long opId)
{
int i = 0;
opId &= DESC_TYPE_MASK;
while (DpdDetails[i].txt != NULL && DpdDetails[i].opId != opId) i++;
return(DpdDetails[i].opId == 0 ? NULL : &DpdDetails[i]);
}
/* The following Chk???() routines and the FitInBlock() routine are used
to verify that the length of a data area is consistent with a request type.
They are supplied as pointers to functions in the DPDDetails table
*/
BOOLEAN ChkDesIvLen(unsigned long len)
{
return len != 0 && len != DES_BLOCK ? FALSE : TRUE;
}
BOOLEAN ChkDesKeyLen(unsigned long len)
{
return len != DES_BLOCK && len != (2*DES_BLOCK) && len != (3*DES_BLOCK) ? FALSE : TRUE;
}
BOOLEAN ChkDesStaticDataLen(unsigned long len)
{
return (len & 0x7) != 0 ? FALSE : TRUE;
}
BOOLEAN ChkDesDataLen(unsigned long len)
{
return (len & 0x7) != 0 ? FALSE : TRUE;
}
BOOLEAN ChkDesCtxLen(unsigned long len)
{
return len != 0 && len != DES_BLOCK != 0 ? FALSE : TRUE;
}
BOOLEAN ChkAesKeyLen(unsigned long len)
{
return len != 16 && len != 24 && len != 32 ? FALSE : TRUE;
}
BOOLEAN ChkAesIvLen(unsigned long len)
{
return len != 0 && len != 16 ? FALSE : TRUE;
}
BOOLEAN ChkArcKeyLen(unsigned long len)
{
return len < ARC4_MIN_KEYBYTES || len > ARC4_MAX_KEYBYTES ? FALSE : TRUE;
}
BOOLEAN ChkArcCtxLen(unsigned long len)
{
return len != ARC4_CONTEXTBYTES ? FALSE : TRUE;
}
BOOLEAN ChkOptionalArcCtxLen(unsigned long len)
{
return len != ARC4_CONTEXTBYTES && len != 0 ? FALSE : TRUE;
}
BOOLEAN ChkEccLen(unsigned long len)
{
return len > 64 ? FALSE : TRUE;
}
BOOLEAN FitInBlock(unsigned long len)
{
return len > BlockSize ? FALSE : TRUE;
}
BOOLEAN ChkCcmpKeyLen(unsigned long len)
{
return len != 0 && len != 16 ? FALSE : TRUE;
}
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_dpd_Table.h
+749
View File
@@ -0,0 +1,749 @@
/****************************************************************************
* sec2_dpd_Table.h -- Request to DPD Table translation table
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2000. All rights reserved
* Copyright (c) 2003-2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* May 24,2003 sec - re-ordered RRMODP pointers per T2.0
* Aug 23,2004 sec - add TLS support
* Oct 15,2004 sec - reordered R2modN and MODEXP pointers
* 1.1.0 Dec 05,2004 sec - prep for release
* 1.1.1 Dec 16,2004 sec - remove old unused diagnostics
* Jan 17,2005 sec - add in missing IPSEC table entry
* 1.2 Jan 27,2005 sec - fix up some obsolete names
*/
extern BOOLEAN ChkDesIvLen(unsigned long len);
extern BOOLEAN ChkDesKeyLen(unsigned long len);
extern BOOLEAN ChkDesStaticDataLen(unsigned long len);
extern BOOLEAN ChkDesDataLen(unsigned long len);
extern BOOLEAN ChkDesCryptLen(unsigned long len);
extern BOOLEAN ChkDesCtxLen(unsigned long len);
extern BOOLEAN ChkArcKeyLen(unsigned long len);
extern BOOLEAN ChkArcCtxLen(unsigned long len);
extern BOOLEAN ChkOptionalArcCtxLen(unsigned long len);
extern BOOLEAN ChkEccLen(unsigned long len);
extern BOOLEAN ChkAesIvLen(unsigned long len);
extern BOOLEAN ChkAesKeyLen(unsigned long len);
extern BOOLEAN ChkCcmpKeyLen(unsigned long len);
/*! \enum FLD_TYPE
\brief A field can either be for reading from or writing to
*/
typedef enum {
Read,
Write,
Extent
} FLD_TYPE;
/* DPD_FLD_DETAILS_ENTRY
Describes where and how a field in a request goes to a field in a DPD
*/
typedef struct
{
char *txt; /* Description of the
field within the request
a NULL indicates the end
of field entries */
unsigned int lenOffset1st; /* Offset into request pointer
for the initial length field */
unsigned int lenOffsetNxt; /* Offset into request pointer
for the next length field
Used when input points to
output of the previous
request */
unsigned int ptrOffset1st; /* Offset into request pointer
for the initial data area */
unsigned int extOffset;
FLD_TYPE dataType; /* Data type either:
a "Read" or "Write" area */
BOOLEAN (*pFncSize)(unsigned long len); /* Pointer to
function that checks
whether the length is
consistent with the request */
} DPD_FLD_DETAILS_ENTRY;
/*! \struct DPD_DETAILS_ENTRY
\brief Describes how a request is broken into a single DPD or a set of chained
DPDs
*/
typedef struct DPD_DETAILS_ENTRY
{
unsigned long opId; /* Operation ID for entry */
char *txt; /* Description of request
a NULL indicates the end
of the table */
unsigned long sz; /* Size of request */
const unsigned long *hdrDesc; /* Descriptor Header */
unsigned int lenOffsetBlockLen; /* Offset into request pointer
for total length of data */
DPD_FLD_DETAILS_ENTRY fld[NUM_DPD_FLDS];
} DPD_DETAILS_ENTRY; /* Each request is enumerated here */
#ifndef offsetof
/* offsetof(s,m)
Macro that identifies the byte offset of a field m within a structure s
*/
#define offsetof(s,m) (size_t)&(((s *)0)->m)
#endif
#define STD_OFFSETS(s,l1,l2,p1,p2) offsetof(s,l1), offsetof(s,l2),\
offsetof(s,p1), 0
#define EXT_OFFSETS(s,l1,l2,p1,p2) offsetof(s,l1), offsetof(s,l2),\
offsetof(s,p1), offsetof(s,p2)
#define NULL_PTR_OFFSETS(s,l1,l2) offsetof(s,l1), offsetof(s,l2), 0, 0
#define ZERO_LEN_OFFSETS(s,p1,p2) 0, 0, offsetof(s,p1), offsetof(s,p2)
#define ALL_ZERO_OFFSETS 0, 0, 0, 0
static char NIL[] = {"NIL"};
DPD_DETAILS_ENTRY DpdDetails[] =
{
/* DPD_RNG_GROUP */
{
DPD_RNG_GROUP, "DPD_RNG_GROUP",
sizeof(RNG_REQ), RngDesc,
offsetof(RNG_REQ,rngBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"rngData", STD_OFFSETS(RNG_REQ,rngBytes,rngBytes,rngData,rngData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_DES_CBC_GROUP */
{
DPD_DES_CBC_GROUP, "DPD_DES_CBC_GROUP",
sizeof(DES_CBC_CRYPT_REQ), DesCbcReq,
offsetof(DES_CBC_CRYPT_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inIvData", STD_OFFSETS(DES_CBC_CRYPT_REQ,inIvBytes,inIvBytes,inIvData,outIvData), Read, ChkDesIvLen},
{"keyData", STD_OFFSETS(DES_CBC_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkDesKeyLen},
{"inData", STD_OFFSETS(DES_CBC_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, ChkDesDataLen},
{"outData", STD_OFFSETS(DES_CBC_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
{"outIvData", STD_OFFSETS(DES_CBC_CRYPT_REQ,outIvBytes,outIvBytes,outIvData,outIvData), Write, ChkDesIvLen},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_DES_ECB_GROUP */
{
DPD_DES_ECB_GROUP, "DPD_DES_ECB_GROUP",
sizeof(DES_CRYPT_REQ), DesReq,
offsetof(DES_CRYPT_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"keyData", STD_OFFSETS(DES_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkDesKeyLen},
{"inData", STD_OFFSETS(DES_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, ChkDesDataLen},
{"outData", STD_OFFSETS(DES_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP */
{
DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP, "DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP",
sizeof(ARC4_LOADCTX_CRYPT_REQ), Rc4LoadCtxUnloadCtxReq,
offsetof(ARC4_LOADCTX_CRYPT_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inCtxData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,inCtxBytes,inCtxBytes,inCtxData,outCtxData), Read, ChkArcCtxLen},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, NULL},
{"outData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
{"outCtxData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,outCtxBytes,outCtxBytes,outCtxData,outCtxData), Write, ChkArcCtxLen},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP */
{
DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP, "DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP",
sizeof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ), Rc4LoadKeyUnloadCtxReq,
offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"keyData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkArcKeyLen},
{"inData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,inBytes,inBytes,inData,inData), Read, NULL},
{"outData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,inBytes,inBytes,outData,outData), Write, NULL},
{"outCtxData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,outCtxBytes,outCtxBytes,outCtxData,outCtxData), Write, ChkArcCtxLen},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_HASH_LDCTX_HASH_ULCTX_GROUP */
{
DPD_HASH_LDCTX_HASH_ULCTX_GROUP, "DPD_HASH_LDCTX_HASH_ULCTX_GROUP",
sizeof(HASH_REQ), MdhaReq,
offsetof(HASH_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"ctxData", STD_OFFSETS(HASH_REQ,ctxBytes,outBytes,ctxData,outData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inData", STD_OFFSETS(HASH_REQ,inBytes,inBytes,inData,inData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"outData", STD_OFFSETS(HASH_REQ,outBytes,outBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP */
{
DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP, "DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP",
sizeof(HASH_REQ), MdhaPadReq,
offsetof(HASH_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"ctxData", STD_OFFSETS(HASH_REQ,ctxBytes,ctxBytes,ctxData,ctxData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inData", STD_OFFSETS(HASH_REQ,inBytes,inBytes,inData,inData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"outData", STD_OFFSETS(HASH_REQ,outBytes,outBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_HASH_LDCTX_HMAC_ULCTX_GROUP */
{
DPD_HASH_LDCTX_HMAC_ULCTX_GROUP, "DPD_HASH_LDCTX_HMAC_ULCTX_GROUP",
sizeof(HMAC_PAD_REQ), HmacPadReq,
offsetof(HMAC_PAD_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"keyData", STD_OFFSETS(HMAC_PAD_REQ,keyBytes,keyBytes,keyData,keyData), Read, NULL},
{"inData", STD_OFFSETS(HMAC_PAD_REQ,inBytes,inBytes,inData,inData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"outData", STD_OFFSETS(HMAC_PAD_REQ,outBytes,outBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_MM_LDCTX_EXP_ULCTX_GROUP */
{
DPD_MM_LDCTX_EXP_ULCTX_GROUP, "DPD_MM_LDCTX_EXP_ULCTX_GROUP",
sizeof(MOD_EXP_REQ), PkhaMmExpReq,
offsetof(MOD_EXP_REQ,outBytes),
{
{"modData", STD_OFFSETS(MOD_EXP_REQ,modBytes,modBytes,modData,modData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"aData", STD_OFFSETS(MOD_EXP_REQ,aDataBytes,aDataBytes,aData,aData), Read, NULL},
{"expData", STD_OFFSETS(MOD_EXP_REQ,expBytes,expBytes,expData,expData), Read, NULL},
{"outData", STD_OFFSETS(MOD_EXP_REQ,outBytes,outBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_MM_SS_RSA_EXP */
{
DPD_MM_SS_RSA_EXP, "DPD_MM_SS_RSA_EXP",
sizeof(MOD_SS_EXP_REQ), PkhaMmSsExpReq,
0,
{
{"modData",STD_OFFSETS(MOD_SS_EXP_REQ,modBytes,modBytes,modData,modData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"aData",STD_OFFSETS(MOD_SS_EXP_REQ,aDataBytes,aDataBytes,aData,aData), Read, NULL},
{"expData",STD_OFFSETS(MOD_SS_EXP_REQ,expBytes,expBytes,expData,expData), Read, NULL},
{"bData",STD_OFFSETS(MOD_SS_EXP_REQ,bDataBytes,bDataBytes,bData,bData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_MM_LDCTX_R2MODN_ULCTX_GROUP */
{
DPD_MM_LDCTX_R2MODN_ULCTX_GROUP, "DPD_MM_LDCTX_R2MODN_ULCTX_GROUP",
sizeof(MOD_R2MODN_REQ), PkhaModR2modnReq,
offsetof(MOD_R2MODN_REQ,outBytes),
{
{"modData", STD_OFFSETS(MOD_R2MODN_REQ,modBytes,modBytes,modData,modData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"outData", STD_OFFSETS(MOD_R2MODN_REQ,outBytes,outBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_MM_LDCTX_RRMODP_ULCTX_GROUP */
{
DPD_MM_LDCTX_RRMODP_ULCTX_GROUP, "DPD_MM_LDCTX_RRMODP_ULCTX_GROUP",
sizeof(MOD_RRMODP_REQ), PkhaMmRrmodpReq,
offsetof(MOD_RRMODP_REQ,outBytes),
{
{"pData", STD_OFFSETS(MOD_RRMODP_REQ,pBytes,pBytes,pData,pData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"nBytes", NULL_PTR_OFFSETS(MOD_RRMODP_REQ,nBytes,nBytes), Read, NULL},
{"outData", STD_OFFSETS(MOD_RRMODP_REQ,outBytes,outBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_MM_LDCTX_2OP_ULCTX_GROUP */
{
DPD_MOD_LDCTX_2OP_ULCTX_GROUP, "DPD_MOD_LDCTX_2OP_ULCTX_GROUP",
sizeof(MOD_2OP_REQ), PkhaMod2OpReq,
offsetof(MOD_2OP_REQ,outBytes),
{
{"modData", STD_OFFSETS(MOD_2OP_REQ,modBytes,modBytes,modData,modData), Read, NULL},
{"bData", STD_OFFSETS(MOD_2OP_REQ,bDataBytes,bDataBytes,bData,bData), Read, NULL},
{"aData", STD_OFFSETS(MOD_2OP_REQ,aDataBytes,aDataBytes,aData,aData), Read, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"outData", STD_OFFSETS(MOD_2OP_REQ,outBytes,outBytes,outData,outData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_EC_LDCTX_kP_ULCTX_GROUP */
{
DPD_EC_LDCTX_kP_ULCTX_GROUP, "DPD_EC_LDCTX_kP_ULCTX_GROUP",
sizeof(ECC_POINT_REQ), PkhaEccPointReq,
offsetof(ECC_POINT_REQ, b3DataBytes),
{
{"nData", STD_OFFSETS(ECC_POINT_REQ,nDataBytes,nDataBytes,nData,nData), Read, NULL},
{"eData", STD_OFFSETS(ECC_POINT_REQ,eDataBytes,eDataBytes,eData,eData), Read, NULL},
{"buildData", STD_OFFSETS(ECC_POINT_REQ,buildDataBytes,buildDataBytes,buildData,buildData), Read, NULL},
{"b1Data", STD_OFFSETS(ECC_POINT_REQ,b1DataBytes,b1DataBytes,b1Data,b1Data), Write, NULL},
{"b2Data", STD_OFFSETS(ECC_POINT_REQ,b2DataBytes,b2DataBytes,b2Data,b2Data), Write, NULL},
{"b3Data", STD_OFFSETS(ECC_POINT_REQ,b3DataBytes,b3DataBytes,b3Data,b3Data), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_EC_2OP_GROUP */
{
DPD_EC_2OP_GROUP, "DPD_EC_2OP_GROUP",
sizeof(ECC_2OP_REQ), PkhaEcc2OpReq,
offsetof(ECC_2OP_REQ,outBytes),
{
{"bData", STD_OFFSETS(ECC_2OP_REQ,bDataBytes,bDataBytes,bData,bData), Read, ChkEccLen},
{"aData", STD_OFFSETS(ECC_2OP_REQ,aDataBytes,aDataBytes,aData,aData), Read, ChkEccLen},
{"modData", STD_OFFSETS(ECC_2OP_REQ,modBytes,modBytes,modData,modData), Read, ChkEccLen},
{"outData", STD_OFFSETS(ECC_2OP_REQ,outBytes,outBytes,outData,outData), Write, ChkEccLen},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_EC_SPKBUILD_GROUP */
{
DPD_EC_SPKBUILD_GROUP, "DPD_EC_SPKBUILD_GROUP",
sizeof(ECC_SPKBUILD_REQ), PkhaEccSpkbuildReq,
offsetof(ECC_SPKBUILD_REQ, buildDataBytes),
{
{"a0Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a0DataBytes,a0DataBytes,a0Data,a0Data), Read, NULL},
{"a1Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a1DataBytes,a1DataBytes,a1Data,a1Data), Read, NULL},
{"a2Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a2DataBytes,a2DataBytes,a2Data,a2Data), Read, NULL},
{"a3Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a3DataBytes,a3DataBytes,a3Data,a3Data), Read, NULL},
{"b0Data", STD_OFFSETS(ECC_SPKBUILD_REQ,b0DataBytes,b0DataBytes,b0Data,b0Data), Read, NULL},
{"b1Data", STD_OFFSETS(ECC_SPKBUILD_REQ,b1DataBytes,b1DataBytes,b1Data,b1Data), Read, NULL},
{"buildData", STD_OFFSETS(ECC_SPKBUILD_REQ,buildDataBytes,buildDataBytes,buildData,buildData), Write, NULL},
},
},
/* DPD_EC_PTADD_DBL_GROUP */
{
DPD_EC_PTADD_DBL_GROUP, "DPD_EC_PTADD_DBL_GROUP",
sizeof(ECC_PTADD_DBL_REQ), PkhaEccPtaddDblReq,
offsetof(ECC_PTADD_DBL_REQ, b3DataBytes),
{
{"modData", STD_OFFSETS(ECC_PTADD_DBL_REQ,modBytes,modBytes,modData,modData), Read, NULL},
{"buildData", STD_OFFSETS(ECC_PTADD_DBL_REQ,buildDataBytes,buildDataBytes,buildData,buildData), Read, NULL},
{"b2InData", STD_OFFSETS(ECC_PTADD_DBL_REQ,b2InDataBytes,b2InDataBytes,b2InData,b2InData), Read, NULL},
{"b3InData", STD_OFFSETS(ECC_PTADD_DBL_REQ,b3InDataBytes,b3InDataBytes,b3InData,b3InData), Read, NULL},
{"b1Data", STD_OFFSETS(ECC_PTADD_DBL_REQ,b1DataBytes,b1DataBytes,b1Data,b1Data), Write, NULL},
{"b2Data", STD_OFFSETS(ECC_PTADD_DBL_REQ,b2DataBytes,b2DataBytes,b2Data,b2Data), Write, NULL},
{"b3Data", STD_OFFSETS(ECC_PTADD_DBL_REQ,b3DataBytes,b3DataBytes,b3Data,b3Data), Write, NULL},
},
},
/* DPD_IPSEC_CBC_GROUP */
{
DPD_IPSEC_CBC_GROUP, "DPD_IPSEC_CBC_GROUP",
sizeof(IPSEC_CBC_REQ), IpsecCbcReq,
offsetof(IPSEC_CBC_REQ,inDataBytes),
{
{"hashKeyData",STD_OFFSETS(IPSEC_CBC_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"hashInData", STD_OFFSETS(IPSEC_CBC_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
{"cryptKeyData",STD_OFFSETS(IPSEC_CBC_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkDesKeyLen},
{"cryptCtxInData", STD_OFFSETS(IPSEC_CBC_REQ,cryptCtxInBytes,cryptCtxInBytes,cryptCtxInData,cryptCtxInData), Read, ChkDesCtxLen},
{"inData", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
{"cryptDataOut", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
{"hashDataOut", STD_OFFSETS(IPSEC_CBC_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
},
},
/* DPD_IPSEC_ECB_GROUP */
{
DPD_IPSEC_ECB_GROUP, "DPD_IPSEC_ECB_GROUP",
sizeof(IPSEC_ECB_REQ), IpsecEcbReq,
offsetof(IPSEC_ECB_REQ,inDataBytes),
{
{"hashKeyData",STD_OFFSETS(IPSEC_ECB_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"hashInData", STD_OFFSETS(IPSEC_ECB_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
{"cryptKeyData",STD_OFFSETS(IPSEC_ECB_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkDesKeyLen},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inData", STD_OFFSETS(IPSEC_ECB_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
{"cryptDataOut", STD_OFFSETS(IPSEC_ECB_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
{"hashDataOut", STD_OFFSETS(IPSEC_ECB_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
},
},
/* DPD_IPSEC_ESP_GROUP */
{
DPD_IPSEC_ESP_GROUP, "DPD_IPSEC_ESP_GROUP",
sizeof(IPSEC_ESP_REQ), IpsecEspReq,
offsetof(IPSEC_ESP_REQ,inDataBytes),
{
{"hashKeyData", STD_OFFSETS(IPSEC_ESP_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"hashInData", STD_OFFSETS(IPSEC_ESP_REQ,hashInDataBytes,hashInDataBytes,hashKeyData,hashKeyData), Read, NULL},
{"cryptCtxInData", STD_OFFSETS(IPSEC_ESP_REQ,cryptCtxInBytes,cryptCtxInBytes,cryptCtxInData,cryptCtxInData), Read, ChkDesCtxLen},
{"cryptKeyData",STD_OFFSETS(IPSEC_ESP_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkDesKeyLen},
{"inData", STD_OFFSETS(IPSEC_ESP_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
{"cryptDataOut", EXT_OFFSETS(IPSEC_ESP_REQ,inDataBytes,inDataBytes,cryptDataOut,hashDataOutBytes), Write, NULL},
{"cryptCtxOutData", STD_OFFSETS(IPSEC_ESP_REQ,cryptCtxOutBytes,cryptCtxOutBytes,cryptCtxOutData,cryptCtxOutData), Write, ChkDesCtxLen}
},
},
/* DPD_IPSEC_AES_CBC_GROUP */
{
DPD_IPSEC_AES_CBC_GROUP, "DPD_IPSEC_AES_CBC_GROUP",
sizeof(IPSEC_AES_CBC_REQ), IpsecAesCbcReq,
offsetof(IPSEC_AES_CBC_REQ,inDataBytes),
{
{"hashKeyData",STD_OFFSETS(IPSEC_CBC_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"hashInData", STD_OFFSETS(IPSEC_CBC_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
{"cryptKeyData",STD_OFFSETS(IPSEC_CBC_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkAesKeyLen},
{"cryptCtxInData", STD_OFFSETS(IPSEC_CBC_REQ,cryptCtxInBytes,cryptCtxInBytes,cryptCtxInData,cryptCtxInData), Read, ChkAesIvLen},
{"inData", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
{"cryptDataOut", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
{"hashDataOut", STD_OFFSETS(IPSEC_CBC_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
},
},
/* DPD_IPSEC_AES_ECB_GROUP */
{
DPD_IPSEC_AES_ECB_GROUP, "DPD_IPSEC_AES_ECB_GROUP",
sizeof(IPSEC_AES_ECB_REQ), IpsecAesEcbReq,
offsetof(IPSEC_AES_ECB_REQ,inDataBytes),
{
{"hashKeyData",STD_OFFSETS(IPSEC_AES_ECB_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"hashInData", STD_OFFSETS(IPSEC_AES_ECB_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
{"cryptKeyData",STD_OFFSETS(IPSEC_AES_ECB_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkAesKeyLen},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inData", STD_OFFSETS(IPSEC_AES_ECB_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
{"cryptDataOut",STD_OFFSETS(IPSEC_AES_ECB_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
{"hashDataOut", STD_OFFSETS(IPSEC_AES_ECB_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
},
},
/* DPD_AESA_CRYPT_GROUP */
{
DPD_AESA_CRYPT_GROUP, "DPD_AESA_CRYPT_GROUP",
sizeof(AESA_CRYPT_REQ), AesaDesc,
offsetof(AESA_CRYPT_REQ,inBytes),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"inIvData", STD_OFFSETS(AESA_CRYPT_REQ,inIvBytes,inIvBytes,inIvData,inIvData), Read, ChkAesIvLen},
{"keyData", STD_OFFSETS(AESA_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkAesKeyLen},
{"inData", STD_OFFSETS(AESA_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, 0},
{"outData", STD_OFFSETS(AESA_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
{"outCtxData", STD_OFFSETS(AESA_CRYPT_REQ,outCtxBytes,outCtxBytes,outCtxData,outCtxData), Write, NULL},
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/* DPD_CCMP_GROUP */
{
DPD_CCMP_GROUP, "DPD_CCMP_GROUP",
sizeof(CCMP_REQ), CcmpReq,
offsetof(CCMP_REQ,MICData),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"context", STD_OFFSETS(CCMP_REQ,ctxBytes,ctxBytes,context,context), Read, NULL},
{"keyData", STD_OFFSETS(CCMP_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkCcmpKeyLen},
{"AADData", STD_OFFSETS(CCMP_REQ,AADBytes,AADBytes,AADData,AADData), Read, 0},
{"FrameData", STD_OFFSETS(CCMP_REQ,FrameDataBytes,FrameDataBytes,FrameData,FrameData), Read, 0},
{"cryptDataOut",STD_OFFSETS(CCMP_REQ,cryptDataBytes,cryptDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
{"MICData", STD_OFFSETS(CCMP_REQ,MICBytes,MICBytes,MICData,MICData), Write, NULL}
},
},
/* DPD_SRTP_GROUP */
{
DPD_SRTP_GROUP, "DPD_SRTP_GROUP",
sizeof(SRTP_REQ), SrtpReq,
offsetof(SRTP_REQ,outIvData),
{
{"hashKeyData", STD_OFFSETS(SRTP_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"ivData", STD_OFFSETS(SRTP_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
{"keyData", STD_OFFSETS(SRTP_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkAesKeyLen},
{"inData", EXT_OFFSETS(SRTP_REQ,inBytes,inBytes,inData,HeaderBytes), Read, 0},
{"cryptDataOut",EXT_OFFSETS(SRTP_REQ,cryptDataBytes,cryptDataBytes,cryptDataOut,ROCBytes), Write, NULL},
{"digestData", STD_OFFSETS(SRTP_REQ,digestBytes,digestBytes,digestData,digestData), Read, 0},
{"outIvData", STD_OFFSETS(SRTP_REQ,outIvBytes,outIvBytes,outIvData,outIvData), Write, NULL}
},
},
/* DPD_KEA_CRYPT_GROUP */
/* Descriptor layout
* Pointer 1 = (none)
* Pointer 2 = IV input
* Pointer 3 = Cipher Key
* Pointer 4 = Data Input
* Pointer 5 = Data Output
* Pointer 6 = IV output
* Pointer 7 = (none)
*/
{
DPD_KEA_CRYPT_GROUP, "DPD_KEA_CRYPT_GROUP",
sizeof(KEA_CRYPT_REQ), KeaReq,
offsetof(KEA_CRYPT_REQ, outData),
{
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"ivData", STD_OFFSETS(KEA_CRYPT_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
{"keyData", STD_OFFSETS(KEA_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, NULL},
{"inData", STD_OFFSETS(KEA_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, NULL},
{"outData", STD_OFFSETS(KEA_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
{"ivData", STD_OFFSETS(KEA_CRYPT_REQ,ivBytes,ivBytes,ivData,ivData), Write, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL}
},
},
/*
* DPD_TLS_BLOCK_INBOUND_GROUP
* pointer length extent
* ----------------------------------------------------------------
* p0 hashKeyData hashKeyBytes
* p1 hashOnlyData hashOnlyBytes
* p2 ivData ivBytes
* p3 cipherKeyData cipherKeyBytes
* p4 inData inBytes MACcmpBytes
* p5 outData outBytes MACoutBytes
* p6 ivOutData ivOutBytes
* ----------------------------------------------------------------
*/
{
DPD_TLS_BLOCK_INBOUND_GROUP, "DPD_TLS_BLOCK_INBOUND_GROUP",
sizeof(TLS_BLOCK_INBOUND_REQ), TlsBlockInboundReq,
offsetof(TLS_BLOCK_INBOUND_REQ, ivOutData),
{
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashOnlyBytes,hashOnlyBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
{"ivData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
{"inData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,inBytes,inBytes,inData,MACcmpBytes), Read, NULL},
{"outData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,outBytes,outBytes,outData,MACoutBytes), Write, NULL},
{"ivOutData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
},
},
/*
* DPD_TLS_BLOCK_OUTBOUND_GROUP
* pointer length extent
* ----------------------------------------------------------------
* p0 hashKeyData hashKeyBytes
* p1 ivData ivBytes
* p2 cipherKeyData cipherKeyBytes
* p3 hashOnlyData mainDataBytes hashOnlyBytes
* p4 outData outBytes MACbytes
* p5 cipherOnlyData cipherOnlyBytes
* p6 ivOutData ivOutBytes
* ----------------------------------------------------------------
*/
{
DPD_TLS_BLOCK_OUTBOUND_GROUP, "DPD_TLS_BLOCK_OUTBOUND_GROUP",
sizeof(TLS_BLOCK_OUTBOUND_REQ), TlsBlockOutboundReq,
offsetof(TLS_BLOCK_OUTBOUND_REQ, ivOutData),
{
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"ivData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,mainDataBytes,mainDataBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
{"outData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,outBytes,outBytes,outData,MACbytes), Write, NULL},
{"cipherOnlyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,cipherOnlyBytes,cipherOnlyBytes,cipherOnlyData,cipherOnlyData), Read, NULL},
{"ivOutData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
},
},
/*
* DPD_TLS_STREAM_INBOUND_GROUP
* pointer length extent
* ----------------------------------------------------------------
* p0 hashKeyData hashKeyBytes
* p1 hashOnlyData hashOnlyBytes
* p2 ivData ivBytes
* p3 cipherKeyData cipherKeyBytes
* p4 inData inBytes MACcmpBytes
* p5 outData outBytes MACoutBytes
* p6 ivOutData ivOutBytes
* ----------------------------------------------------------------
*/
{
DPD_TLS_STREAM_INBOUND_GROUP, "DPD_TLS_STREAM_INBOUND_GROUP",
sizeof(TLS_STREAM_INBOUND_REQ), TlsStreamInboundReq,
offsetof(TLS_STREAM_INBOUND_REQ, ivOutBytes),
{
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashOnlyBytes,hashOnlyBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
{"ivData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
{"inData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,inBytes,inBytes,inData,MACcmpBytes), Read, NULL},
{"outData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,outBytes,outBytes,outData,MACoutBytes), Write, NULL},
{"ivOutData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
},
},
/*
* DPD_TLS_STREAM_OUTBOUND_GROUP
* pointer length extent
* ----------------------------------------------------------------
* p0 hashKeyData hashKeyBytes
* p1 ivData ivBytes
* p2 cipherKeyData cipherKeyBytes
* p3 hashOnlyData mainDataBytes hashOnlyBytes
* p4 outData outBytes MACbytes
* p5
* p6 ivOutData ivOutBytes
* ----------------------------------------------------------------
*/
{
DPD_TLS_STREAM_OUTBOUND_GROUP, "DPD_TLS_STREAM_OUTBOUND_GROUP",
sizeof(TLS_STREAM_OUTBOUND_REQ), TlsStreamOutboundReq,
offsetof(TLS_STREAM_OUTBOUND_REQ, ivOutBytes),
{
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
{"ivData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,mainDataBytes,mainDataBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
{"outData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,outBytes,outBytes,outData,MACbytes), Write, NULL},
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
{"ivOutData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
},
},
/* Always terminates list, keep this line at the end when adding functions */
{
0, NULL,
0, NULL,
0,
{
{NULL, ALL_ZERO_OFFSETS, Read, NULL},
},
},
};
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_init.c
+409
View File
@@ -0,0 +1,409 @@
/****************************************************************************
* sec2_init.c -- The Initialization code for SEC2 Driver
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
* Copyright (c) 2003-2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* 1.1.0 Nov 16,2004 sec - incorporate linux changes from prior versions
* 1.1.1 Dec 16,2004 sec - remove old unused diagnostics
* 1.2 Jan 27,2005 sec - fix comments associated with global inhibit
*/
#define SEC2_GLOBAL
#define INIT_C
#include "Sec2Driver.h"
/* Interpeak begin */
#undef NUM_CHANNELS
#define NUM_CHANNELS (num_channels)
int num_channels;
extern int ipfreescale_sec_num_channels(void);
/* Interpeak end */
#if defined(DBG)
/* unsigned long SEC2DebugLevel = (DBGTXT_SETRQ | DBGTXT_SVCRQ | DBGTXT_INITDEV | DBGTXT_DPDSHOW | DBGTXT_INFO); */
unsigned long SEC2DebugLevel = (DBGTXT_INFO);
#else
unsigned long SEC2DebugLevel = 0x0;
#endif
#ifdef __KERNEL
EXPORT_SYMBOL(SEC2DebugLevel);
#endif
/*************************************************************************
* Function Name: SEC2DriverInit
* Purpose:
* Step1: Build base address by requesting peripheral base
* Step2: Init ChannelRegister & Cha Register
* Step3: Allocate Channel Assignments
* Step4: Init ChannelAssignments & ChaAssignments
* Step5: Init ProcessQueueTop & ProcessQueueBottom
* Step6: Init Semaphores
* Step7: Reset all Chas and Channels
* Step8: Config all Channels
* Step9: Connect Interrupt
* Step10: Enable Interrupt
* Step11: Return Success
*
* Input: None
*
* Return: SEC2_SUCCESS if everything passed, otherwise the error code
*************************************************************************/
/* static unsigned long CurrentCHAStatus[2]; */
int SEC2DriverInit(void)
{
static int status, i;
static int cha;
static int channel;
static unsigned long address;
static unsigned int idx[] = {0,2,4,3,5,1};
static char *coreID;
#ifdef __KERNEL__
bd_t *binfo = (bd_t *) __res;
#endif
/* Interpeak begin */
num_channels = ipfreescale_sec_num_channels();
/* Interpeak end */
/* Check prior initialization, and initialize driver per OS convention */
#ifdef VXWORKS
if (taskIdVerify (taskNameToId ("tSEC2_pc")) == OK) {
printf ("\nSecurity Processor already initialized\n");
return (OK);
}
#endif
#ifdef __KERNEL__
/* Anything not done in the module init hook? */
#endif
/* sysGetPeripheralBase() gets the PQ3 CCSBAR from the OS */
#ifdef VXWORKS
IOBaseAddress = (sysGetPeripheralBase() + TALITOS2X_BASE_ADDRESS);
#endif
/* get base from the kernel, and map it into an accessible region */
#ifdef __KERNEL__
IOBaseAddress = (unsigned long) ioremap((phys_addr_t)(binfo->bi_immr_base + TALITOS2X_BASE_ADDRESS), SEC2_BASE_SIZE);
#endif
/* Identify the running hardware */
SEC2Dump(DBGTXT_INFO, ("SEC 2.x Security Processor Core\n"));
SEC2Dump(DBGTXT_INFO, ("Driver Version %s %s %s\n", VERSION, __DATE__,__TIME__));
coremask = *((volatile unsigned long *)(IOBaseAddress + IDENTIFICATION_OFFSET) + 1);
switch(coremask)
{
case SEC_COREID_2_0_0:
coreID = "2.0.0";
break;
case SEC_COREID_2_1_0:
coreID = "2.1.0";
break;
default:
coreID = "unknown";
break;
}
SEC2Dump(DBGTXT_INFO, ("Security Core Version Mask: %s (0x%08lx)\n\n", coreID, coremask));
/* set up rebound cha index table */
memcpy ((char *)cha_idx, (char *)idx, sizeof (idx));
/* set up SEC2 register addresses */
/* controller registers */
ChaAssignmentStatusRegister = (volatile unsigned long*)
(IOBaseAddress + CHA_ASSIGNMENT_STATUS_OFFSET);
InterruptControlRegister = (volatile unsigned long*)
(IOBaseAddress + INTERRUPT_CONTROL_OFFSET);
InterruptStatusRegister = (volatile unsigned long*)
(IOBaseAddress + INTERRUPT_STATUS_OFFSET);
InterruptClearRegister = (volatile unsigned long*)
(IOBaseAddress + INTERRUPT_CLEAR_OFFSET);
IdRegister = (volatile unsigned long*)
(IOBaseAddress + IDENTIFICATION_OFFSET);
MasterControlRegister = (volatile unsigned long *)
(IOBaseAddress + SEC2_MASTER_CONTROL_REGISTER);
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->IOBaseAddress=0x%08lx\n", IOBaseAddress));
/* Reset the SEC2 */
/* Note that we turn on global inhibit for all processors. At the time */
/* of coding, GI only exists in the 8349; it's irrelevant to PQ3 devices. */
/* So, it's just turned on for all processors, which is OK for now. */
/* In time, this may be need to become an option in build configuration. */
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->reset Master Control Register\n"));
*(MasterControlRegister) = SEC2_RESET | SEC2_GLOBAL_INHIBIT;
*(MasterControlRegister + 1) = 0;
SEC2Dump(DBGTXT_INITDEV,
("SEC2DriverInit->IdRegister=0x%08lx 0x%08lx\n",
*(IdRegister),
*(IdRegister + 1)));
/* channel registers */
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->channel registers\n"));
for (channel=0, address=CHANNEL_CONFIG_BASE; channel<NUM_CHANNELS;
channel++,address+=CHANNEL_DISTANCE)
{
ChannelConfigRegister[channel] =
(volatile unsigned long*)(IOBaseAddress + address);
}
for (channel=0,address=CHANNEL_POINTER_STATUS_BASE; channel<NUM_CHANNELS;
channel++,address+=CHANNEL_DISTANCE)
{
ChannelPointerStatusRegister[channel] =
(volatile unsigned long*)(IOBaseAddress + address);
}
for (channel=0,address=CHANNEL_NEXT_DESCRIPTOR_BASE; channel<NUM_CHANNELS;
channel++,address+=CHANNEL_DISTANCE)
{
ChannelNextDescriptorRegister[channel] =
(volatile unsigned long*)(IOBaseAddress + address);
}
for (channel=0,address=CHANNEL_DBR_BASE; channel<NUM_CHANNELS;
channel++,address+=CHANNEL_DISTANCE)
{
ChannelDataBufferDescriptorRegister[channel] =
(volatile unsigned long*)(IOBaseAddress + address);
}
for (channel=0,address=CHANNEL_CDPR_BASE; channel<NUM_CHANNELS;
channel++,address+=CHANNEL_DISTANCE)
{
ChannelCurrentDescriptorPointerRegister[channel] =
(volatile unsigned long*)(IOBaseAddress + address);
}
/* cha registers */
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->cha registers\n"));
for (cha=0,address=CHA_RESET_CONTROL_BASE; cha<NUM_CHAS;
cha++,address+=CHA_DISTANCE)
{
ChaResetControlRegister[cha] =
(volatile unsigned long*)(IOBaseAddress + address);
}
for (cha=0,address=CHA_INTERRUPT_STATUS_BASE; cha<NUM_CHAS;
cha++,address+=CHA_DISTANCE)
{
ChaInterruptStatusRegister[cha_idx[cha]] =
(volatile unsigned long*)(IOBaseAddress + address);
}
for (cha=0,address=CHA_INTERRUPT_CONTROL_BASE; cha<NUM_CHAS;
cha++,address+=CHA_DISTANCE)
{
ChaInterruptControlRegister[cha] =
(volatile unsigned long*)(IOBaseAddress + address);
}
/* allocate other driver variables */
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->allocating other driver variables\n"));
/* variable init */
FreeChannels = NUM_CHANNELS;
FreeRngas = NUM_RNGAS;
FreeAfhas = NUM_AFHAS;
FreeDesas = NUM_DESAS;
FreeMdhas = NUM_MDHAS;
FreePkhas = NUM_PKHAS;
FreeAesas = NUM_AESAS;
/* Init ChannelAssignments */
for (channel=0; channel<NUM_CHANNELS; channel++)
{
if ((status = InitChannelAssignment(channel)) != SEC2_SUCCESS)
{
return status;
}
}
/* Init ChaAssignments */
for (cha=0; cha<16; cha++)
{
ChaAssignments[cha] = CHA_DYNAMIC;
}
/* initialize process queue */
for (i=0; i<QUEUE_ENTRY_DEPTH-1;i++)
Queue[i].next = &Queue[i+1];
Queue[QUEUE_ENTRY_DEPTH-1].next = &Queue[0];
for (i=1; i<QUEUE_ENTRY_DEPTH;i++)
Queue[i].previous = &Queue[i-1];
Queue[0].previous = &Queue[QUEUE_ENTRY_DEPTH-1];
ProcessQueueTop = &Queue[0];
ProcessQueueBottom = &Queue[0];
IOInitSemaphores();
#ifdef VXWORKS
if ((status = IOInitQs()) != SEC2_SUCCESS)
return status;
if ((status = IORegisterDriver()) != SEC2_SUCCESS)
return status;
#endif
/* reset all the CHA's */
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->reset Reset Control Register %d\n", NUM_CHAS));
for (cha=0; cha<NUM_CHAS; cha++)
{
*(ChaResetControlRegister[cha]) = 0;
*(ChaResetControlRegister[cha] + 1) = CHA_SOFTWARE_RESET;
if (cha == CHA_DES) /* is this cha des? */
{
*(ChaInterruptControlRegister[cha]) = 0;
*(ChaInterruptControlRegister[cha] + 1) = CHA_DESA_KEY_PARITY_ERROR_DISABLE;
}
if (cha == CHA_PKHA) /* is this cha the pkha? */
{
*(ChaInterruptControlRegister[cha]) = 0;
*(ChaInterruptControlRegister[cha] + 1) = CHA_PKHA_ILLEGAL_ADDR_ERROR_DISABLE;
}
}
/* reset all the channels */
SEC2Dump(DBGTXT_INITDEV,
("SEC2DriverInit->reset Crypto-Channel Configuration Registers %d\n",
NUM_CHANNELS));
for (channel=0; channel<NUM_CHANNELS; channel++)
{
/* reset the channel & configure the channels */
*(ChannelConfigRegister[channel]) = CHANNEL_RESET;
*(ChannelConfigRegister[channel] + 1) = 0;
*(ChannelConfigRegister[channel]) = 0;
*(ChannelConfigRegister[channel] + 1) = CHANNEL_INTEN | CHANNEL_BURST128;
}
/* Enable the main interrupt from SEC core at the controller/OS level */
if ((status = IOConnectInterrupt()) != SEC2_SUCCESS)
return status;
/* enable interrupts at the core level -- channels done and all errors */
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->enable interrupts\n"));
/* Unmask all "done" bits from all channels and accelerators */
*(InterruptControlRegister) = ALL_CHANNEL_INT_DONE_MASK | ALL_CHANNEL_INT_ERROR_MASK;
*(InterruptControlRegister + 1) = ALL_CHA_INT_ERROR_MASK;
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->return SEC2_SUCCESS!\n"));
return SEC2_SUCCESS;
} /* end of DriverEntry */
IO_STATUS InitChannelAssignment(int channel)
{
size_t count;
SEC2Dump(DBGTXT_INITDEV, ("InitChannelAssignment channel=%d\n", channel+1));
ChannelAssignments[channel].assignment = CHANNEL_FREE;
ChannelAssignments[channel].ownerTaskId = 0;
ChannelAssignments[channel].pReq = NULL;
ChannelAssignments[channel].pCurrReq = NULL;
ChannelAssignments[channel].Dpds = &dpd[channel][0];
for (count=0; count<MAX_DPDS; count++)
{
ChannelAssignments[channel].Dpds[count] = &Descriptors[channel][count];
if (ChannelAssignments[channel].Dpds[count] == NULL)
return SEC2_IO_MEMORY_ALLOCATE_ERROR;
}
SEC2Dump(DBGTXT_INITDEV, ("InitChannelAssignment channel=%d done\n", channel+1));
return (SEC2_SUCCESS);
}
/* Module initialization stuff for Linux */
#ifdef __KERNEL__
/* fopts struct from device registration */
SEC2_GLOBAL struct file_operations sec2_fopts = {
open: SEC2Open,
release: SEC2Close,
ioctl: SEC2_ioctl,
};
static int __init sec2_init(void)
{
int rtstat;
/* Assume that this is going to be a chrdev */
/* If a major number isn't specified, default to dynamic assignment */
rtstat = register_chrdev(SEC2_DEVMAJOR, SEC2_DEVNAME, &sec2_fopts);
if (rtstat < 0) {
printk(KERN_WARNING "sec2drv: can't register driver, fatal\n");
return rtstat;
}
if (SEC2_DEVMAJOR == 0) /* if no specific major requested, and there was no error above */
sec2_devmajor = rtstat; /* set the dynamic number */
/* Now go call the standard driver initialization */
return SEC2DriverInit();
}
static void __exit sec2_exit(void)
{
int rtstat;
rtstat = unregister_chrdev(sec2_devmajor, SEC2_DEVNAME);
free_irq(MPC85xx_IRQ_SEC, NULL);
}
EXPORT_SYMBOL (SEC2_ioctl);
EXPORT_SYMBOL (MarkScatterBuffer);
/* EXPORT_SYMTAB */
module_init(sec2_init);
module_exit(sec2_exit);
MODULE_LICENSE("Freescale Restricted");
MODULE_DESCRIPTION("SEC 2.x Security Core Device Driver");
MODULE_AUTHOR("Freescale Semiconductor, Inc.");
#endif
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_io.c
+188
View File
@@ -0,0 +1,188 @@
/****************************************************************************
* sec2_io.c -- bus operations for SEC2 Driver
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
* Copyright (c) 2003, 2004 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/* Revision History:
* 1.0 Aug 24,2003 dgs adapted from the final version of mpc18x
* May 12,2004 sec - switched core interrupt for 8555 configuration
* 1.1.0 Dec 05,2004 sec - merge in linux support from prior versions
* 1.1.1 Dec 16,2004 sec - remove lock variable, remove old diagnostics
* 1.2 Jan 27,2005
*/
#include "Sec2Driver.h"
#ifdef __KERNEL__
extern void InterruptServiceRoutine(int irq, void *dev_id, struct pt_regs *pt_regs);
#endif
#ifdef VXWORKS
#include "intLib.h"
IO_STATUS IOInitQs()
{
/* set up ISR/ProcessingComplete message queue */
IsrMsgQId = msgQCreate(MAX_MESSAGES, sizeof(DEVICE_REGS), MSG_Q_FIFO);
if (IsrMsgQId == NULL)
return SEC2_VXWORKS_CANNOT_CREATE_QUEUE;
return SEC2_SUCCESS;
}
IO_STATUS IORegisterDriver()
{
/* start ProcessComplete task, with high priority */
if (taskSpawn ("tSEC2_pc",
PROCESSING_COMPLETE_PRIORITY,
0,
PROCESSING_COMPLETE_STACKSIZE,
(FUNCPTR)ProcessingComplete,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0) == TASK_ID_ERROR)
return (SEC2_UNKNOWN_ERROR);
/* add the driver to the driver table */
driverNum = iosDrvInstall(SEC2Open, NULL, SEC2Open, SEC2Close, NULL, NULL, SEC2_ioctl);
if (driverNum < 0)
return (SEC2_IO_VXWORKS_DRIVER_TABLE_ADD_ERROR);
(void) iosDevAdd(&vxworksDrvDev, vxworksDrvName, driverNum);
return (SEC2_SUCCESS);
}
#endif
void IOInitSemaphores()
{
/* initialize semaphores */
#ifdef VXWORKS
ChannelAssignSemId = semMCreate(SEM_Q_PRIORITY | SEM_INVERSION_SAFE | SEM_DELETE_SAFE);
QueueSemId = semMCreate(SEM_Q_PRIORITY | SEM_INVERSION_SAFE | SEM_DELETE_SAFE);
#endif
#ifdef __KERNEL__
spin_lock_init(&ChannelAssignLock);
spin_lock_init(&QueueLock);
#endif
}
/*
* IOConnectInterrupt()
*/
#ifdef VXWORKS
/* the Interrupt connect should be moved to sysLib.c since it is board dependent */
IO_STATUS IOConnectInterrupt()
{
/* Interpeak begin */
int inum_sec2;
extern int ipfreescale_sec_inum(void);
inum_sec2 = ipfreescale_sec_inum();
/* Install our IRQ handler */
if (intConnect(INUM_TO_IVEC(inum_sec2),
(VOIDFUNCPTR)InterruptServiceRoutine,
(int)NULL) == ERROR)
return(ERROR);
/* Enable the handler at the controller level */
intEnable(inum_sec2);
/* Interpeak end */
SEC2Dump(DBGTXT_INITDEV, ("IOConnectInterrupt ISR connected\n"));
return(SEC2_SUCCESS);
}
#endif
#ifdef __KERNEL__
IO_STATUS IOConnectInterrupt()
{
if ((request_irq(MPC85xx_IRQ_SEC, InterruptServiceRoutine, 0, "mpc-sec", NULL)) != 0)
return -1;
return (SEC2_SUCCESS);
}
#endif
#ifdef __KERNEL__
#include <linux/sched.h>
#include <asm/atomic.h>
#include <asm/semaphore.h>
unsigned long irq_flag; /* here for spin locks to use */
static inline int __sem_update_count(struct semaphore *sem, int incr)
{
int old_count, tmp;
__asm__ __volatile__("\n"
"1: lwarx %0,0,%3\n"
" srawi %0,%0,31\n"
" andc %1,%0,%1\n"
" add %1,%1,%4\n"
PPC405_ERR77(0,%3)
" stwcx. %1,0,%3\n"
" bne 1b"
: "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
: "r" (&sem->count), "r" (incr), "m" (sem->count)
: "cc");
return old_count;
}
long __down_interruptible_timeout(struct semaphore *sem, long timeout)
{
int retval = 0;
struct task_struct *tsk = current;
DECLARE_WAITQUEUE(wait, tsk);
tsk->state = TASK_INTERRUPTIBLE;
add_wait_queue_exclusive(&sem->wait, &wait);
smp_wmb();
while (__sem_update_count(sem, -1) <= 0) {
if (signal_pending(current)) {
__sem_update_count(sem, 0);
retval = -EINTR;
break;
}
timeout = schedule_timeout(timeout);
tsk->state = TASK_INTERRUPTIBLE;
}
tsk->state = TASK_RUNNING;
remove_wait_queue(&sem->wait, &wait);
wake_up(&sem->wait);
return timeout >= 0 ? 0 : -1;
}
#endif
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_ioctl.c
+248
View File
@@ -0,0 +1,248 @@
/****************************************************************************
* sec2_ioctl.c - Driver service hooks for the SEC2.x security core
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
* Copyright (c) 2003-2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* 1.1.0 Nov 22,2003 sec - merge in changes from Linux fork
* 1.1.1 Dev 15,2004 sec - remove old diagnostics
* 1.2 Jan 27,2005 sec - fix minor compiler warnings
*/
#include "Sec2Driver.h"
/* Interpeak begin */
#undef NUM_CHANNELS
#define NUM_CHANNELS (num_channels)
extern int num_channels;
/* Interpeak end */
/* Interpeak begin */
#ifdef __KERNEL__
Ctx_queue_header ctx_done_queue = { NULL, NULL };
Ctx_queue_header ctx_error_queue = { NULL, NULL };
static inline Ctx_queue_element *ctx_element_dequeue(Ctx_queue_header *hdr, int pid)
{
register Ctx_queue_element *element;
register Ctx_queue_element *prev = NULL;
for(element = hdr->head; element != NULL; element = element->next)
{
if (element->pid == pid)
{
if (prev == NULL)
{
/* Matched the first element */
hdr->head = element->next;
if (!hdr->head)
{
/* Queue is now empty */
hdr->tail = NULL;
}
}
else
{
prev->next = element->next;
if (prev->next == NULL)
{
/* Matched the last element */
hdr->tail = prev;
}
}
break;
}
prev = element;
}
return element;
}
#endif
/* Interpeak end */
#ifdef __KERNEL__
int SEC2Open(struct inode *nd, struct file *fil)
{
SEC2Dump(DBGTXT_SETRQ, ("SEC2Open() called, inode 0x%08x, file 0x%08x\n", (unsigned int)nd, (unsigned int)fil));
MOD_INC_USE_COUNT;
return 0;
}
#endif
#ifdef VXWORKS
int SEC2Open(DEV_HDR *pDevHdr, int mode, int flags)
{
return((int)pDevHdr);
}
#endif
#ifdef __KERNEL__
int SEC2Close(struct inode *nd, struct file *fil)
#else
int SEC2Close(int devDesc)
#endif
{
int channel;
QUEUE_ENTRY *QueueEntry;
int callingTaskId = (int)taskIdSelf();
SEC2Dump(DBGTXT_SETRQ, ("SEC2Close() called\n"));
QueueEntry = ProcessQueueTop;
while (QueueEntry->pReq != NULL)
{
if (QueueEntry->requestingTaskId == callingTaskId)
{
((GENERIC_REQ*)QueueEntry->pReq)->status = SEC2_CANCELLED_REQUEST;
QueueEntry->pReq = NULL;
}
QueueEntry = QueueEntry->next;
}
IOLockChannelAssignment();
/* release any leftover reserved channels associated with this descriptor */
for (channel=0; channel<NUM_CHANNELS; channel++)
if (ChannelAssignments[channel].ownerTaskId == callingTaskId)
/* release this channel */
ReleaseChannel(channel+1, callingTaskId, TRUE);
IOUnLockChannelAssignment();
ScheduleNext();
#ifdef __KERNEL__
MOD_DEC_USE_COUNT;
#endif
return SEC2_SUCCESS;
}
#ifdef __KERNEL__
int SEC2_ioctl(struct inode *nd,
struct file *fil,
unsigned int ioctlCode,
unsigned long param)
#else
int SEC2_ioctl(int devDesc, register int ioctlCode, register void *param)
#endif
{
int status;
#ifdef __KERNEL__
MALLOC_REQ *mem;
/* Interpeak begin */
Ctx_queue_element *item;
/* Interpeak end */
#endif
status = SEC2_SUCCESS;
switch (ioctlCode)
{
case IOCTL_PROC_REQ:
if (param == (int)NULL)
{
status = SEC2_INVALID_ADDRESS;
break;
}
status = ProcessRequest((GENERIC_REQ *)param, (int)taskIdSelf());
break;
case IOCTL_GET_STATUS:
GetStatus((STATUS_REQ *)param, (int)taskIdSelf());
break;
#ifdef __KERNEL__
case IOCTL_MALLOC:
if ((((MALLOC_REQ *)param)->ptr = malloc(((MALLOC_REQ *)param)->sz)) == 0) {
status = SEC2_MALLOC_FAILED;
break;
}
memset(((MALLOC_REQ *)param)->ptr, 0, ((MALLOC_REQ *)param)->sz);
status = SEC2_SUCCESS;
break;
case IOCTL_COPYFROM:
mem = (MALLOC_REQ *)param;
mem->pid = current->pid;
copy_from_user(mem->to, mem->from, mem->sz);
status = SEC2_SUCCESS;
break;
case IOCTL_COPYTO:
mem = (MALLOC_REQ *)param;
mem->pid = current->pid;
copy_to_user(mem->to, mem->from, mem->sz);
status = SEC2_SUCCESS;
break;
case IOCTL_FREE:
free((void *)param);
break;
#endif
/* Interpeak begin */
#ifdef __KERNEL__
case IOCTL_GET_DONE:
IOLockChannelAssignment();
item = ctx_element_dequeue(&ctx_done_queue, (int)taskIdSelf());
if(item)
{
status = put_user(item->ctx, (void **)param);
kfree(item);
}
else
{
status = put_user(0, (void **)param);
}
IOUnLockChannelAssignment();
break;
case IOCTL_GET_ERROR:
IOLockChannelAssignment();
item = ctx_element_dequeue(&ctx_error_queue, (int)taskIdSelf());
if(item)
{
status = put_user(item->ctx, (void **)param);
kfree(item);
}
else
{
status = put_user(0, (void **)param);
}
IOUnLockChannelAssignment();
break;
#endif
/* Interpeak end */
default:
/* invalide IOCTL code, return an error */
/* need OS-specific error value here */
return (S_ioLib_UNKNOWN_REQUEST);
} /* end switch (ioctlCode) */
return (status);
}
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_request.c
+721
View File
@@ -0,0 +1,721 @@
/****************************************************************************
* sec2_request.c - request/response handler
****************************************************************************
* Copyright (c) 2003-2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* Jun 04,2004 sec - add completion cleanup for scatter pointers
* 1.1.0 Nov 16,2004 sec - integrate linux changes from prior versions, eliminate
* StartDescriptor() function
* 1.1.1 Dec 16,2004 sec - remove lock variable, remove old diagnostics, add
* minor optimizations
* 1.2 Jan 27,2005 sec - add CHA details to error dump
*/
#include "Sec2Driver.h"
/* Interpeak begin */
#define MAX_NUM_CHANNELS 4
#undef NUM_CHANNELS
#define NUM_CHANNELS (num_channels)
extern int num_channels;
/* Interpeak end */
/* Interpeak begin */
#ifdef __KERNEL__
static inline void ctx_element_enqueue(Ctx_queue_header *hdr, Ctx_queue_element *item)
{
item->next = NULL;
if (hdr->head)
{
/* Place item in the end of the queue */
hdr->tail->next = item;
hdr->tail = item;
}
else
{
/* Queue is empty */
hdr->head = item;
hdr->tail = item;
}
}
#endif
/* Interpeak end */
/********************************************************************************/
/* Function Name: ProcessRequest */
/* Purpose: To handle the IO request routine */
/* Input: req - the pointer of the IO request */
/* callingTaskId - the task Id */
/* Output: req - the pointer of the IO request buffer */
/* Return: SEC2_Success if success, otherwise error code */
/********************************************************************************/
int ProcessRequest(GENERIC_REQ *req, int callingTaskId)
{
register int freeChannel;
int status;
QUEUE_ENTRY *newEntry;
BOOLEAN bAvailableCHA;
/* Interpeak begin */
/* schedule queued requests on any freed channels */
ScheduleNext();
/* Interpeak end */
/* check to see if the required CHA is available */
bAvailableCHA = FALSE;
if (CheckChas(req->opId) == SEC2_SUCCESS)
bAvailableCHA = TRUE;
IOLockChannelAssignment();
if (bAvailableCHA && FreeChannels > 0)
{
/* dynamic request, see if there are any free channels */
for (freeChannel=0;freeChannel<NUM_CHANNELS;freeChannel++)
{
if (ChannelAssignments[freeChannel].assignment == CHANNEL_FREE)
{
SEC2Dump(DBGTXT_SETRQ, ("ProcessRequest(): free channel = %d\n", freeChannel));
/* reserve this free channel for this operation */
ChannelAssignments[freeChannel].assignment = CHANNEL_DYNAMIC;
ChannelAssignments[freeChannel].ownerTaskId = callingTaskId;
ChannelAssignments[freeChannel].pReq = req;
FreeChannels--;
IOUnLockChannelAssignment();
/* translate this request into DPD's */
status = RequestToDpd(req, freeChannel);
if (status != SEC2_SUCCESS)
return CompleteRequest(freeChannel, status, FALSE, NULL);
/* write the address of the first DPD to the channel */
/* this starts the request */
*(ChannelNextDescriptorRegister[freeChannel]+1) = __vpa((unsigned long)(ChannelAssignments[freeChannel].Dpds[0]));
#ifdef __KERNEL__
/* Interpeak begin */
if(!in_interrupt())
/* Interpeak end */
schedule();
#endif
return SEC2_SUCCESS;
}
}
/* Interpeak begin */
goto queue;
/* Interpeak end */
} else {
/* Interpeak begin */
queue:
/* Interpeak end */
IOUnLockChannelAssignment();
if (QueueEntryDepth >= QUEUE_ENTRY_DEPTH)
return (SEC2_INSUFFICIENT_REQS);
#ifndef __KERNEL__
semTake (QueueSemId, 100);
#endif
newEntry = ProcessQueueBottom;
ProcessQueueBottom = ProcessQueueBottom->next;
/* fill in the queue structure */
newEntry->pReq = req;
newEntry->requestingTaskId = callingTaskId;
QueueEntryDepth++;
#ifndef __KERNEL__
semGive (QueueSemId);
#endif
SEC2Dump(DBGTXT_SETRQ, ("Queueing Up->newEntry=0x%lx\n", (unsigned long)newEntry));
}
return SEC2_SUCCESS;
} /* end of ProcessDynamicRequest() */
#ifdef __KERNEL__
void ProcessingComplete(unsigned long not_used)
#else
void ProcessingComplete(void)
#endif
{
register int channel;
register int cha;
/* Interpeak begin */
int status[MAX_NUM_CHANNELS]; /* The status for the channel */
BOOLEAN bIsComplete[MAX_NUM_CHANNELS]; /* Indicates that the channel is done */
/* Interpeak end */
DEVICE_REGS *pRegs; /* register? */
static DEVICE_REGS regs;
#ifdef DBG
int i;
#endif
pRegs = &regs;
/* we sit here forever, waiting for register content messages from the ISR */
while (1)
{
#ifdef VXWORKS
/* wait for register content message from the ISR */
if (msgQReceive(IsrMsgQId,
(char*)pRegs,
sizeof(DEVICE_REGS),
WAIT_FOREVER) != sizeof(DEVICE_REGS))
continue;
#else
QmsgWait();
#endif
#ifdef DBG
SEC2Dump(DBGTXT_SVCRQ, ("ProcessingComplete(): IntStatus - "));
if ((pRegs->IntStatus[0] & ALL_CHANNEL_INT_ERROR_MASK) ||
(pRegs->IntStatus[1] & ALL_CHA_INT_ERROR_MASK))
{
SEC2Dump(DBGTXT_SVCRQ, ("Error "));
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_1) SEC2Dump(DBGTXT_SVCRQ, ("ch1 "));
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_2) SEC2Dump(DBGTXT_SVCRQ, ("ch2 "));
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_3) SEC2Dump(DBGTXT_SVCRQ, ("ch3 "));
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_4) SEC2Dump(DBGTXT_SVCRQ, ("ch4 "));
if (pRegs->IntStatus[1] & CHA_INT_ERROR_DEU) SEC2Dump(DBGTXT_SVCRQ, ("DES "));
if (pRegs->IntStatus[1] & CHA_INT_ERROR_AESU) SEC2Dump(DBGTXT_SVCRQ, ("AES "));
if (pRegs->IntStatus[1] & CHA_INT_ERROR_MDEU) SEC2Dump(DBGTXT_SVCRQ, ("MD "));
if (pRegs->IntStatus[1] & CHA_INT_ERROR_AFEU) SEC2Dump(DBGTXT_SVCRQ, ("AF "));
if (pRegs->IntStatus[1] & CHA_INT_ERROR_RNG) SEC2Dump(DBGTXT_SVCRQ, ("RNG "));
if (pRegs->IntStatus[1] & CHA_INT_ERROR_PKEU) SEC2Dump(DBGTXT_SVCRQ, ("PK "));
SEC2Dump(DBGTXT_SVCRQ, ("\n"));
for (i = 0; i < NUM_CHANNELS; i++)
SEC2Dump(DBGTXT_SVCRQ, ("Ch %d ptr status: 0x%08lx%08lx\n",
i + 1,
pRegs->ChannelError[i][0],
pRegs->ChannelError[i][1]));
SEC2Dump(DBGTXT_SVCRQ, ("DES int status: 0x%08lx\n", pRegs->ChaError[cha_idx[0]][1]));
SEC2Dump(DBGTXT_SVCRQ, ("AES int status: 0x%08lx\n", pRegs->ChaError[cha_idx[1]][1]));
SEC2Dump(DBGTXT_SVCRQ, ("MDEU int status: 0x%08lx\n", pRegs->ChaError[cha_idx[2]][1]));
SEC2Dump(DBGTXT_SVCRQ, ("AFEU int status: 0x%08lx\n", pRegs->ChaError[cha_idx[3]][1]));
SEC2Dump(DBGTXT_SVCRQ, ("RNG int status: 0x%08lx\n", pRegs->ChaError[cha_idx[4]][1]));
SEC2Dump(DBGTXT_SVCRQ, ("PKEU int status: 0x%08lx\n", pRegs->ChaError[cha_idx[5]][1]));
}
else
if ((pRegs->IntStatus[0] & ALL_CHANNEL_INT_DONE_MASK) ||
(pRegs->IntStatus[1] & ALL_CHA_INT_DONE_MASK))
{
SEC2Dump(DBGTXT_SVCRQ, ("Done "));
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_1) SEC2Dump(DBGTXT_SVCRQ, ("ch1 "));
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_2) SEC2Dump(DBGTXT_SVCRQ, ("ch2 "));
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_3) SEC2Dump(DBGTXT_SVCRQ, ("ch3 "));
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_4) SEC2Dump(DBGTXT_SVCRQ, ("ch4 "));
if (pRegs->IntStatus[1] & CHA_INT_DONE_DEU) SEC2Dump(DBGTXT_SVCRQ, ("DES "));
if (pRegs->IntStatus[1] & CHA_INT_DONE_AESU) SEC2Dump(DBGTXT_SVCRQ, ("AES "));
if (pRegs->IntStatus[1] & CHA_INT_DONE_MDEU) SEC2Dump(DBGTXT_SVCRQ, ("MD "));
if (pRegs->IntStatus[1] & CHA_INT_DONE_AFEU) SEC2Dump(DBGTXT_SVCRQ, ("AF "));
if (pRegs->IntStatus[1] & CHA_INT_DONE_RNG) SEC2Dump(DBGTXT_SVCRQ, ("RNG "));
if (pRegs->IntStatus[1] & CHA_INT_DONE_PKEU) SEC2Dump(DBGTXT_SVCRQ, ("PK "));
}
else
SEC2Dump(DBGTXT_SVCRQ, ("Unknown"));
SEC2Dump(DBGTXT_SVCRQ, ("\n"));
#endif
for (channel = 0; channel < NUM_CHANNELS; channel++)
{
bIsComplete[channel] = FALSE;
status[channel] = SEC2_SUCCESS;
}
/* deal with any channel done interrupts */
if ((pRegs->IntStatus[0] & ALL_CHANNEL_INT_DONE_MASK) != 0)
/* found at least one channel done interrupt */
for (channel = 0; channel < NUM_CHANNELS; channel++)
if ((pRegs->IntStatus[0] & ChannelDoneInterruptMasks[channel]) != 0)
/* found a channel done interrupt */
bIsComplete[channel] = TRUE;
/* deal with any CHA done (manual/debug/target mode) interrupts */
if ((pRegs->IntStatus[1] & ALL_CHA_INT_DONE_MASK) != 0)
/* found at least one CHA done interrupt */
for (cha=0; cha<NUM_CHAS; cha++)
if ((pRegs->IntStatus[1] & ChaDoneInterruptMasks[cha]) != 0)
{
/* found a CHA done interrupt, notify application */
if (cha < 4)
channel = (pRegs->ChaAssignmentStatus[0] >> (cha * 8)) & 0xF;
else
channel = (pRegs->ChaAssignmentStatus[1] >> ((cha - 4) * 8)) & 0xF;
if (channel > 0 && channel < (NUM_CHANNELS+1))
bIsComplete[channel-1] = TRUE;
SEC2Dump(DBGTXT_SVCRQ,
("ProcessingComplete(): Channel %d Assigned\n",
channel));
} /* if (CHA int status) */
/* deal with any error interrupts */
if (((pRegs->IntStatus[0] & ALL_INT_ERRORS_MASK_LOW) != 0) ||
((pRegs->IntStatus[1] & ALL_INT_ERRORS_MASK_HIGH) != 0))
{
/* need to find the channel */
/* deal with CHA error interrupts */
for (cha=0; cha<NUM_CHAS; cha++)
{
if (cha < 4)
channel = (pRegs->ChaAssignmentStatus[0] >> (cha * 8)) & 0xF;
else
channel = (pRegs->ChaAssignmentStatus[1] >> ((cha - 4) * 8)) & 0xF;
if (channel > 0 && channel < (NUM_CHANNELS+1) &&
(pRegs->IntStatus[0] & ChannelErrorInterruptMasks[channel-1]) != 0)
{
status[channel-1] = SEC2_CHA_ERROR;
bIsComplete[channel-1] = TRUE;
}
} /* end for cha loop */
for (channel=0; channel<NUM_CHANNELS; channel++)
{
if ((pRegs->IntStatus[0] & ChannelErrorInterruptMasks[channel]) != 0)
{
bIsComplete[channel] = TRUE;
/* this was a channel error then */
/* return the error code with some sort of quasi-priority, since */
/* multiples could occur */
status[channel] = SEC2_UNKNOWN_ERROR;
if ((pRegs->ChannelError[channel][1] & CHANNEL_CHA_ERROR) ||
(pRegs->ChannelError[channel][1] & CHANNEL_CHA_ASSIGN_ERROR))
status[channel] = SEC2_CHA_ERROR;
if (pRegs->ChannelError[channel][1] & CHANNEL_UNRECOGNIZED_HEADER_ERROR)
status[channel] = SEC2_INVALID_OPERATION_ID;
if (pRegs->ChannelError[channel][1] & CHA_PARITY_SYSTEM_ERROR)
status[channel] = SEC2_PARITY_SYSTEM_ERROR;
if (pRegs->ChannelError[channel][1] & CHANNEL_NULL_FETCH_POINTER)
status[channel] = SEC2_INCOMPLETE_POINTER;
if ((pRegs->ChannelError[channel][1] & CHANNEL_SCATTER_LENGTH_ERROR) ||
(pRegs->ChannelError[channel][1] & CHANNEL_SCATTER_BOUND_ERROR) ||
(pRegs->ChannelError[channel][1] & CHANNEL_GATHER_LENGTH_ERROR) ||
(pRegs->ChannelError[channel][1] & CHANNEL_GATHER_BOUND_ERROR) ||
(pRegs->ChannelError[channel][1] & CHANNEL_ZERO_SCATTER_LEN_ERROR))
status[channel] = SEC2_SCATTER_LIST_ERROR;
if (pRegs->ChannelError[channel][1] & CHANNEL_BUS_MASTER_ERROR)
status[channel] = SEC2_BUS_MASTER_ERROR;
if ((pRegs->ChannelError[channel][1] & CHANNEL_FETCH_FIFO_NEARMISS_ERROR) ||
(pRegs->ChannelError[channel][1] & CHANNEL_FETCH_FIFO_OVERFLOW_ERROR))
status[channel] = SEC2_FETCH_FIFO_OVERFLOW;
} /* if (valid interrupt) */
} /* for (channels) */
} /* if (cha int done) */
for (channel = 0; channel < NUM_CHANNELS; channel++)
if (bIsComplete[channel])
CompleteRequest(channel, status[channel], TRUE, pRegs);
/* schedule queued requests on any freed channels */
ScheduleNext();
} /* if (message from queue) */
SEC2Dump(DBGTXT_SVCRQ, ("ProcessingComplete Done\n"));
} /* End of ProcessingComplete */
void RemoveQueueEntry(QUEUE_ENTRY *entry)
{
SEC2Dump(DBGTXT_SVCRQ, ("RemoveQueueEntry->Entry=0x%lx\n", (unsigned long)entry));
semTake (QueueSemId, 100);
if (QueueEntryDepth > 0) {
QueueEntryDepth--;
entry->requestingTaskId = 0;
entry->pReq = NULL;
SEC2Dump(DBGTXT_SVCRQ, ("RemoveQueueEntry->QueueEntryDepth=0x%lx\n", QueueEntryDepth));
ProcessQueueTop = ProcessQueueTop->next;
SEC2Dump(DBGTXT_SVCRQ, ("RemoveQueueEntry->ProcessQueueTop=0x%lx\n", (unsigned long)ProcessQueueTop));
}
semGive (QueueSemId);
return;
} /* end of RemoveQueueEntry */
/* does not return a status value -- all errors are returned to the requesting
application through the request structure status value */
/* this should only be called with channel assignments locked */
void ScheduleNext()
{
register unsigned int channel;
int status;
IOLockChannelAssignment();
channel = 0;
while (channel < NUM_CHANNELS)
{
if (ChannelAssignments[channel].assignment != CHANNEL_FREE)
{
channel++;
continue;
}
/* Is there anything queued up? */
if (QueueEntryDepth > 0) {
if (CheckChas(ProcessQueueTop->pReq->opId) != SEC2_SUCCESS) {
SEC2Dump(DBGTXT_SETRQ, ("ScheduleNext->Breaking Out CheckChas fails 0x%lx\n", ProcessQueueTop->pReq->opId));
break;
}
ChannelAssignments[channel].assignment = CHANNEL_DYNAMIC;
ChannelAssignments[channel].pReq = ProcessQueueTop->pReq;
ChannelAssignments[channel].ownerTaskId = ProcessQueueTop->requestingTaskId;
RemoveQueueEntry(ProcessQueueTop);
FreeChannels--;
SEC2Dump(DBGTXT_SETRQ, ("ScheduleNext->FreeChannels 0x%x\n", FreeChannels));
IOUnLockChannelAssignment();
status = RequestToDpd(ChannelAssignments[channel].pReq, channel);
if (status != SEC2_SUCCESS)
{
/* Problem with request, return error to the application */
CompleteRequest(channel, status, TRUE, NULL);
IOLockChannelAssignment();
continue;
}
else
{
/* write the address of the first DPD to the channel */
/* this starts hardware processing the request */
*(ChannelNextDescriptorRegister[channel]+1) = __vpa((unsigned long)(ChannelAssignments[channel].Dpds[0]));
#ifdef __KERNEL__
/* Interpeak begin */
if(!in_interrupt())
/* Interpeak end */
schedule();
#endif
IOLockChannelAssignment();
}
}
/* finished with this channel */
channel++;
}
IOUnLockChannelAssignment();
}
/* As T2.0 is designed, output from PKHA will be "front loaded" in the output */
/* buffer such that data starts at the zeroth element in the output buffer */
/* As long as the output and the modulus size match, this is fine. If the */
/* output is larger than the modulus, then we would normally expect the */
/* output to be at the far end of the buffer (leading zeros at the start) */
/* However, it puts the modulated output "up front". Normally, there's no */
/* reason for the output > modulus, but if it exists, this corrects for it */
#ifdef PKHA_OUTPUT_SHIFT
static void fixPKHAresult(DPD *pkDesc)
{
int i;
unsigned long modlen, outlen, shift, *outbuf;
unsigned long *src, *dest;
modlen = (pkDesc->fld[0].len & 0xffff0000) >> 16;
outlen = (pkDesc->fld[4].len & 0xffff0000) >> 16;
outbuf = (unsigned long *)pkDesc->fld[4].ptr;
/* Check difference and save, if not different, exit */
if (outlen > modlen)
shift = (outlen - modlen)/4;
else
return;
dest = &outbuf[(outlen / 4) - 1];
src = &outbuf[(modlen / 4) - 1];
for (i = 0; i < shift; i++)
{
*(dest--) = *(src);
*(src--) = 0;
}
}
#endif
int CompleteRequest(int channel, int status, BOOLEAN bDoNotify, DEVICE_REGS *pRegs)
{
register GENERIC_REQ *req = NULL;
int i, j;
IOLockChannelAssignment();
if (ChannelAssignments[channel].pReq != NULL)
req = ChannelAssignments[channel].pReq;
else
{
/* Interpeak begin */
IOUnLockChannelAssignment();
/* Interpeak end */
return -1;
}
SEC2Dump(DBGTXT_SVCRQ, ("CompleteRequest->channel %d, request=0x%lx\n", channel, (unsigned long)req));
((GENERIC_REQ*)req)->status = status;
ChannelAssignments[channel].pReq = NULL;
#ifdef PKHA_OUTPUT_SHIFT
/* This is here as a workaround for completing PKHA */
for (i = 0; i < MAX_DPDS; i++)
if (ChannelAssignments[channel].Dpds[i] != NULL)
if ((ChannelAssignments[channel].Dpds[i]->header & 0xf8) == 0x00000080) /* PKHA? */
fixPKHAresult(ChannelAssignments[channel].Dpds[i]);
#endif
/* Walk through the request's descriptor list. For any DPD that was in use, */
/* if they used scatter lists, we have to return the free elements to the */
/* fragment pool. So check for scattered pointers, and unmap them */
for (i = 0; i < MAX_DPDS; i++)
if (ChannelAssignments[channel].Dpds[i] != NULL)
for (j = 0; j < NUM_DPD_FLDS; j++)
if (ChannelAssignments[channel].Dpds[i]->fld[j].len & PTRTYPE_JBIT)
UnmapScatterFragments((void *)ChannelAssignments[channel].Dpds[i]->fld[j].ptr);
/* Change the assignment state. This is the last thing to be done
since the channel becomes immediately available when you set it
to FREE (dynamic) or ASSIGNED (static).
*/
if (ChannelAssignments[channel].assignment == CHANNEL_DYNAMIC)
{
FreeChannels++;
ChannelAssignments[channel].assignment = CHANNEL_FREE;
}
/* Interpeak begin */
#ifdef __KERNEL__
if (bDoNotify)
{
if (status == SEC2_SUCCESS)
{
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_IS_PID)
{
Ctx_queue_element *item;
item = kmalloc(sizeof(Ctx_queue_element), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
if (item != NULL)
{
item->pid = (int)((GENERIC_REQ *)req)->notify;
item->ctx = ((GENERIC_REQ*)req)->pNotifyCtx;
ctx_element_enqueue(&ctx_done_queue, item);
}
}
}
else
{
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_ERROR_IS_PID)
{
Ctx_queue_element *item;
item = kmalloc(sizeof(Ctx_queue_element), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
if (item != NULL)
{
item->pid = (int)((GENERIC_REQ *)req)->notify_on_error;
item->ctx = ((GENERIC_REQ*)req)->pNotifyCtx;
ctx_element_enqueue(&ctx_error_queue, item);
}
}
}
}
#endif
/* Interpeak end */
IOUnLockChannelAssignment();
if (bDoNotify)
{
if (status == SEC2_SUCCESS)
{
/* This is a normal completion notifier */
SEC2Dump(DBGTXT_SVCRQ, ("CompleteReqest(): success notifier in process\n"));
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_IS_PID)
{
#ifdef __KERNEL__
send_sig(SIGUSR1, find_task_by_pid((long)((GENERIC_REQ*)req)->notify), 0);
#endif
#ifdef VXWORKS
(void)kill((long)((GENERIC_REQ*)req)->notify, SIGUSR1);
#endif
}
else
{
if ((((GENERIC_REQ*)req)->notify) != NULL)
(((GENERIC_REQ*)req)->notify)(((GENERIC_REQ*)req)->pNotifyCtx);
}
}
else
{
/* else this is an error notifier... */
SEC2Dump(DBGTXT_SVCRQ, ("CompleteReqest(): error notifier in process\n"));
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_ERROR_IS_PID)
{
#ifdef __KERNEL__
send_sig(SIGUSR2, find_task_by_pid((long)((GENERIC_REQ *)req)->notify_on_error), 0);
#endif
#ifdef VXWORKS
(void)kill((long)((GENERIC_REQ*)req)->notify_on_error, SIGUSR2);
#endif
}
else
{
if ((((GENERIC_REQ*)req)->notify_on_error) != NULL)
{
/* first, do the error context save */
((GENERIC_REQ*)req)->ctxNotifyOnErr.errorcode = ((GENERIC_REQ*)req)->status;
if (pRegs == NULL)
memset(&(((GENERIC_REQ*)req)->ctxNotifyOnErr.driverstatus),0,sizeof(STATUS_REQ));
else
CopyRegsToStatus(&(((GENERIC_REQ*)req)->ctxNotifyOnErr.driverstatus), pRegs);
((GENERIC_REQ*)req)->ctxNotifyOnErr.request = req;
/* now call the handler */
SEC2Dump(DBGTXT_SVCRQ, ("CompleteRequest(): calling error notifier with context\n"));
(((GENERIC_REQ*)req)->notify_on_error)(&(((GENERIC_REQ*)req)->ctxNotifyOnErr));
}
}
}
}
return status;
}
int GetStatus(STATUS_REQ *pStatus, int callingTaskId)
{
int i;
pStatus->ChaAssignmentStatusRegister[0] = *(unsigned long *)(ChaAssignmentStatusRegister);
pStatus->ChaAssignmentStatusRegister[1] = *(unsigned long *)(ChaAssignmentStatusRegister + 1);
pStatus->InterruptControlRegister[0] = *(unsigned long *)(InterruptControlRegister);
pStatus->InterruptControlRegister[1] = *(unsigned long *)(InterruptControlRegister + 1);
pStatus->InterruptStatusRegister[0] = *(unsigned long *)(InterruptStatusRegister);
pStatus->InterruptStatusRegister[1] = *(unsigned long *)(InterruptStatusRegister + 1);
pStatus->IdRegister = *(unsigned long *)(IdRegister);
for (i = 0; i < NUM_CHANNELS; i++)
{
pStatus->ChannelStatusRegister[i][0] = *(unsigned long *)(ChannelPointerStatusRegister[i]);
pStatus->ChannelStatusRegister[i][1] = *(unsigned long *)(ChannelPointerStatusRegister[i] + 1);
}
for (i = 0; i < NUM_CHANNELS; i++)
{
pStatus->ChannelConfigurationRegister[i][0] = *(unsigned long *)(ChannelConfigRegister[i]);
pStatus->ChannelConfigurationRegister[i][1] = *(unsigned long *)(ChannelConfigRegister[i] + 1);
}
for (i = 0; i < NUM_CHAS; i++)
{
pStatus->CHAInterruptStatusRegister[i][0] = *(unsigned long *)(ChaInterruptStatusRegister[i]);
pStatus->CHAInterruptStatusRegister[i][1] = *(unsigned long *)(ChaInterruptStatusRegister[i] + 1);
}
pStatus->QueueEntryDepth = QueueEntryDepth;
pStatus->FreeChannels = FreeChannels;
pStatus->FreeRngas = FreeRngas;
pStatus->FreeAfhas = FreeAfhas;
pStatus->FreeDesas = FreeDesas;
pStatus->FreeMdhas = FreeMdhas;
pStatus->FreePkhas = FreePkhas;
pStatus->FreeAesas = FreeAesas;
pStatus->FreeKeas = FreeKeas;
pStatus->BlockSize = BlockSize;
return SEC2_SUCCESS;
}
void CopyRegsToStatus(STATUS_REQ *pStatus, DEVICE_REGS *pRegs)
{
int channel, cha;
/* Build up the driver status structure. It will be passed back by
the notify on error routine
*/
pStatus->InterruptStatusRegister[0] = pRegs->IntStatus[0];
pStatus->InterruptStatusRegister[1] = pRegs->IntStatus[1];
pStatus->ChaAssignmentStatusRegister[0] = pRegs->ChaAssignmentStatus[0];
pStatus->ChaAssignmentStatusRegister[1] = pRegs->ChaAssignmentStatus[1];
for (channel=0; channel<NUM_CHANNELS; channel++)
{
pStatus->ChannelStatusRegister[channel][0] = pRegs->ChannelError[channel][0];
pStatus->ChannelStatusRegister[channel][1] = pRegs->ChannelError[channel][1];
}
for (cha=0; cha<NUM_CHAS; cha++)
{
pStatus->CHAInterruptStatusRegister[cha][0] = pRegs->ChaError[cha][0];
pStatus->CHAInterruptStatusRegister[cha][1] = pRegs->ChaError[cha][1];
}
}
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2_sctrMap.c
+403
View File
@@ -0,0 +1,403 @@
/****************************************************************************
* sec2_sctrMap.c - scatter buffer pointer marker
****************************************************************************
* Copyright (c) 2004-2005 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
***************************************************************************/
/*
* 1.2 Jan 27,2005 sec - change some obsolete names
*/
#include "Sec2Driver.h"
typedef struct _scatter_assoc
{
unsigned long offset;
unsigned long pos;
} SCATTER_ASSOC;
static const SCATTER_ASSOC SCTMAP_RNG[] =
{
{offsetof(RNG_REQ, rngData), 0x10},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_DES_CBC_CTX[] =
{
{offsetof(DES_CBC_CRYPT_REQ, inIvData), 0x02},
{offsetof(DES_CBC_CRYPT_REQ, keyData), 0x04},
{offsetof(DES_CBC_CRYPT_REQ, inData), 0x08},
{offsetof(DES_CBC_CRYPT_REQ, outData), 0x10},
{offsetof(DES_CBC_CRYPT_REQ, outIvData), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_DES_ECB[] =
{
{offsetof(DES_CRYPT_REQ, keyData), 0x04},
{offsetof(DES_CRYPT_REQ, inData), 0x08},
{offsetof(DES_CRYPT_REQ, outData), 0x10},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_RC4_LDCTX_CRYPT_ULCTX[] =
{
{offsetof(ARC4_LOADCTX_CRYPT_REQ, inCtxData), 0x02},
{offsetof(ARC4_LOADCTX_CRYPT_REQ, inData), 0x08},
{offsetof(ARC4_LOADCTX_CRYPT_REQ, outData), 0x10},
{offsetof(ARC4_LOADCTX_CRYPT_REQ, outCtxData), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_RC4_LDKEY_CRYPT_ULCTX[] =
{
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, keyData), 0x04},
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, inData), 0x08},
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, outData), 0x10},
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, outCtxData), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_HASH_LDCTX_HASH_ULCTX[] =
{
{offsetof(HASH_REQ, ctxData), 0x02},
{offsetof(HASH_REQ, inData), 0x08},
{offsetof(HASH_REQ, outData), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_HASH_LDCTX_HASH_PAD_ULCTX[] =
{
{offsetof(HASH_REQ, ctxData), 0x02},
{offsetof(HASH_REQ, inData), 0x08},
{offsetof(HASH_REQ, outData), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_HASH_LDCTX_HMAC_ULCTX[] =
{
{offsetof(HMAC_PAD_REQ, keyData), 0x04},
{offsetof(HMAC_PAD_REQ, inData), 0x08},
{offsetof(HMAC_PAD_REQ, outData), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_MM_LDCTX_EXP_ULCTX[] =
{
{offsetof(MOD_EXP_REQ, aData), 0x02},
{offsetof(MOD_EXP_REQ, expData), 0x04},
{offsetof(MOD_EXP_REQ, modData), 0x08},
{offsetof(MOD_EXP_REQ, outData), 0x10},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_MM_SS_RSA_EXP[] =
{
{offsetof(MOD_SS_EXP_REQ, modData), 0x01},
{offsetof(MOD_SS_EXP_REQ, aData), 0x04},
{offsetof(MOD_SS_EXP_REQ, expData), 0x08},
{offsetof(MOD_SS_EXP_REQ, bData), 0x10},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_MM_LDCTX_R2MODN_ULCTX[] =
{
{offsetof(MOD_R2MODN_REQ, modData), 0x08},
{offsetof(MOD_R2MODN_REQ, outData), 0x10},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_MM_LDCTX_RRMODP_ULCTX[] =
{
{offsetof(MOD_RRMODP_REQ, pData), 0x01},
{offsetof(MOD_RRMODP_REQ, nBytes), 0x08},
{offsetof(MOD_RRMODP_REQ, outData), 0x10},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_MOD_LDCTX_2OP_ULCTX[] =
{
{offsetof(MOD_2OP_REQ, modData), 0x01},
{offsetof(MOD_2OP_REQ, bData), 0x02},
{offsetof(MOD_2OP_REQ, aData), 0x04},
{offsetof(MOD_2OP_REQ, outData), 0x10},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_EC_LDCTX_kP_ULCTX[] =
{
{offsetof(ECC_POINT_REQ, nData), 0x01},
{offsetof(ECC_POINT_REQ, eData), 0x02},
{offsetof(ECC_POINT_REQ, buildData), 0x04},
{offsetof(ECC_POINT_REQ, b1Data), 0x08},
{offsetof(ECC_POINT_REQ, b2Data), 0x10},
{offsetof(ECC_POINT_REQ, b3Data), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_EC_SPKBUILD_ULCTX[] =
{
{offsetof(ECC_SPKBUILD_REQ, a0Data), 0x01},
{offsetof(ECC_SPKBUILD_REQ, a1Data), 0x02},
{offsetof(ECC_SPKBUILD_REQ, a2Data), 0x04},
{offsetof(ECC_SPKBUILD_REQ, a3Data), 0x08},
{offsetof(ECC_SPKBUILD_REQ, b0Data), 0x10},
{offsetof(ECC_SPKBUILD_REQ, b1Data), 0x20},
{offsetof(ECC_SPKBUILD_REQ, buildData), 0x40},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_EC_2OP[] =
{
{offsetof(ECC_2OP_REQ, bData), 0x01},
{offsetof(ECC_2OP_REQ, aData), 0x02},
{offsetof(ECC_2OP_REQ, modData), 0x04},
{offsetof(ECC_2OP_REQ, outData), 0x08},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_IPSEC_CBC[] =
{
{offsetof(IPSEC_CBC_REQ, hashKeyData), 0x01},
{offsetof(IPSEC_CBC_REQ, hashInData), 0x02},
{offsetof(IPSEC_CBC_REQ, cryptKeyData), 0x04},
{offsetof(IPSEC_CBC_REQ, cryptCtxInData), 0x08},
{offsetof(IPSEC_CBC_REQ, inData), 0x10},
{offsetof(IPSEC_CBC_REQ, cryptDataOut), 0x20},
{offsetof(IPSEC_CBC_REQ, hashDataOut), 0x40},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_IPSEC_ESP[] =
{
{offsetof(IPSEC_ESP_REQ, hashKeyData), 0x01},
{offsetof(IPSEC_ESP_REQ, hashInData), 0x02},
{offsetof(IPSEC_ESP_REQ, cryptCtxInData), 0x04},
{offsetof(IPSEC_ESP_REQ, cryptKeyData), 0x08},
{offsetof(IPSEC_ESP_REQ, inData), 0x10},
{offsetof(IPSEC_ESP_REQ, cryptDataOut), 0x20},
{offsetof(IPSEC_ESP_REQ, cryptCtxOutData), 0x40},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_IPSEC_STATIC_CBC[] =
{
{offsetof(IPSEC_CBC_REQ, hashKeyData), 0x01},
{offsetof(IPSEC_CBC_REQ, hashInData), 0x02},
{offsetof(IPSEC_CBC_REQ, cryptKeyData), 0x04},
{offsetof(IPSEC_CBC_REQ, cryptCtxInData), 0x08},
{offsetof(IPSEC_CBC_REQ, inData), 0x10},
{offsetof(IPSEC_CBC_REQ, cryptDataOut), 0x20},
{offsetof(IPSEC_CBC_REQ, hashDataOut), 0x40},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_IPSEC_ECB[] =
{
{offsetof(IPSEC_ECB_REQ, hashKeyData), 0x02},
{offsetof(IPSEC_ECB_REQ, cryptKeyData), 0x04},
{offsetof(IPSEC_ECB_REQ, hashInData), 0x08},
{offsetof(IPSEC_ECB_REQ, inData), 0x10},
{offsetof(IPSEC_ECB_REQ, cryptDataOut), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_IPSEC_AES_CBC[] =
{
{offsetof(IPSEC_AES_CBC_REQ, hashKeyData), 0x01},
{offsetof(IPSEC_AES_CBC_REQ, hashInData), 0x02},
{offsetof(IPSEC_AES_CBC_REQ, cryptKeyData), 0x04},
{offsetof(IPSEC_AES_CBC_REQ, cryptCtxInData), 0x08},
{offsetof(IPSEC_AES_CBC_REQ, inData), 0x10},
{offsetof(IPSEC_AES_CBC_REQ, cryptDataOut), 0x20},
{offsetof(IPSEC_AES_CBC_REQ, hashDataOut), 0x40},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_IPSEC_AES_ECB[] =
{
{offsetof(IPSEC_AES_ECB_REQ, hashKeyData), 0x01},
{offsetof(IPSEC_AES_ECB_REQ, hashInData), 0x02},
{offsetof(IPSEC_AES_ECB_REQ, cryptKeyData), 0x04},
{offsetof(IPSEC_AES_ECB_REQ, inData), 0x10},
{offsetof(IPSEC_AES_ECB_REQ, cryptDataOut), 0x20},
{offsetof(IPSEC_AES_ECB_REQ, hashDataOut), 0x40},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_AESA_CRYPT[] =
{
{offsetof(AESA_CRYPT_REQ, inIvData), 0x02},
{offsetof(AESA_CRYPT_REQ, keyData), 0x04},
{offsetof(AESA_CRYPT_REQ, inData), 0x08},
{offsetof(AESA_CRYPT_REQ, outData), 0x10},
{offsetof(AESA_CRYPT_REQ, outCtxData), 0x20},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_CCMP[] =
{
{offsetof(CCMP_REQ, context), 0x02},
{offsetof(CCMP_REQ, keyData), 0x04},
{offsetof(CCMP_REQ, AADData), 0x08},
{offsetof(CCMP_REQ, FrameData), 0x10},
{offsetof(CCMP_REQ, cryptDataOut), 0x20},
{offsetof(CCMP_REQ, MICData), 0x40},
{0, 0}
};
static const SCATTER_ASSOC SCTMAP_SRTP[] =
{
{offsetof(SRTP_REQ, hashKeyData), 0x01},
{offsetof(SRTP_REQ, ivData), 0x02},
{offsetof(SRTP_REQ, keyData), 0x04},
{offsetof(SRTP_REQ, inData), 0x08},
{offsetof(SRTP_REQ, cryptDataOut), 0x10},
{offsetof(SRTP_REQ, digestData), 0x20},
{offsetof(SRTP_REQ, outIvData), 0x40},
{0, 0}
};
static unsigned char locate(SCATTER_ASSOC *assoc,
unsigned long offset)
{
int i = 0;
while(assoc[i].offset)
if (assoc[i].offset == offset)
return(assoc[i].pos);
else
i++;
return(0);
}
/* Locate a pointer field within a request struct, look it up, and mark the */
/* scatter buffer mask if it is such */
int MarkScatterBuffer(void *request, void *buffer)
{
GENERIC_REQ *rq;
unsigned long offs;
rq = (GENERIC_REQ *)request;
offs = (unsigned long)buffer - (unsigned long)request;
switch (rq->opId & DESC_TYPE_MASK)
{
case DPD_RNG_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_RNG, offs);
break;
case DPD_DES_CBC_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_DES_CBC_CTX, offs);
break;
case DPD_DES_ECB_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_DES_ECB, offs);
break;
case DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_RC4_LDCTX_CRYPT_ULCTX, offs);
break;
case DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_RC4_LDKEY_CRYPT_ULCTX, offs);
break;
case DPD_HASH_LDCTX_HASH_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_HASH_LDCTX_HASH_ULCTX, offs);
break;
case DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_HASH_LDCTX_HASH_PAD_ULCTX, offs);
break;
case DPD_HASH_LDCTX_HMAC_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_HASH_LDCTX_HMAC_ULCTX, offs);
break;
case DPD_MM_LDCTX_EXP_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_LDCTX_EXP_ULCTX, offs);
break;
case DPD_MM_SS_EXP_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_SS_RSA_EXP, offs);
break;
case DPD_MM_LDCTX_R2MODN_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_LDCTX_R2MODN_ULCTX, offs);
break;
case DPD_MM_LDCTX_RRMODP_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_LDCTX_RRMODP_ULCTX, offs);
break;
case DPD_MOD_LDCTX_2OP_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MOD_LDCTX_2OP_ULCTX, offs);
break;
case DPD_EC_LDCTX_kP_ULCTX_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_EC_LDCTX_kP_ULCTX, offs);
break;
case DPD_EC_2OP_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_EC_2OP, offs);
break;
case DPD_IPSEC_CBC_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_CBC, offs);
break;
case DPD_IPSEC_ECB_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_ECB, offs);
break;
case DPD_IPSEC_AES_CBC_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_AES_CBC, offs);
break;
case DPD_IPSEC_AES_ECB_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_AES_ECB, offs);
break;
case DPD_AESA_CRYPT_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_AESA_CRYPT, offs);
break;
case DPD_IPSEC_ESP_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_ESP, offs);
break;
case DPD_CCMP_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_CCMP, offs);
break;
case DPD_SRTP_GROUP:
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_SRTP, offs);
break;
}
return 0;
}
components/ip_net2-6.9/ipfreescale/sec2/1_2/sec2isr.c
+170
View File
@@ -0,0 +1,170 @@
/****************************************************************************
* sec2isr.c -- The Interrupt Service code for SEC2 Driver
****************************************************************************
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
* Copyright (c) 2003, 2004 Freescale Semiconductor
* All Rights Reserved. Proprietary and Confidential.
*
* NOTICE: The information contained in this file is proprietary
* to Freescale Semiconductor, and is being made available to
* Freescale's customers under strict license agreements.
* Use or disclosure of this information is permissible only
* under the terms of the existing license agreement.
****************************************************************************/
/*
* Revision History:
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
* May 12,2004 sec - turned on some windview events for debug
* Jun 06,2004 sec - corrected channel reset logic
* Jun 10,2004 sec - remove superfluous I/O calls
* Jul 22,2004 sec - added double CHA reset to handle errata
* 1.1.0 Nov 16,2004 sec - updated for linux change merge from prior revs
* 1.1.1 Dec 16,2004 sec - cleanup, remove unused diagnostics
* 1.2 Jan 27,2005
*/
#include "Sec2Driver.h"
/* Interpeak begin */
#undef NUM_CHANNELS
#define NUM_CHANNELS (num_channels)
extern int num_channels;
/* Interpeak end */
/**************************************************************************
* Function Name: InterruptServiceRoutine
* Purpose: To handle all interrupt generated by Channel or CHA (Done or Error)
* indicated by the Interrupt Status Register
* If Error, clean the InterruptStatusRegister by writing InterruptClearRegister
* If Done, call ProcessRequestDone routine
* Input: Interrupt - PKINTERRUPT
* Context - PVOID the request Context
*
*************************************************************************/
#ifdef __KERNEL__
DEVICE_REGS pRegs_queue[PREGS_QUEUE_DEPTH];
unsigned PQ_head = 0;
unsigned PQ_tail = 0;
unsigned PQ_entries = 0;
extern void ProcessingComplete(unsigned long not_used);
DECLARE_TASKLET(isr_tasklet,ProcessingComplete,0);
void InterruptServiceRoutine(int irq, void *dev_id, struct pt_regs *pt_regs)
#else
void InterruptServiceRoutine(void)
#endif
{
register int cha, cha_res;
register int channel;
unsigned long temp[2];
unsigned long intStatus0, intStatus1;
DEVICE_REGS *pRegs;
static DEVICE_REGS regs;
/* save interrupt status register for the ProcessingComplete */
intStatus0 = *(InterruptStatusRegister);
intStatus1 = *(InterruptStatusRegister + 1);
pRegs = &regs;
pRegs->IntStatus[0] = intStatus0;
pRegs->IntStatus[1] = intStatus1;
/* check for error interrupts, was there any error? */
if ((intStatus0 & ALL_INT_ERRORS_MASK_LOW) ||
(intStatus1 & ALL_INT_ERRORS_MASK_HIGH))
{
/* save assigment statii for background servicing to use */
pRegs->ChaAssignmentStatus[0] = *(ChaAssignmentStatusRegister);
pRegs->ChaAssignmentStatus[1] = *(ChaAssignmentStatusRegister + 1);
/* service CHA error interrupts first */
for (cha_res = 0; cha_res < NUM_CHAS; cha_res++)
{
/* save the channel this CHA is assigned to if any */
if (cha_res < 4)
channel = (pRegs->ChaAssignmentStatus[0] >> (cha_res * 8)) & 0xF;
else
channel = (pRegs->ChaAssignmentStatus[1] >> ((cha_res - 4) * 8)) & 0xF;
cha = cha_idx[cha_res];
if ((intStatus1 & ChaErrorInterruptMasks[cha]) ||
(channel > 0 && channel < (NUM_CHANNELS+1) &&
(intStatus0 & ChannelErrorInterruptMasks[channel-1])))
{
/* found a CHA error interrupt, read the CHA status register */
pRegs->ChaError[cha][0] = *(unsigned long *)(ChaInterruptStatusRegister[cha]);
pRegs->ChaError[cha][1] = *(unsigned long *)(ChaInterruptStatusRegister[cha] + 1);
/* ensure that the associated channel is reset */
if (channel > 0 && channel < (NUM_CHANNELS+1))
intStatus0 |= ChannelErrorInterruptMasks[channel-1];
pRegs->ChannelError[channel][0] = *(unsigned long *)(ChannelPointerStatusRegister[channel-1]);
pRegs->ChannelError[channel][1] = *(unsigned long *)(ChannelPointerStatusRegister[channel-1] + 1);
/* Done extracting info, reset the CHA */
/* This will be done twice to work around an errata that has to do with CHA */
/* reset hold time */
*(ChaResetControlRegister[cha]) = CHA_SOFTWARE_RESET;
*(ChaResetControlRegister[cha] + 1) = 0;
*(ChaResetControlRegister[cha]) = CHA_SOFTWARE_RESET;
*(ChaResetControlRegister[cha] + 1) = 0;
if (cha == CHA_DES) /* is this cha des? */
{
*(ChaInterruptControlRegister[cha]) = CHA_DESA_KEY_PARITY_ERROR_DISABLE;
*(ChaInterruptControlRegister[cha] + 1) = 0;
}
if (cha == CHA_PKHA) /* is this cha the pkha? */
{
*(ChaInterruptControlRegister[cha]) = CHA_PKHA_ILLEGAL_ADDR_ERROR_DISABLE;
*(ChaInterruptControlRegister[cha] + 1) = 0;
}
} /* if (cha causes error) */
} /* for (all chas) */
/* look at the channel error interrupts next */
for (channel=0; channel<NUM_CHANNELS; channel++)
{
if (intStatus0 & ChannelErrorInterruptMasks[channel])
{
/* fetch a copy of the CPSR for out-of-ISR processing */
pRegs->ChannelError[channel][0] = *(unsigned long *)(ChannelPointerStatusRegister[channel]);
pRegs->ChannelError[channel][1] = *(unsigned long *)(ChannelPointerStatusRegister[channel] + 1);
/* reset the channel */
*(ChannelConfigRegister[channel]) = (unsigned long)CHANNEL_RESET;
*(ChannelConfigRegister[channel] + 1) = (unsigned long)0;
/* give the hardware a chance to clock... */
temp[0] = *(unsigned long *)(ChannelConfigRegister[channel]);
/* re-enable channel interrupts */
*(ChannelConfigRegister[channel]) = (unsigned long)0;
*(ChannelConfigRegister[channel] + 1) = (unsigned long)CHANNEL_INTEN | CHANNEL_BURST128;
} /* if (channel error) */
} /* for (all channels) */
} /* if (any error interrupt) */
/* clear latched interrupts at the control register level */
*(InterruptClearRegister) = intStatus0;
*(InterruptClearRegister + 1) = intStatus1;
/* schedule process complete function */
#ifdef __KERNEL__
(void)QmsgSend();
#else
(void)msgQSend(IsrMsgQId, (char*)pRegs, sizeof(DEVICE_REGS), NO_WAIT, MSG_PRI_NORMAL);
#endif
} /* end of SEC2InterruptService */