original files of m241
This commit is contained in:
neelimap
@@ -0,0 +1,115 @@
|
||||
/* 01ipfreescale.cdf - IPFREESCALE configuration file */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2006-2007 Wind River Systems, Inc.
|
||||
*
|
||||
* The right to copy, distribute or otherwise make use of this software
|
||||
* may be licensed only pursuant to the terms of an applicable Wind River
|
||||
* license agreement. No license to Wind River intellectual property rights
|
||||
* is granted herein. All rights not licensed by Wind River are reserved
|
||||
* by Wind River.
|
||||
*/
|
||||
|
||||
/*
|
||||
modification history
|
||||
--------------------
|
||||
12oct16,ghl To change freescale test commands to visible component, and
|
||||
IPFREESCALE don't depends on SHELL.
|
||||
01a,02jul07,mcarlste Added file contents
|
||||
01b,09mar11,dhessing Added SEC4 engine support
|
||||
*/
|
||||
|
||||
#ifdef _WRS_CONFIG_COMPONENT_IPFREESCALE
|
||||
|
||||
#ifdef _WRS_CONFIG_BSP_SUPPORTS_IPFREESCALE_SEC4
|
||||
Component INCLUDE_IPFREESCALE
|
||||
{
|
||||
NAME Hardware crypto offload for Freescale SEC4 engines.
|
||||
SYNOPSIS Enables the Freescale SEC4.X security engine
|
||||
CONFIGLETTES ipfreescale_config.c
|
||||
MODULES ipfreescale_sec.o sec4_init.o
|
||||
CFG_PARAMS SEC4_IRQ_COALESCING_COUNT SEC4_IRQ_COALESCING_TIME \
|
||||
SEC4_JOBQUEUE_INPUT_RING_SIZE SEC4_JOBQUEUE_OUTPUT_RING_SIZE
|
||||
REQUIRES INCLUDE_IPHWCRYPTO
|
||||
_CHILDREN FOLDER_CRYPTO
|
||||
}
|
||||
#else
|
||||
Component INCLUDE_IPFREESCALE
|
||||
{
|
||||
NAME Hardware crypto offload for Freescale SEC2 engines.
|
||||
SYNOPSIS Enables the Freescale SEC2.X security engine
|
||||
CONFIGLETTES ipfreescale_config.c
|
||||
MODULES ipfreescale_sec.o sec2_init.o
|
||||
CFG_PARAMS SEC2_CORE_VERSION SEC2_DEVICE_FAMILY
|
||||
REQUIRES INCLUDE_IPHWCRYPTO
|
||||
_CHILDREN FOLDER_CRYPTO
|
||||
}
|
||||
#endif
|
||||
|
||||
/* This is a hidden component */
|
||||
Component INCLUDE_IPFREESCALE_CMD
|
||||
{
|
||||
NAME FREESCALE Test Commands
|
||||
SYNOPSIS freescale test command
|
||||
MODULES ipfreescale_cmd_freescale.o
|
||||
_CHILDREN FOLDER_CRYPTO
|
||||
REQUIRES INCLUDE_IPFREESCALE INCLUDE_IPCOM_SHELL_CMD
|
||||
}
|
||||
|
||||
/******************** Configuration Parameters *****************************/
|
||||
|
||||
#ifdef _WRS_CONFIG_BSP_SUPPORTS_IPFREESCALE_SEC4
|
||||
Parameter SEC4_IRQ_COALESCING_COUNT {
|
||||
NAME SEC4 job queue interrupt coalescing count threshold
|
||||
SYNOPSIS The number of completed SEC4 jobs before raising an interrupt.\
|
||||
Valid values are 1 - 255. If SEC4_JQ_IRQ_COAL_TIME expire,\
|
||||
then an interrupt will still be raised even though the count\
|
||||
threshold has not been reached.
|
||||
TYPE uint
|
||||
DEFAULT 1
|
||||
}
|
||||
|
||||
Parameter SEC4_IRQ_COALESCING_TIME {
|
||||
NAME SEC4 job queue interrupt coalescing timer threshold
|
||||
SYNOPSIS The maximum time after completing a SEC4 job before raising \
|
||||
an interrupt. Each unit represent 64 SEC4 interface clocks. \
|
||||
Valid values are 0 - 65535.
|
||||
TYPE uint
|
||||
DEFAULT 0
|
||||
}
|
||||
|
||||
Parameter SEC4_JOBQUEUE_INPUT_RING_SIZE {
|
||||
NAME SEC4 job queue input ring size
|
||||
SYNOPSIS Number of entries in the SEC4 job queue input ring, \
|
||||
used for submitting jobs to the SEC4. \
|
||||
Valid values are 1 - 1023.
|
||||
TYPE uint
|
||||
DEFAULT 256
|
||||
}
|
||||
|
||||
Parameter SEC4_JOBQUEUE_OUTPUT_RING_SIZE {
|
||||
NAME SEC4 job queue output ring size
|
||||
SYNOPSIS Number of entries in the SEC4 job queue output ring, \
|
||||
holding completed jobs from the SEC4. \
|
||||
Valid values are 1 - 1023.
|
||||
TYPE uint
|
||||
DEFAULT 256
|
||||
}
|
||||
#else
|
||||
/* INCLUDE_IPFREESCALE configuration parameters */
|
||||
Parameter SEC2_CORE_VERSION {
|
||||
NAME SEC2 Core Version
|
||||
SYNOPSIS The security engine core version: 2.0, 2.1, 2.2, 2.4, 3.0 or 3.3.
|
||||
TYPE char *
|
||||
DEFAULT "2.0"
|
||||
}
|
||||
|
||||
Parameter SEC2_DEVICE_FAMILY {
|
||||
NAME SEC2 Device Family
|
||||
SYNOPSIS The PowerQUICC device family: 2 for PowerQUICC II Pro and 3 for PowerQUICC III.
|
||||
TYPE char *
|
||||
DEFAULT "3"
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,12 @@
|
||||
# Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: common.vxconfig,v $ $Revision: 1.6 $
|
||||
# $Source: /home/interpeak/CVSRoot/ipfreescale/config/common.vxconfig,v $
|
||||
# $Author: myakan $
|
||||
# $State: Exp $ $Locker: $
|
||||
#
|
||||
# INTERPEAK_COPYRIGHT_STRING
|
||||
|
||||
#hidden option that enables IPFREESCALE
|
||||
config SUPPORTS_FREESCALE
|
||||
bool
|
||||
default y
|
||||
|
||||
@@ -0,0 +1,162 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK CONFIGURATION SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_config.c,v $ $Revision: 1.8.10.1 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/config/ipfreescale_config.c,v $
|
||||
* $Author: svc-cmnet $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
* IPFREESCALE - Hardware crypto support product - configuration.
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include "ipfreescale_config.h"
|
||||
|
||||
#include <ipcom_type.h>
|
||||
#include <ipcom_cstyle.h>
|
||||
#include <ipcom_err.h>
|
||||
#include <ipcom_shell.h>
|
||||
#include <ipcom_sysvar.h>
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
IP_EXTERN int ipfreescale_cmd_freescale(int argc, char **argv);
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
IP_PUBLIC Ip_err ipfreescale_configure(void);
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_conf_sysvar
|
||||
*===========================================================================
|
||||
* Freescale configuration Variables
|
||||
*/
|
||||
#ifdef _WRS_CONFIG_BSP_SUPPORTS_IPFREESCALE_SEC4
|
||||
IP_CONST Ipcom_sysvar ipfreescale_conf_sysvar[] =
|
||||
{
|
||||
/* SEC4 job queue interrupt coalescing count threshold */
|
||||
IP_SYSVAR("ipfreescale.sec4.IrqCoalescingCount", "1", IPCOM_MAKE_STR(SEC4_IRQ_COALESCING_COUNT)),
|
||||
|
||||
/* SEC4 job queue interrupt coalescing time threshold */
|
||||
IP_SYSVAR("ipfreescale.sec4.IrqCoalescingTime", "0", IPCOM_MAKE_STR(SEC4_IRQ_COALESCING_TIME)),
|
||||
|
||||
/* SEC4 job queue input ring size */
|
||||
IP_SYSVAR("ipfreescale.sec4.JobQueueInputRingSize", "256", IPCOM_MAKE_STR(SEC4_JOBQUEUE_INPUT_RING_SIZE)),
|
||||
|
||||
/* SEC4 job queue output ring size */
|
||||
IP_SYSVAR("ipfreescale.sec4.JobQueueOutputRingSize", "256", IPCOM_MAKE_STR(SEC4_JOBQUEUE_OUTPUT_RING_SIZE)),
|
||||
|
||||
{ IP_NULL, IP_NULL }
|
||||
};
|
||||
#else
|
||||
IP_CONST Ipcom_sysvar ipfreescale_conf_sysvar[] =
|
||||
{
|
||||
/* SEC core version: 2.0, 2.1, 2.2 or 2.4 */
|
||||
IP_SYSVAR("ipfreescale.sec2.core_version", "2.0", SEC2_CORE_VERSION),
|
||||
|
||||
/* Device family: PowerQUICC II Pro (2) or PowerQUICC III (3) */
|
||||
IP_SYSVAR("ipfreescale.sec2.device_family", "3", SEC2_DEVICE_FAMILY),
|
||||
|
||||
{ IP_NULL, IP_NULL }
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 STATIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 GLOBAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_configure
|
||||
*===========================================================================
|
||||
* Description: Product configure hook. Called by IPCOM at startup.
|
||||
* Parameters: none.
|
||||
* Returns: IPCOM_SUCCESS = ok
|
||||
* IPCOM_ERR_FAILED = error
|
||||
*
|
||||
*/
|
||||
IP_PUBLIC Ip_err
|
||||
ipfreescale_configure(void)
|
||||
{
|
||||
Ip_err ret;
|
||||
|
||||
ret = ipcom_sysvar_setv(ipfreescale_conf_sysvar, 0);
|
||||
if(ret != IPCOM_SUCCESS)
|
||||
return ret;
|
||||
|
||||
#if defined(INCLUDE_IPFREESCALE_CMD) || !defined(IP_PORT_VXWORKS)
|
||||
ret = ipcom_shell_add_cmd("freescale", "freescale [cmd] <modifier...>", "Test Freescale hardware crypto",
|
||||
(Ipcom_shell_cmd_type)ipfreescale_cmd_freescale,
|
||||
IPCOM_PRIORITY_DEFAULT, IPCOM_PROC_STACK_DEFAULT);
|
||||
if(ret != IPCOM_SUCCESS)
|
||||
return ret;
|
||||
#endif /* defined(INCLUDE_IPFREESCALE_CMD) || !defined(IP_PORT_VXWORKS) */
|
||||
|
||||
return IPCOM_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,243 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK CONFIGURATION HEADER FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_config.h,v $ $Revision: 1.22.40.1 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/config/ipfreescale_config.h,v $
|
||||
* $Author: svc-cmnet $ $Date: 2013-03-13 07:45:24 $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef IPFREESCALE_CONFIG_H
|
||||
#define IPFREESCALE_CONFIG_H
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include <ipcom_config.h>
|
||||
#ifdef IPCRYPTO
|
||||
#include <ipcrypto_config.h>
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Check for duplicate SEC type */
|
||||
#if (defined(IPFREESCALE_SEC2) && defined(IPFREESCALE_COLDFIRE)) || \
|
||||
(defined(IPFREESCALE_SEC4) && defined(IPFREESCALE_COLDFIRE)) || \
|
||||
(defined(IPFREESCALE_SEC2) && defined(IPFREESCALE_SEC4))
|
||||
#error "Duplicate SEC type"
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_STATISTICS
|
||||
*===========================================================================
|
||||
* Define this macro to include usage and error statistics.
|
||||
*/
|
||||
#define IPFREESCALE_USE_STATISTICS
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_IPSEC_ESP_CBC_ENGINE
|
||||
*===========================================================================
|
||||
* Define this macro to register device as the default engine for IPSEC
|
||||
* ESP in IPHWCRYPTO.
|
||||
*/
|
||||
|
||||
#define IPFREESCALE_USE_IPSEC_ESP_CBC_ENGINE
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_DIGEST_ENGINE
|
||||
*===========================================================================
|
||||
* Define this macro to register device as the default engine for message
|
||||
* digests in IPHWCRYPTO.
|
||||
*/
|
||||
#define IPFREESCALE_USE_DIGEST_ENGINE
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_CIPHER_ENGINE
|
||||
*===========================================================================
|
||||
* Define this macro to register device as the default engine for ciphers
|
||||
* in IPHWCRYPTO.
|
||||
*/
|
||||
#define IPFREESCALE_USE_CIPHER_ENGINE
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_RANDOM_ENGINE
|
||||
*===========================================================================
|
||||
* Define this macro to register device as the default engine for random
|
||||
* number generation in IPHWCRYPTO.
|
||||
*/
|
||||
#define IPFREESCALE_USE_RANDOM_ENGINE
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_DH_ENGINE
|
||||
*===========================================================================
|
||||
* Define this macro to register device as the default engine for Diffie-
|
||||
* Hellman operations in IPHWCRYPTO.
|
||||
*/
|
||||
#if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4)
|
||||
#define IPFREESCALE_USE_DH_ENGINE
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_RSA_ENGINE
|
||||
*===========================================================================
|
||||
* Define this macro to register device as the default engine for RSA
|
||||
* operations in IPHWCRYPTO.
|
||||
*/
|
||||
#if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4)
|
||||
#define IPFREESCALE_USE_RSA_ENGINE
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_DSA_ENGINE
|
||||
*===========================================================================
|
||||
* Define this macro to register device as the default engine for DSA
|
||||
* operations in IPHWCRYPTO.
|
||||
*/
|
||||
#if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4)
|
||||
#define IPFREESCALE_USE_DSA_ENGINE
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(IPFREESCALE_SEC2) || defined (IPFREESCALE_SEC4)
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_SEC_NUM_TASKS
|
||||
*===========================================================================
|
||||
* This macro controls the maximum number of tasks that can use the SEC device
|
||||
* simultaneously.
|
||||
*/
|
||||
#define IPFREESCALE_SEC_NUM_TASKS 10
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_SEC_TIMEOUT
|
||||
*===========================================================================
|
||||
* This macro controls the maximum time in milliseconds to wait for a crypto
|
||||
* operation in the SEC device to complete.
|
||||
*/
|
||||
#define IPFREESCALE_SEC_TIMEOUT 3000
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_SEC_USE_ASYNC_IPSEC
|
||||
*===========================================================================
|
||||
* This macro controls if asynchronous ipsec mode should be used. Set to
|
||||
* IP_TRUE if asynchronous mode should be used and to IP_FALSE if not.
|
||||
* Note! LKM port must use asynchronous mode - always set to IP_TRUE.
|
||||
*/
|
||||
#ifdef IPCOM_FORWARDER_NAE
|
||||
#define IPFREESCALE_SEC_IPSEC_MODE_ASYNC IP_FALSE
|
||||
#else
|
||||
#define IPFREESCALE_SEC_IPSEC_MODE_ASYNC IP_TRUE
|
||||
#endif
|
||||
|
||||
#endif /* #if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4) */
|
||||
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_USE_HW_SA
|
||||
*===========================================================================
|
||||
* Define this macro to allow for SEC4 based devices to use HW cached IPsec SA.
|
||||
*/
|
||||
/* #define IPFREESCALE_USE_HW_SA */
|
||||
|
||||
#endif /* #ifdef IPFREESCALE_SEC4 */
|
||||
|
||||
#ifdef IPFREESCALE_COLDFIRE
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_COLDFIRE_MBAR
|
||||
*===========================================================================
|
||||
* This macro controls the module base address register (MBAR). It defines
|
||||
* the logical base address for the memory-mapped space containing the
|
||||
* control registers for the on-chip peripherals.
|
||||
*/
|
||||
#define IPFREESCALE_COLDFIRE_MBAR 0xF0000000
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_COLDFIRE_USE_YIELD
|
||||
*===========================================================================
|
||||
* This macros enables yielding. Define thios macros if you want the calling
|
||||
* task to let other tasks execute while the calling tak is waiting for the
|
||||
* device operaiton to complete.
|
||||
*/
|
||||
/* #define IPFREESCALE_COLDFIRE_USE_YIELD */
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_COLDFIRE_FIX_DES_PARITY
|
||||
*===========================================================================
|
||||
* This macros controls if DES and 3DES keys should be fixed for correct
|
||||
* parity before used in the device.
|
||||
*/
|
||||
#define IPFREESCALE_COLDFIRE_FIX_DES_PARITY
|
||||
#endif /* #ifdef IPFREESCALE_COLDFIRE */
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,10 @@
|
||||
IPTARGETS := lib
|
||||
ifneq ($(IPMAKEFILE),)
|
||||
include $(IPMAKEFILE)
|
||||
else
|
||||
include $(IPCOM_ROOT)/Makefile
|
||||
endif
|
||||
include ipfreescale.mk
|
||||
include $(IPCOM_ROOT)/gmake/ipcom_make.mk
|
||||
|
||||
lib: dirs $(IPLIBFILE)
|
||||
@@ -0,0 +1,291 @@
|
||||
#############################################################################
|
||||
# IPFREESCALE.MK
|
||||
#
|
||||
# Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale.mk,v $ $Revision: 1.29.10.1 $
|
||||
# $Source: /home/interpeak/CVSRoot/ipfreescale/gmake/ipfreescale.mk,v $
|
||||
# $Author: svc-cmnet $ $Date: 2013-03-13 07:45:24 $
|
||||
# $State: Exp $ $Locker: $
|
||||
#
|
||||
# INTERPEAK_COPYRIGHT_STRING
|
||||
#
|
||||
#############################################################################
|
||||
|
||||
|
||||
#############################################################################
|
||||
# PRODUCT
|
||||
###########################################################################
|
||||
|
||||
IPPROD ?= ipfreescale
|
||||
|
||||
|
||||
#############################################################################
|
||||
# DEFINE
|
||||
###########################################################################
|
||||
|
||||
IPDEFINE += -DIPFREESCALE
|
||||
|
||||
|
||||
#############################################################################
|
||||
# IPLIBDEFINE
|
||||
###########################################################################
|
||||
|
||||
# Default
|
||||
IPFREESCALE_DEVICE = IPFREESCALE_SEC2
|
||||
|
||||
# PowerPC
|
||||
ifeq ($(IPTARGET),ppc)
|
||||
IPFREESCALE_DEVICE = IPFREESCALE_SEC2
|
||||
endif
|
||||
|
||||
# PowerPC
|
||||
ifeq ($(IPTARGET),powerpc)
|
||||
IPFREESCALE_DEVICE = IPFREESCALE_SEC2
|
||||
endif
|
||||
|
||||
|
||||
# ColdFire
|
||||
ifeq ($(IPTARGET),cf)
|
||||
IPFREESCALE_DEVICE = IPFREESCALE_COLDFIRE
|
||||
endif
|
||||
|
||||
# Is SEC4 supported by BSP
|
||||
ifeq ($(_WRS_CONFIG_BSP_SUPPORTS_IPFREESCALE_SEC4),y)
|
||||
IPFREESCALE_DEVICE = IPFREESCALE_SEC4
|
||||
#define SEC4_USE_QI if enable Queue Interface (QMAN)
|
||||
#IPLIBDEFINE += -DSEC4_USE_QI
|
||||
# All cores will share the same job queue (to allow for more than 4 cores to submit jobs)
|
||||
#IPLIBDEFINE += -DSEC4_USE_SHARED_JOB_QUEUE
|
||||
# Pre-allocate memory for descriptor buffers.
|
||||
# It improves performance for systems using many jobs via the job queues but uses additional memory
|
||||
IPLIBDEFINE += -DSEC4_PREALLOC_DESC_BUF
|
||||
endif
|
||||
|
||||
IPLIBDEFINE += -D$(IPFREESCALE_DEVICE)
|
||||
|
||||
|
||||
#############################################################################
|
||||
# SEC2_VERSION
|
||||
###########################################################################
|
||||
|
||||
SEC2_VERSION = 1_2
|
||||
|
||||
|
||||
#############################################################################
|
||||
# INCLUDE
|
||||
###########################################################################
|
||||
|
||||
IPINCLUDE += -I$(IPFREESCALE_ROOT)/config
|
||||
IPINCLUDE += -I$(IPFREESCALE_ROOT)/include
|
||||
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/src
|
||||
|
||||
ifeq ($(IPFREESCALE_DEVICE),IPFREESCALE_SEC2)
|
||||
ifeq ($(IPPORT),lkm)
|
||||
IPLIBINCLUDE += -I$(IPLINUX_ROOT)/include
|
||||
ifeq ($(IPTARGET),ppc)
|
||||
IPLIBINCLUDE += -I$(IPLINUX_ROOT)/arch/ppc
|
||||
endif
|
||||
ifeq ($(IPTARGET),powerpc)
|
||||
IPLIBINCLUDE += -I$(IPLINUX_ROOT)/arch/powerpc
|
||||
endif
|
||||
# WR Linux has the SEC2 driver include in the kernel source tree
|
||||
IPLIBINCLUDE += -I$(IPLINUX_ROOT)/drivers/crypto/sec2
|
||||
endif
|
||||
|
||||
ifeq ($(IPPORT),las)
|
||||
IPINCLUDE += -I$(IPLINUX_ROOT)/drivers/crypto/sec2
|
||||
endif
|
||||
|
||||
ifeq ($(IPPORT),unix)
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec2/$(SEC2_VERSION)
|
||||
endif
|
||||
|
||||
ifeq ($(IPPORT),integrity)
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec2/$(SEC2_VERSION)
|
||||
endif
|
||||
|
||||
ifeq ($(IPPORT),vxworks)
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec2/$(SEC2_VERSION)
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(IPFREESCALE_DEVICE),IPFREESCALE_SEC4)
|
||||
ifeq ($(IPPORT),vxworks)
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/inc
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/inc/Peripherals
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/inc/integrations
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/inc/integrations/P4080
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/inc/etc
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/inc/cores
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/Peripherals/SEC
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4/NetCommSw/Peripherals/SEC/DCL
|
||||
IPLIBINCLUDE += -I$(IPFREESCALE_ROOT)/sec4
|
||||
#QMan, Bman TODO: Update this. Used when defined SEC4_USE_QI
|
||||
IPLIBINCLUDE += -I$(WIND_BASE)/target/src/hwif/h/resource
|
||||
endif
|
||||
endif
|
||||
|
||||
|
||||
#############################################################################
|
||||
# OBJECTS
|
||||
###########################################################################
|
||||
|
||||
# Configuration
|
||||
IPLIBOBJECTS_C += ipfreescale_config.o
|
||||
|
||||
# Compiles the xxx_config.o if the $SKIP_CONFIG macro is either not defined
|
||||
# or set to anything other than true.
|
||||
ifneq ($(SKIP_CONFIG),true)
|
||||
IPLIBOBJECTS += $(IPLIBOBJECTS_C)
|
||||
endif
|
||||
|
||||
# Interpeak Freescale hardware crypto
|
||||
IPLIBOBJECTS += ipfreescale.o
|
||||
IPLIBOBJECTS += ipfreescale_ipsec.o
|
||||
IPLIBOBJECTS += ipfreescale_os.o
|
||||
|
||||
# PowerPC
|
||||
ifeq ($(IPTARGET),ppc)
|
||||
ifneq ($(IPFREESCALE_DEVICE),IPFREESCALE_COLDFIRE)
|
||||
#SEC2 or SEC4
|
||||
IPLIBOBJECTS += ipfreescale_sec.o
|
||||
IPLIBOBJECTS += ipfreescale_ipsec_sec.o
|
||||
endif
|
||||
endif
|
||||
ifeq ($(IPTARGET),powerpc)
|
||||
ifneq ($(IPFREESCALE_DEVICE),IPFREESCALE_COLDFIRE)
|
||||
#SEC2 or SEC4
|
||||
IPLIBOBJECTS += ipfreescale_sec.o
|
||||
IPLIBOBJECTS += ipfreescale_ipsec_sec.o
|
||||
endif
|
||||
endif
|
||||
|
||||
# ColdFire
|
||||
ifeq ($(IPTARGET),cf)
|
||||
IPLIBOBJECTS += ipfreescale_coldfire.o
|
||||
IPLIBOBJECTS += ipfreescale_ipsec_coldfire.o
|
||||
endif
|
||||
|
||||
# i686 (Fix for build tests)
|
||||
ifeq ($(IPTARGET),i686)
|
||||
IPLIBOBJECTS += ipfreescale_sec.o
|
||||
IPLIBOBJECTS += ipfreescale_ipsec_sec.o
|
||||
endif
|
||||
|
||||
ifneq ($(IPPORT),las)
|
||||
IPLIBOBJECTS += ipfreescale_cmd_freescale.o
|
||||
endif
|
||||
|
||||
# Freescale SEC2 driver
|
||||
ifeq ($(IPFREESCALE_DEVICE),IPFREESCALE_SEC2)
|
||||
ifeq ($(IPPORT),vxworks)
|
||||
ifeq ($(IPTARGET),ppc)
|
||||
IPLIBDEFINE += -DVXWORKS
|
||||
ifeq ($(IPBUILD),debug)
|
||||
IPLIBDEFINE += -DDBG
|
||||
endif
|
||||
IPLIBOBJECTS += sec2_cha.o
|
||||
IPLIBOBJECTS += sec2isr.o
|
||||
IPLIBOBJECTS += sec2_dpd.o
|
||||
IPLIBOBJECTS += sec2_init.o
|
||||
IPLIBOBJECTS += sec2_io.o
|
||||
IPLIBOBJECTS += sec2_ioctl.o
|
||||
IPLIBOBJECTS += sec2_request.o
|
||||
IPLIBOBJECTS += sec2_sctrMap.o
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
# SEC4 driver
|
||||
ifeq ($(IPFREESCALE_DEVICE),IPFREESCALE_SEC4)
|
||||
ifeq ($(IPPORT),vxworks)
|
||||
#TODO: Put somewhere else in config file
|
||||
#IPLIBDEFINE += -DSEC4_POLLED_MODE
|
||||
|
||||
### Freescale Netcomm library controls
|
||||
IPLIBDEFINE += -DNCSW_VXWORKS
|
||||
IPLIBDEFINE += -DVXWORKS
|
||||
# from dflags_debug.h.
|
||||
IPLIBDEFINE += -DP4080 -DNCSW_PPC_CORE
|
||||
ifeq ($(IPBUILD),debug)
|
||||
IPLIBDEFINE += -DDEBUG
|
||||
IPLIBDEFINE += -DDEBUG_ERRORS=1
|
||||
#IPLIBDEFINE += -DDEBUG_XX_MALLOC
|
||||
else
|
||||
IPLIBDEFINE += -DDISABLE_SANITY_CHECKS
|
||||
IPLIBDEFINE += -DDISABLE_ASSERTIONS
|
||||
endif
|
||||
IPLIBDEFINE += -DREPORT_EVENTS=1 -DEVENT_GLOBAL_LEVEL=REPORT_LEVEL_MINOR
|
||||
IPLIBDEFINE += -DDEBUG_GLOBAL_LEVEL=REPORT_LEVEL_INFO -DERROR_GLOBAL_LEVEL=REPORT_LEVEL_MINOR
|
||||
|
||||
ifeq ($(IPTARGET),ppc)
|
||||
##FSL SEC library
|
||||
IPLIBOBJECTS += sec.o sec_jq.o sec_qi.o
|
||||
##FSL SEC/DCL library
|
||||
IPLIBOBJECTS += sec_dcl_api.o sec_dcl.o sec_dcl_cmd.o
|
||||
##FSL ETC
|
||||
IPLIBOBJECTS += error.o memcpy.o mem.o
|
||||
##FSL INTEGRATIONS/P4080
|
||||
IPLIBOBJECTS += module_strings.o
|
||||
#Customizations to DCL
|
||||
IPLIBOBJECTS += sec_dcl_api_ipfreescale.o sec_dcl_ipfreescale.o
|
||||
#IPNET customization
|
||||
IPLIBOBJECTS += xx.o
|
||||
# "driver"
|
||||
IPLIBOBJECTS += sec4_init.o sec4_io.o sec4_ioctl.o sec4isr.o sec4_request.o
|
||||
# SEC4 Queue Interface to QMAN
|
||||
IPLIBOBJECTS += sec4_qi_request.o
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
#############################################################################
|
||||
# VPATH
|
||||
###########################################################################
|
||||
|
||||
IPSRCDIRS += $(IPFREESCALE_ROOT)/src $(IPFREESCALE_ROOT)/config
|
||||
|
||||
ifeq ($(IPFREESCALE_DEVICE),IPFREESCALE_SEC2)
|
||||
IPSRCDIRS += $(IPFREESCALE_ROOT)/sec2/$(SEC2_VERSION)
|
||||
endif
|
||||
|
||||
ifeq ($(IPFREESCALE_DEVICE),IPFREESCALE_SEC4)
|
||||
IPSRCDIRS += $(IPFREESCALE_ROOT)/sec4/NetCommSw/Peripherals/SEC $(IPFREESCALE_ROOT)/sec4/NetCommSw/Peripherals/SEC/DCL $(IPFREESCALE_ROOT)/sec4/NetCommSw/etc
|
||||
IPSRCDIRS += $(IPFREESCALE_ROOT)/sec4/NetCommSw/integrations/P4080
|
||||
#SEC4 customizations
|
||||
IPSRCDIRS += $(IPFREESCALE_ROOT)/sec4
|
||||
endif
|
||||
|
||||
#############################################################################
|
||||
# LIB
|
||||
###########################################################################
|
||||
|
||||
IPLIBS += $(IPLIBROOT)/libipfreescale.a
|
||||
|
||||
|
||||
#############################################################################
|
||||
# BINARIES
|
||||
#############################################################################
|
||||
|
||||
ifeq ($(IPPORT),las)
|
||||
# Path to binaries
|
||||
IPCMDDIR := $(IPOBJDIR)/bin
|
||||
|
||||
# List of shell commands to build
|
||||
IPFREESSCALESHELLCMDS = freescale
|
||||
_IPFREESSCALESHELLCMDS = $(addprefix $(IPCMDDIR)/,$(IPFREESSCALESHELLCMDS))
|
||||
|
||||
bin: $(_IPFREESSCALESHELLCMDS)
|
||||
|
||||
$(IPOBJDIR)/ipfreescale_cmd_%.o: $(IPFREESCALE_ROOT)/src/ipfreescale_cmd_%.c
|
||||
@$(IPECHO) "+++ Compiling IPFREESCALE shell command $<"
|
||||
$(IPVERB)$(IPCC) -Dipfreescale_cmd_$*=ipcom_cmd_entry_point $(IPCFLAGS) -I$(SEC2DIR) -I$(IPIPSEC_ROOT)/src -o $@ $<
|
||||
|
||||
$(IPCMDDIR)/freescale: $(IPOBJDIR)/ipfreescale_cmd_freescale.o $(IPOBJDIR)/ipcom_shell_cmd_stub.o
|
||||
@$(IPECHO) "+++ Linking IPFREESCALE shell command $@"
|
||||
$(IPVERB)$(IPLD) -o $@ $(IPLDFLAGS) $^ $(IPLIBS) $(IPLIBS) $(IPLIBS) $(IPLASTLIBS)
|
||||
endif
|
||||
|
||||
###########################################################################
|
||||
# END OF IPFREESCALE.MK
|
||||
###########################################################################
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,697 @@
|
||||
|
||||
/****************************************************************************
|
||||
* Sec2Descriptors.h - Descriptor construction definitions for the SEC2.x
|
||||
* security processing core family
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2000. All rights reserved
|
||||
* Copyright (c) 2003, 2004 Motorola Inc., Freescale Semiconductor
|
||||
* Copyright (c) 2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor. and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* May 24,2003 sec - update types for ECC operations
|
||||
* Aug 23,2003 sec - add TLS support
|
||||
* Nov 22,2004 sec - merge in Linux changes
|
||||
* Jan 17,2004 sec - change header for outbound CCMP requests
|
||||
* 1.2 Jan 27,2005 sec - delete and typedef some obsolete names, remove
|
||||
* nonpad IPSec types
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for AESA_CRYPT_REQ / DPD_AESA_CRYPT_GROUP
|
||||
* Note that CCM and SRT modes are not handled by this request type,
|
||||
* they are deployed in the SRTP and CCMP request types.
|
||||
* Basic AES ECB, CBC, and counter mode are handled here.
|
||||
*/
|
||||
|
||||
const unsigned long AesaDesc[1*NUM_AESA_CRYPT_DESC] = {
|
||||
/* DPD_AESA_CBC_ENCRYPT_CRYPT OpId 0x6000 */
|
||||
/* CM = 1 (cbc), encrypt on */
|
||||
/* desc type = 2 (common, nosnoop) */
|
||||
0x60300010,
|
||||
|
||||
/* DPD_AESA_CBC_DECRYPT_CRYPT OpId 0x6001 */
|
||||
/* CM = 1 (cbc), encrypt off */
|
||||
/* desc type = 2 (common, nosnoop) */
|
||||
0x60200010,
|
||||
|
||||
/* DPD_AESA_CBC_DECRYPT_CRYPT_RDK OpId 0x6002 */
|
||||
/* RDK = noexpand, CM = 1 (cbc), encrypt off */
|
||||
/* desc type = 2 (common, nosnoop) */
|
||||
0x60a00010,
|
||||
|
||||
/* DPD_AESA_ECB_ENCRYPT_CRYPT OpId 0x6003 */
|
||||
/* CM = 0 (ecb), encrypt on */
|
||||
/* desc type = 2 (common, nosnoop) */
|
||||
0x60100010,
|
||||
|
||||
/* DPD_AESA_ECB_DECRYPT_CRYPT_RDK OpId 0x6004 */
|
||||
/* CM = 0 (ecb), encrypt off */
|
||||
/* desc type = 2 (common, nosnoop) */
|
||||
0x60000010,
|
||||
|
||||
/* DPD_AESA_ECB_DECRYPT_CRYPT OpId 0x6005 */
|
||||
/* RDK = noexpand, CM = 1 (ecb), encrypt off */
|
||||
/* desc type = 2 (common, nosnoop) */
|
||||
0x60800010,
|
||||
|
||||
/* DPD_AESA_CTR_CRYPT OpId 0x6006 */
|
||||
/* CM = 2 (ctr), encrypt off */
|
||||
/* desc type = 2 (common, nosnoop) */
|
||||
0x60600010,
|
||||
|
||||
/* DPD_AESA_CTR_HMAC OpId 0x6007 */
|
||||
/* CM = 2 (ctr), encrypt off */
|
||||
/* desc type = 24 (HMAC-snoop) */
|
||||
0x606000c0,
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for RNG_REQ / DPD_RNG_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long RngDesc[1*NUM_RNGA_DESC] = {
|
||||
/* DPD_RNG_GETRN Req OpId 0x1000 */
|
||||
0x40000010
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for DES_CBC_CRYPT_REQ / DPD_DES_CBC_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long DesCbcReq[1 * NUM_DES_CBC_DESC] = {
|
||||
/* DPD_SDES_CBC_CTX_ENCRYPT Req OpId 0x2500 */
|
||||
0x20500010,
|
||||
/* DPD_SDES_CBC_CTX_DECRYPT Req OpId 0x2501 */
|
||||
0x20400010,
|
||||
/* DPD_TDES_CBC_CTX_ENCRYPT Req OpId 0x2502 */
|
||||
0x20700010,
|
||||
/* DPD_TDES_CBC_CTX_DECRYPT Req OpId 0x2503 */
|
||||
0x20600010
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for DES_CRYPT_REQ / DPD_DES_ECB_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long DesReq[1*NUM_DES_DESC] = {
|
||||
/* DPD_SDES_ECB_ENCRYPT Req OpId 0x2600 */
|
||||
0x20100010,
|
||||
/* DPD_SDES_ECB_DECRYPT Req OpId 0x2601 */
|
||||
0x20000010,
|
||||
/* DPD_TDES_ECB_ENCRYPT Req OpId 0x2602 */
|
||||
0x20300010,
|
||||
/* DPD_TDES_ECB_DECRYPT Req OpId 0x2603 */
|
||||
0x20200010
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for
|
||||
* ARC4_LOADCTX_CRYPT_REQ / DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long Rc4LoadCtxUnloadCtxReq[1*NUM_RC4_LOADCTX_UNLOADCTX_DESC] = {
|
||||
/* DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP OpId 0x3400 */
|
||||
0x10700050
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for
|
||||
* ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ / DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP
|
||||
*/
|
||||
const unsigned long Rc4LoadKeyUnloadCtxReq[1*NUM_RC4_LOADKEY_UNLOADCTX_DESC] = {
|
||||
/* DPD_RC4_LDKEY_CRYPT_ULCTX Req OpId 0x3500 */
|
||||
0x10200050
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for HASH_REQ / DPD_HASH_LDCTX_HASH_ULCTX_GROUP
|
||||
*/
|
||||
const unsigned long MdhaReq[1*NUM_MDHA_DESC] = {
|
||||
/* DPD_SHA256_LDCTX_HASH_ULCTX OpId 0x4400 */
|
||||
0x30100010,
|
||||
/* DPD_MD5_LDCTX_HASH_ULCTX OpId 0x4401 */
|
||||
0x30200010,
|
||||
/* DPD_SHA_LDCTX_HASH_ULCTX OpId 0x4402 */
|
||||
0x30000010,
|
||||
/* DPD_SHA256_LDCTX_IDGS_HASH_ULCTX OpId 0x4403 */
|
||||
0x31100010,
|
||||
/* DPD_MD5_LDCTX_IDGS_HASH_ULCTX OpId 0x4404 */
|
||||
0x31200010,
|
||||
/* DPD_SHA_LDCTX_IDGS_HASH_ULCTX OpId 0x4405 */
|
||||
0x31000010,
|
||||
/* DPD_SHA256_CONT_HASH_ULCTX OpId 0x4406 */
|
||||
0x38100010,
|
||||
/* DPD_MD5_CONT_HASH_ULCTX OpId 0x4407 */
|
||||
0x38200010,
|
||||
/* DPD_SHA_CONT_HASH_ULCTX OpId 0x4408 */
|
||||
0x38000010
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for HASH_REQ / DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP
|
||||
*/
|
||||
const unsigned long MdhaPadReq[1*NUM_MDHA_PAD_DESC] = {
|
||||
/* DPD_SHA256_LDCTX_HASH_PAD_ULCTX OpId 0x4500 */
|
||||
0x30500010,
|
||||
/* DPD_MD5_LDCTX_HASH_PAD_ULCTX OpId 0x4501 */
|
||||
0x30600010,
|
||||
/* DPD_SHA_LDCTX_HASH_PAD_ULCTX OpId 0x4502 */
|
||||
0x30400010,
|
||||
/* DPD_SHA256_LDCTX_IDGS_HASH_PAD_ULCTX OpId 0x4503 */
|
||||
0x31500010,
|
||||
/* DPD_MD5_LDCTX_IDGS_HASH_PAD_ULCTX OpId 0x4504 */
|
||||
0x31600010,
|
||||
/* DPD_SHA_LDCTX_IDGS_HASH_PAD_ULCTX OpId 0x4505 */
|
||||
0x31400010,
|
||||
/* DPD_SHA256_CONT_HASH_PAD_ULCTX OpId 0x4506 */
|
||||
0x38500010,
|
||||
/* DPD_MD5_CONT_HASH_PAD_ULCTX OpId 0x4507 */
|
||||
0x38600010,
|
||||
/* DPD_SHA_CONT_HASH_PAD_ULCTX OpId 0x4508 */
|
||||
0x38400010
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for HMAC_PAD_REQ / DPD_HASH_LDCTX_HMAC_ULCTX_GROUP
|
||||
*/
|
||||
|
||||
/* NOTE: The MD4 Descriptors are no longer supported */
|
||||
|
||||
const unsigned long HmacPadReq[1*NUM_HMAC_PAD_DESC] = {
|
||||
/* DPD_SHA256_LDCTX_HMAC_ULCTX Req OpId 0x4a00 */
|
||||
0x31900010,
|
||||
/* DPD_MD5_LDCTX_HMAC_ULCTX Req OpId 0x4a01 */
|
||||
0x31A00010,
|
||||
/* DPD_SHA_LDCTX_HMAC_ULCTX Req OpId 0x4a02 */
|
||||
0x31800010,
|
||||
/* DPD_SHA256_LDCTX_HMAC_PAD_ULCTX Req OpId 0x4a03 */
|
||||
0x31D00010,
|
||||
/* DPD_MD5_LDCTX_HMAC_PAD_ULCTX Req OpId 0x4a04 */
|
||||
0x31E00010,
|
||||
/* DPD_SHA_LDCTX_HMAC_PAD_ULCTX Req OpId 0x4a05 */
|
||||
0x31C00010,
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for MOD_EXP_REQ DPD_MM_LDCTX_EXP_ULCTX_GROUP
|
||||
*/
|
||||
const unsigned long PkhaMmExpReq[1*NUM_MM_EXP_DESC] = {
|
||||
/* DPD_MM_LDCTX_EXP_ULCTX Req OpId 0x5100 */
|
||||
0x50200080
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for MOD_SS_EXP_REQ / DPD_MM_SS_RSA_EXP
|
||||
*/
|
||||
const unsigned long PkhaMmSsExpReq[1*NUM_MM_SS_EXP_DESC] = {
|
||||
/* DPD_MM_SS_RSA_EXP Req OpId 0x5b00 */
|
||||
0x58000080
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for MOD_R2MODN_REQ / DPD_MM_LDCTX_R2MODN_ULCTX_GROUP
|
||||
*/
|
||||
const unsigned long PkhaModR2modnReq[1 * NUM_MOD_R2MODN_DESC] = {
|
||||
/* DPD_MM_LDCTX_R2MODN_ULCTX Req OpId 0x5200 */
|
||||
0x50300080
|
||||
};
|
||||
|
||||
/*
|
||||
* Header constants for MOD_RRMODP_REQ / DPD_MM_LDCTX_RRMODP_ULCTX_GROUP
|
||||
*/
|
||||
const unsigned long PkhaMmRrmodpReq[1*NUM_MM_RRMODP_DESC] = {
|
||||
/* DPD_MM_LDCTX_RRMODP_ULCTX Req OpId 0x5300 */
|
||||
0x50400080
|
||||
};
|
||||
|
||||
/*
|
||||
* Header constants for MOD_2OP_REQ / DPD_MM_LDCTX_2OP_ULCTX_GROUP
|
||||
*/
|
||||
const unsigned long PkhaMod2OpReq[1 * NUM_MOD_2OP_DESC] = {
|
||||
/* DPD_MOD_LDCTX_MUL1_ULCTX Req OpId 0x5400 */
|
||||
0x53000080,
|
||||
/* DPD_MOD_LDCTX_MUL2_ULCTX Req OpId 0x5401 */
|
||||
0x54000080,
|
||||
/* DPD_MOD_LDCTX_ADD_ULCTX Req OpId 0x5402 */
|
||||
0x51000080,
|
||||
/* DPD_MOD_LDCTX_SUB_ULCTX Req OpId 0x5403 */
|
||||
0x52000080,
|
||||
/* DPD_POLY_LDCTX_A0_B0_MUL1_ULCTX Req OpId 0x5404 */
|
||||
0x56000080,
|
||||
/* DPD_POLY_LDCTX_A0_B0_MUL2_ULCTX Req OpId 0x5405 */
|
||||
0x57000080,
|
||||
/* DPD_POLY_LDCTX_A0_B0_ADD_ULCTX Req OpId 0x5406 */
|
||||
0x55000080,
|
||||
/* DPD_POLY_LDCTX_A1_B0_MUL1_ULCTX Req OpId 0x5407 */
|
||||
0x56400080,
|
||||
/* DPD_POLY_LDCTX_A1_B0_MUL2_ULCTX Req OpId 0x5408 */
|
||||
0x57400080,
|
||||
/* DPD_POLY_LDCTX_A1_B0_ADD_ULCTX Req OpId 0x5409 */
|
||||
0x55400080,
|
||||
/* DPD_POLY_LDCTX_A2_B0_MUL1_ULCTX Req OpId 0x540a */
|
||||
0x56800080,
|
||||
/* DPD_POLY_LDCTX_A2_B0_MUL2_ULCTX Req OpId 0x540b */
|
||||
0x57800080,
|
||||
/* DPD_POLY_LDCTX_A2_B0_ADD_ULCTX Req OpId 0x540c */
|
||||
0x55800080,
|
||||
/* DPD_POLY_LDCTX_A3_B0_MUL1_ULCTX Req OpId 0x540d */
|
||||
0x56c00080,
|
||||
/* DPD_POLY_LDCTX_A3_B0_MUL2_ULCTX Req OpId 0x540e */
|
||||
0x57c00080,
|
||||
/* DPD_POLY_LDCTX_A3_B0_ADD_ULCTX Req OpId 0x540f */
|
||||
0x55c00080,
|
||||
/* DPD_POLY_LDCTX_A0_B1_MUL1_ULCTX Req OpId 0x5410 */
|
||||
0x56100080,
|
||||
/* DPD_POLY_LDCTX_A0_B1_MUL2_ULCTX Req OpId 0x5411 */
|
||||
0x57100080,
|
||||
/* DPD_POLY_LDCTX_A0_B1_ADD_ULCTX Req OpId 0x5412 */
|
||||
0x55100080,
|
||||
/* DPD_POLY_LDCTX_A1_B1_MUL1_ULCTX Req OpId 0x5413 */
|
||||
0x56500080,
|
||||
/* DPD_POLY_LDCTX_A1_B1_MUL2_ULCTX Req OpId 0x5414 */
|
||||
0x57500080,
|
||||
/* DPD_POLY_LDCTX_A1_B1_ADD_ULCTX Req OpId 0x5415 */
|
||||
0x55500080,
|
||||
/* DPD_POLY_LDCTX_A2_B1_MUL1_ULCTX Req OpId 0x5416 */
|
||||
0x56900080,
|
||||
/* DPD_POLY_LDCTX_A2_B1_MUL2_ULCTX Req OpId 0x5417 */
|
||||
0x57900080,
|
||||
/* DPD_POLY_LDCTX_A2_B1_ADD_ULCTX Req OpId 0x5418 */
|
||||
0x55900080,
|
||||
/* DPD_POLY_LDCTX_A3_B1_MUL1_ULCTX Req OpId 0x5419 */
|
||||
0x56d00080,
|
||||
/* DPD_POLY_LDCTX_A3_B1_MUL2_ULCTX Req OpId 0x541a */
|
||||
0x57d00080,
|
||||
/* DPD_POLY_LDCTX_A3_B1_ADD_ULCTX Req OpId 0x541b */
|
||||
0x55d00080,
|
||||
/* DPD_POLY_LDCTX_A0_B2_MUL1_ULCTX Req OpId 0x541c */
|
||||
0x56200080,
|
||||
/* DPD_POLY_LDCTX_A0_B2_MUL2_ULCTX Req OpId 0x541d */
|
||||
0x57200080,
|
||||
/* DPD_POLY_LDCTX_A0_B2_ADD_ULCTX Req OpId 0x541e */
|
||||
0x55200080,
|
||||
/* DPD_POLY_LDCTX_A1_B2_MUL1_ULCTX Req OpId 0x541f */
|
||||
0x56600080,
|
||||
/* DPD_POLY_LDCTX_A1_B2_MUL2_ULCTX Req OpId 0x5420 */
|
||||
0x57600080,
|
||||
/* DPD_POLY_LDCTX_A1_B2_ADD_ULCTX Req OpId 0x5421 */
|
||||
0x55600080,
|
||||
/* DPD_POLY_LDCTX_A2_B2_MUL1_ULCTX Req OpId 0x5422 */
|
||||
0x56a00080,
|
||||
/* DPD_POLY_LDCTX_A2_B2_MUL2_ULCTX Req OpId 0x5423 */
|
||||
0x57a00080,
|
||||
/* DPD_POLY_LDCTX_A2_B2_ADD_ULCTX Req OpId 0x5424 */
|
||||
0x55a00080,
|
||||
/* DPD_POLY_LDCTX_A3_B2_MUL1_ULCTX Req OpId 0x5425 */
|
||||
0x56e00080,
|
||||
/* DPD_POLY_LDCTX_A3_B2_MUL2_ULCTX Req OpId 0x5426 */
|
||||
0x57e00080,
|
||||
/* DPD_POLY_LDCTX_A3_B2_ADD_ULCTX Req OpId 0x5427 */
|
||||
0x55e00080,
|
||||
/* DPD_POLY_LDCTX_A0_B3_MUL1_ULCTX Req OpId 0x5428 */
|
||||
0x56300080,
|
||||
/* DPD_POLY_LDCTX_A0_B3_MUL2_ULCTX Req OpId 0x5429 */
|
||||
0x57300080,
|
||||
/* DPD_POLY_LDCTX_A0_B3_ADD_ULCTX Req OpId 0x542a */
|
||||
0x55300080,
|
||||
/* DPD_POLY_LDCTX_A1_B3_MUL1_ULCTX Req OpId 0x542b */
|
||||
0x56700080,
|
||||
/* DPD_POLY_LDCTX_A1_B3_MUL2_ULCTX Req OpId 0x542c */
|
||||
0x57700080,
|
||||
/* DPD_POLY_LDCTX_A1_B3_ADD_ULCTX Req OpId 0x542d */
|
||||
0x55700080,
|
||||
/* DPD_POLY_LDCTX_A2_B3_MUL1_ULCTX Req OpId 0x542e */
|
||||
0x56b00080,
|
||||
/* DPD_POLY_LDCTX_A2_B3_MUL2_ULCTX Req OpId 0x542f */
|
||||
0x57b00080,
|
||||
/* DPD_POLY_LDCTX_A2_B3_ADD_ULCTX Req OpId 0x5430 */
|
||||
0x55b00080,
|
||||
/* DPD_POLY_LDCTX_A3_B3_MUL1_ULCTX Req OpId 0x5431 */
|
||||
0x56f00080,
|
||||
/* DPD_POLY_LDCTX_A3_B3_MUL2_ULCTX Req OpId 0x5432 */
|
||||
0x57f00080,
|
||||
/* DPD_POLY_LDCTX_A3_B3_ADD_ULCTX Req OpId 0x5433 */
|
||||
0x55f00080
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for ECC_POINT_REQ / DPD_EC_LDCTX_kP_ULCTX_GROUP
|
||||
* These descriptors use the "packed" format
|
||||
*/
|
||||
const unsigned long PkhaEccPointReq[1*NUM_EC_POINT_DESC] = {
|
||||
/* DPD_EC_FP_AFF_PT_MULT OpId 0x5800 */
|
||||
0x50500048,
|
||||
/* DPD_EC_FP_PROJ_PT_MULT OpId 0x5801 */
|
||||
0x50700048,
|
||||
/* DPD_EC_F2M_AFF_PT_MULT OpId 0x5802 */
|
||||
0x50600048,
|
||||
/* DPD_EC_F2M_PROJ_PT_MULT OpId 0x5803 */
|
||||
0x50800048,
|
||||
/* DPD_EC_FP_LDCTX_ADD_ULCTX OpId 0x5804 */
|
||||
0x50900048,
|
||||
/* DPD_EC_FP_LDCTX_DOUBLE_ULCTX OpId 0x5805 */
|
||||
0x50a00048,
|
||||
/* DPD_EC_F2M_LDCTX_ADD_ULCTX OpId 0x5806 */
|
||||
0x50b00048,
|
||||
/* DPD_EC_F2M_LDCTX_DOUBLE_ULCTX OpId 0x5807 */
|
||||
0x50c00048
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for ECC_2OP_REQ / DPD_EC_2OP_GROUP
|
||||
*/
|
||||
const unsigned long PkhaEcc2OpReq[1*NUM_EC_2OP_DESC] = {
|
||||
/* DPD_EC_F2M_LDCTX_MUL1_ULCTX Req OpId 0x5900 */
|
||||
0x50800048
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for ECC_SPKBUILD_REQ / DPD_EC_SPKBUILD_GROUP
|
||||
*/
|
||||
const unsigned long PkhaEccSpkbuildReq[1*NUM_EC_SPKBUILD_DESC] =
|
||||
{
|
||||
/* DPD_EC_SPKBUILD Req OpId 0x5c00 */
|
||||
0x5ff00038
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for ECC_PTADD_DBL
|
||||
*/
|
||||
const unsigned long PkhaEccPtaddDblReq[1 * NUM_EC_PTADD_DBL_DESC] =
|
||||
{
|
||||
/* DPD_EC_FPADD Req OpId 0x5d00 */
|
||||
0x50900058,
|
||||
/* DPD_EC_FPDBL Req OpId 0x5d01 */
|
||||
0x50a00058,
|
||||
/* DPD_EC_F2MADD Req OpId 0x5d02 */
|
||||
0x50b00058,
|
||||
/* DPD_EC_F2MDBL Req OpId 0x5d03 */
|
||||
0x50c00058
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for IPSEC_CBC_REQ / DPD_IPSEC_CBC_GROUP
|
||||
*/
|
||||
const unsigned long IpsecCbcReq[1*NUM_IPSEC_CBC_DESC] = {
|
||||
/* DPD_IPSEC_CBC_SDES_ENCRYPT_MD5_PAD OpId 0x7000 */
|
||||
0x20531e20,
|
||||
/* DPD_IPSEC_CBC_SDES_ENCRYPT_SHA_PAD OpId 0x7001 */
|
||||
0x20531c20,
|
||||
/* DPD_IPSEC_CBC_SDES_ENCRYPT_SHA256_PAD OpId 0x7002 */
|
||||
0x20531d20,
|
||||
/* DPD_IPSEC_CBC_SDES_DECRYPT_MD5_PAD OpId 0x7003 */
|
||||
0x20431e22,
|
||||
/* DPD_IPSEC_CBC_SDES_DECRYPT_SHA_PAD OpId 0x7004 */
|
||||
0x20431c22,
|
||||
/* DPD_IPSEC_CBC_SDES_DECRYPT_SHA256_PAD OpId 0x7005 */
|
||||
0x20431d22,
|
||||
/* DPD_IPSEC_CBC_TDES_ENCRYPT_MD5_PAD OpId 0x7006 */
|
||||
0x20731e20,
|
||||
/* DPD_IPSEC_CBC_TDES_ENCRYPT_SHA_PAD OpId 0x7007 */
|
||||
0x20731c20,
|
||||
/* DPD_IPSEC_CBC_TDES_ENCRYPT_SHA256_PAD OpId 0x7008 */
|
||||
0x20731d20,
|
||||
/* DPD_IPSEC_CBC_TDES_DECRYPT_MD5_PAD OpId 0x7009 */
|
||||
0x20631e22,
|
||||
/* DPD_IPSEC_CBC_TDES_DECRYPT_SHA_PAD OpId 0x700a */
|
||||
0x20631c22,
|
||||
/* DPD_IPSEC_CBC_TDES_DECRYPT_SHA256_PAD OpId 0x700b */
|
||||
0x20631d22
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for IPSEC_ECB_REQ / DPD_IPSEC_ECB_GROUP
|
||||
*/
|
||||
const unsigned long IpsecEcbReq[1*NUM_IPSEC_ECB_DESC] = {
|
||||
/* DPD_IPSEC_ECB_SDES_ENCRYPT_MD5_PAD OpId 0x7100 */
|
||||
0x20131e20,
|
||||
/* DPD_IPSEC_ECB_SDES_ENCRYPT_SHA_PAD OpId 0x7101 */
|
||||
0x20131c20,
|
||||
/* DPD_IPSEC_ECB_SDES_ENCRYPT_SHA256_PAD OpId 0x7102 */
|
||||
0x20131d20,
|
||||
/* DPD_IPSEC_ECB_SDES_DECRYPT_MD5_PAD OpId 0x7103 */
|
||||
0x20031e22,
|
||||
/* DPD_IPSEC_ECB_SDES_DECRYPT_SHA_PAD OpId 0x7104 */
|
||||
0x20031c22,
|
||||
/* DPD_IPSEC_ECB_SDES_DECRYPT_SHA256_PAD OpId 0x7105 */
|
||||
0x20031d22,
|
||||
/* DPD_IPSEC_ECB_TDES_ENCRYPT_MD5_PAD OpId 0x7106 */
|
||||
0x20331e20,
|
||||
/* DPD_IPSEC_ECB_TDES_ENCRYPT_SHA_PAD OpId 0x7107 */
|
||||
0x20331c20,
|
||||
/* DPD_IPSEC_ECB_TDES_ENCRYPT_SHA256_PAD OpId 0x7108 */
|
||||
0x20331d20,
|
||||
/* DPD_IPSEC_ECB_TDES_DECRYPT_MD5_PAD OpId 0x7109 */
|
||||
0x20231e22,
|
||||
/* DPD_IPSEC_ECB_TDES_DECRYPT_SHA_PAD OpId 0x710a */
|
||||
0x20231c22,
|
||||
/* DPD_IPSEC_ECB_TDES_DECRYPT_SHA256_PAD OpId 0x710b */
|
||||
0x20231d22
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for IPSEC_AES_CBC_REQ / DPD_IPSEC_AES_CBC_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long IpsecAesCbcReq[1*NUM_IPSEC_AES_CBC_DESC] = {
|
||||
/* DPD_IPSEC_AES_CBC_ENCRYPT_MD5_APAD OpId 0x8000 */
|
||||
0x60331E20,
|
||||
/* DPD_IPSEC_AES_CBC_ENCRYPT_SHA_APAD OpId 0x8001 */
|
||||
0x60331C20,
|
||||
/* DDPD_IPSEC_AES_CBC_ENCRYPT_SHA256_APAD OpId 0x8002 */
|
||||
0x60331D20,
|
||||
/* DPD_IPSEC_AES_CBC_ENCRYPT_MD5 OpId 0x8003 */
|
||||
0x60331a20,
|
||||
/* DPD_IPSEC_AES_CBC_ENCRYPT_SHA OpId 0x8004 */
|
||||
0x60331820,
|
||||
/* DDPD_IPSEC_AES_CBC_ENCRYPT_SHA256 OpId 0x8005 */
|
||||
0x60331920,
|
||||
/* DPD_IPSEC_AES_CBC_DECRYPT_MD5_APAD OpId 0x8006 */
|
||||
0x60231e22,
|
||||
/* DPD_IPSEC_AES_CBC_DECRYPT_SHA_APAD OpId 0x8007 */
|
||||
0x60231c22,
|
||||
/* DDPD_IPSEC_AES_CBC_DECRYPT_SHA256_APAD OpId 0x8008 */
|
||||
0x60231d22,
|
||||
/* DPD_IPSEC_AES_CBC_DECRYPT_MD5 OpId 0x8009 */
|
||||
0x60231a22,
|
||||
/* DPD_IPSEC_AES_CBC_DECRYPT_SHA OpId 0x800a */
|
||||
0x60231822,
|
||||
/* DDPD_IPSEC_AES_CBC_DECRYPT_SHA256 OpId 0x800b */
|
||||
0x60231922
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for IPSEC_AES_ECB_REQ / DPD_IPSEC_AES_ECB_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long IpsecAesEcbReq[1*NUM_IPSEC_AES_ECB_DESC] = {
|
||||
/* DPD_IPSEC_AES_ECB_ENCRYPT_MD5_APAD OpId 0x8100 */
|
||||
0x60131E20,
|
||||
/* DPD_IPSEC_AES_ECB_ENCRYPT_SHA_APAD OpId 0x8101 */
|
||||
0x60131C20,
|
||||
/* DDPD_IPSEC_AES_ECB_ENCRYPT_SHA256_APAD OpId 0x8102 */
|
||||
0x60131D20,
|
||||
/* DPD_IPSEC_AES_ECB_ENCRYPT_MD5 OpId 0x8103 */
|
||||
0x60131a20,
|
||||
/* DPD_IPSEC_AES_ECB_ENCRYPT_SHA OpId 0x8104 */
|
||||
0x60131820,
|
||||
/* DDPD_IPSEC_AES_ECB_ENCRYPT_SHA256 OpId 0x8105 */
|
||||
0x60131920,
|
||||
/* DPD_IPSEC_AES_ECB_DECRYPT_MD5_APAD OpId 0x8106 */
|
||||
0x60031e22,
|
||||
/* DPD_IPSEC_AES_ECB_DECRYPT_SHA_APAD OpId 0x8107 */
|
||||
0x60031c22,
|
||||
/* DDPD_IPSEC_AES_ECB_DECRYPT_SHA256_APAD OpId 0x8108 */
|
||||
0x60031d22,
|
||||
/* DPD_IPSEC_AES_ECB_DECRYPT_MD5 OpId 0x8109 */
|
||||
0x60031a22,
|
||||
/* DPD_IPSEC_AES_ECB_DECRYPT_SHA OpId 0x810a */
|
||||
0x60031822,
|
||||
/* DDPD_IPSEC_AES_ECB_DECRYPT_SHA256 OpId 0x810b */
|
||||
0x60031922
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for IPSEC_ESP_REQ / DPD_IPSEC_ESP_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long IpsecEspReq[1*NUM_IPSEC_ESP_DESC] = {
|
||||
/* DPD_IPSEC_ESP_OUT_SDES_ECB_CRPT_MD5_PAD OpId 0x7500 */
|
||||
0x20131e08,
|
||||
/* DPD_IPSEC_ESP_OUT_SDES_ECB_CRPT_SHA_PAD OpId 0x7501 */
|
||||
0x20131c08,
|
||||
/* DPD_IPSEC_ESP_OUT_SDES_ECB_CRPT_SHA256_PAD OpId 0x7502 */
|
||||
0x20131d08,
|
||||
/* DPD_IPSEC_ESP_IN_SDES_ECB_DCRPT_MD5_PAD OpId 0x7503 */
|
||||
0x20031e0a,
|
||||
/* DPD_IPSEC_ESP_IN_SDES_ECB_DCRPT_SHA_PAD OpId 0x7504 */
|
||||
0x20031c0a,
|
||||
/* DPD_IPSEC_ESP_IN_SDES_ECB_DCRPT_SHA256_PAD OpId 0x7505 */
|
||||
0x20031d0a,
|
||||
/* DPD_IPSEC_ESP_OUT_SDES_CBC_CRPT_MD5_PAD OpId 0x7506 */
|
||||
0x20531e08,
|
||||
/* DPD_IPSEC_ESP_OUT_SDES_CBC_CRPT_SHA_PAD OpId 0x7507 */
|
||||
0x20531c08,
|
||||
/* DPD_IPSEC_ESP_OUT_SDES_CBC_CRPT_SHA256_PAD OpId 0x7508 */
|
||||
0x20531d08,
|
||||
/* DPD_IPSEC_ESP_IN_SDES_CBC_DCRPT_MD5_PAD OpId 0x7509 */
|
||||
0x20431e0a,
|
||||
/* DPD_IPSEC_ESP_IN_SDES_CBC_DCRPT_SHA_PAD OpId 0x750a */
|
||||
0x20431c0a,
|
||||
/* DPD_IPSEC_ESP_IN_SDES_CBC_DCRPT_SHA256_PAD OpId 0x750b */
|
||||
0x20431d0a,
|
||||
/* DPD_IPSEC_ESP_OUT_TDES_CBC_CRPT_MD5_PAD OpId 0x750c */
|
||||
0x20731e08,
|
||||
/* DPD_IPSEC_ESP_OUT_TDES_CBC_CRPT_SHA_PAD OpId 0x750d */
|
||||
0x20731c08,
|
||||
/* DPD_IPSEC_ESP_OUT_TDES_CBC_CRPT_SHA256_PAD OpId 0x750e */
|
||||
0x20731d08,
|
||||
/* DPD_IPSEC_ESP_IN_TDES_CBC_DCRPT_MD5_PAD OpId 0x750f */
|
||||
0x20631e0a,
|
||||
/* DPD_IPSEC_ESP_IN_TDES_CBC_DCRPT_SHA_PAD OpId 0x7510 */
|
||||
0x20631c0a,
|
||||
/* DPD_IPSEC_ESP_IN_TDES_CBC_DCRPT_SHA256_PAD OpId 0x7511 */
|
||||
0x20631d0a,
|
||||
/* DPD_IPSEC_ESP_OUT_TDES_ECB_CRPT_MD5_PAD OpId 0x7512 */
|
||||
0x20331e08,
|
||||
/* DPD_IPSEC_ESP_OUT_TDES_ECB_CRPT_SHA_PAD OpId 0x7513 */
|
||||
0x20331c08,
|
||||
/* DPD_IPSEC_ESP_OUT_TDES_ECB_CRPT_SHA256_PAD OpId 0x7514 */
|
||||
0x20331d08,
|
||||
/* DPD_IPSEC_ESP_IN_TDES_ECB_DCRPT_MD5_PAD OpId 0x7515 */
|
||||
0x20231e0a,
|
||||
/* DPD_IPSEC_ESP_IN_TDES_ECB_DCRPT_SHA_PAD OpId 0x7516 */
|
||||
0x20231c0a,
|
||||
/* DPD_IPSEC_ESP_IN_TDES_ECB_DCRPT_SHA256_PAD OpId 0x7517 */
|
||||
0x20231d0a
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for CCMP_REQ / DPD_CCMP_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long CcmpReq[1*NUM_CCMP_DESC] = {
|
||||
/* DPD_802_11_CCMP_OUTBOUND OpId 0x6500 */
|
||||
0x6b100018,
|
||||
/* DPD_802_11_CCMP_INBOUND OpId 0x6501) */
|
||||
0x6b00001a
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for SRTP_REQ / DPD_SRTP_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long SrtpReq[1*NUM_SRTP_DESC] = {
|
||||
/* DPD_SRTP_OUTBOUND OpId 0x8500 */
|
||||
0x60631c28,
|
||||
/* DPD_SRTP_INBOUND OpId 0x8501 */
|
||||
0x60631c2a
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for KEA_CRYPT_REQ / DPD_KEA_CRYPT_GROUP
|
||||
*/
|
||||
|
||||
const unsigned long KeaReq[1 * NUM_KEA_CRYPT_DESC] = {
|
||||
/* DPD_KEA_f8_UPLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 0) OpId 0xa000 */
|
||||
0x71800010,
|
||||
/* DPD_KEA_f8_DOWNLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 1) OpId 0xa000 */
|
||||
0x71c00010,
|
||||
/* DPD_KEA_f9_UPLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 2) OpId 0xa000 */
|
||||
0x71a00010,
|
||||
/* DPD_KEA_f9_DOWNLINK_CRYPT (DPD_KEA_CRYPT_GROUP + 3) OpId 0xa000 */
|
||||
0x71e00010,
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Header constants for TLS_BLOCK_INBOUND_REQ / DPD_TLS_BLOCK_INBOUND_GROUP
|
||||
*/
|
||||
const unsigned long TlsBlockInboundReq[1 * NUM_TLS_BLOCK_INBOUND_DESC] = {
|
||||
/* DPD_TLS_BLOCK_INBOUND OpId 0x9000 */
|
||||
0x00000000
|
||||
};
|
||||
|
||||
/*
|
||||
* Header constants for TLS_BLOCK_OUTBOUND_REQ / DPD_TLS_BLOCK_OUTBOUND_GROUP
|
||||
*/
|
||||
const unsigned long TlsBlockOutboundReq[1 * NUM_TLS_BLOCK_OUTBOUND_DESC] = {
|
||||
/* DPD_TLS_BLOCK_OUTBOUND OpId 0x9100 */
|
||||
0x00000000
|
||||
};
|
||||
|
||||
/*
|
||||
* Header constants for TLS_STREAM_INBOUND_REQ / DPD_TLS_STREAM_INBOUND_GROUP
|
||||
*/
|
||||
const unsigned long TlsStreamInboundReq[1 * NUM_TLS_STREAM_INBOUND_DESC] = {
|
||||
/* DPD_TLS_STREAM_INBOUND OpId 0x9200 */
|
||||
0x00000000
|
||||
};
|
||||
|
||||
/*
|
||||
* Header constants for TLS_STREAM_OUTBOUND_REQ / DPD_TLS_STREAM_OUTBOUND_GROUP
|
||||
*/
|
||||
const unsigned long TlsStreamOutboundReq[1 * NUM_TLS_STREAM_OUTBOUND_DESC] = {
|
||||
/* DPD_TLS_STREAM_OUTBOUND OpId 0x9300 */
|
||||
0x00000000
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,138 @@
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Sec2Notify.h - ISR register transfer definitions for the SEC2.x
|
||||
* security core family
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2000. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* 1.1.0 Nov 22,2004 sec - move GENERIC_REQ to global header out of necessity
|
||||
* 1.2 Jan 27,2005
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef SEC2NOTIFY_H
|
||||
#define SEC2NOTIFY_H
|
||||
|
||||
/*! \struct STATUS_REQ
|
||||
\brief structure used to indicate the state of the SEC2 as well as the
|
||||
driver. Returned as a pointer by GetStatus() and imbedded in all
|
||||
requests.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
unsigned long ChaAssignmentStatusRegister[2]; /*!< A copy of the contents of
|
||||
\b ChaAssignmentStatusRegister
|
||||
register in SEC2Driver.h
|
||||
*/
|
||||
unsigned long InterruptControlRegister[2]; /*!< A copy of the contents of
|
||||
\b InterruptControlRegister
|
||||
register in SEC2Driver.h
|
||||
*/
|
||||
unsigned long InterruptStatusRegister[2]; /*!< A copy of the contents of
|
||||
\b InterruptStatusRegister
|
||||
register in SEC2Driver.h
|
||||
*/
|
||||
unsigned long IdRegister; /*!< A copy of the contents of
|
||||
\b IdRegister
|
||||
register in SEC2Driver.h
|
||||
*/
|
||||
unsigned long ChannelStatusRegister[NUM_CHANNELS][2]; /*!< A copy of the contents of
|
||||
the \b ChannelPointerStatusRegister"s"
|
||||
registers in SEC2Driver.h
|
||||
*/
|
||||
unsigned long ChannelConfigurationRegister[NUM_CHANNELS][2]; /*!< A copy of the contents of
|
||||
the \b ChannelConfigRegister"s"
|
||||
registers in SEC2Driver.h
|
||||
*/
|
||||
unsigned long CHAInterruptStatusRegister[NUM_CHAS][2]; /*!< A copy of the contents of
|
||||
|
||||
the \b ChaInterruptStatusRegister"s"
|
||||
registers in SEC2Driver.h
|
||||
*/
|
||||
unsigned long QueueEntryDepth; /*!< A copy of the
|
||||
\b QueueEntryDepth global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreeChannels; /*!< A copy of the
|
||||
\b FreeChannels global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreeRngas; /*!< A copy of the
|
||||
\b FreeRngas global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreeAfhas; /*!< A copy of the
|
||||
\b FreeAfhas global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreeDesas; /*!< A copy of the
|
||||
\b FreeDesas global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreeMdhas; /*!< A copy of the
|
||||
\b FreeMdhas global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreePkhas; /*!< A copy of the
|
||||
\b FreePkhas global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreeAesas; /*!< A copy of the
|
||||
\b FreeAesa global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long FreeKeas; /*!< A copy of the
|
||||
\b FreeKeas global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
unsigned long BlockSize; /*!< A copy of the
|
||||
\b BlockSize global
|
||||
in SEC2Driver.h
|
||||
*/
|
||||
} STATUS_REQ;
|
||||
|
||||
typedef STATUS_REQ SEC2_STATUS;
|
||||
|
||||
typedef void* PSEC2_NOTIFY_CTX;
|
||||
|
||||
/*! \struct SEC2_NOTIFY_ON_ERROR_CTX
|
||||
\brief structure used in all requests to indicate the nature
|
||||
of errors.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
unsigned long errorcode; /*!< Error that
|
||||
the request generated
|
||||
*/
|
||||
void *request; /*!< Pointer to
|
||||
original request
|
||||
*/
|
||||
STATUS_REQ driverstatus; /*!< Detailed information
|
||||
as to the state of the
|
||||
hardware and the driver
|
||||
at the time of an error
|
||||
*/
|
||||
} SEC2_NOTIFY_ON_ERROR_CTX, *PSEC2_NOTIFY_ON_ERROR_CTX;
|
||||
|
||||
|
||||
typedef void (*PSEC2_NOTIFY_ROUTINE) (PSEC2_NOTIFY_CTX pCtx);
|
||||
|
||||
typedef void (*PSEC2_NOTIFY_ON_ERROR_ROUTINE) (PSEC2_NOTIFY_ON_ERROR_CTX pErrCtx);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,332 @@
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_cha.c - Channel/CHA operations code for SEC2 Driver
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003, 2004 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs adapted from the final version of mpc18x
|
||||
* 1.1.0 Nov 15,2004 sec - merge linux changes from prior versions
|
||||
* 1.2 Jan 27,2005
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
|
||||
/* Interpeak begin */
|
||||
#undef NUM_CHANNELS
|
||||
#define NUM_CHANNELS (num_channels)
|
||||
extern int num_channels;
|
||||
/* Interpeak end */
|
||||
|
||||
|
||||
int ReleaseCha(unsigned long channelCha, int callingTaskId, BOOLEAN locked);
|
||||
|
||||
|
||||
|
||||
/****************************************************************/
|
||||
/* Function Name: ChaNumToType */
|
||||
/* Purpose: To translate the the CHA number to the CHA chaType */
|
||||
/* Input: cha - CHA Number */
|
||||
/* Output: ChaType */
|
||||
/****************************************************************/
|
||||
int ChaNumToType(int cha)
|
||||
{
|
||||
switch (cha)
|
||||
{
|
||||
case CHA_AFHA:
|
||||
return (CHA_AFHA);
|
||||
case CHA_DES:
|
||||
return (CHA_DES);
|
||||
case CHA_MDHA:
|
||||
return (CHA_MDHA);
|
||||
case CHA_RNG:
|
||||
return (CHA_RNG);
|
||||
case CHA_PKHA:
|
||||
return (CHA_PKHA);
|
||||
case CHA_AESA:
|
||||
return (CHA_AESA);
|
||||
default:
|
||||
return (SEC2_INVALID_CHA_TYPE);
|
||||
}
|
||||
} /* End of ChaNumToType */
|
||||
|
||||
/* this should only be called with channel assignments locked */
|
||||
/********************************************************************/
|
||||
/* Function Name: CheckChas */
|
||||
/* Purpose: Check to see if the CHA is available (at least one of */
|
||||
/* this type of CHA is available) */
|
||||
/* Input: The opId requested */
|
||||
/* Output: SEC2_SUCCESS if this type of CHA is available */
|
||||
/* otherwise the error code */
|
||||
/********************************************************************/
|
||||
int CheckChas(unsigned long OpId)
|
||||
{
|
||||
unsigned int chaType = 0;
|
||||
switch (OpId & 0xf000)
|
||||
{
|
||||
case 0x1000: /* RNG Group */
|
||||
chaType |= CHA_RNGA_BITMASK;
|
||||
break;
|
||||
case 0x2000: /* Des Groups */
|
||||
chaType |= CHA_DESA_BITMASK;
|
||||
break;
|
||||
case 0x3000: /* RC4 Groups */
|
||||
chaType |= CHA_AFHA_BITMASK;
|
||||
break;
|
||||
case 0x4000: /* MD Groups */
|
||||
chaType |= CHA_MDHA_BITMASK;
|
||||
break;
|
||||
case 0x5000: /* PK Groups */
|
||||
chaType |= CHA_PKHA_BITMASK;
|
||||
break;
|
||||
case 0x6000: /* AES Groups */
|
||||
chaType |= CHA_AESA_BITMASK;
|
||||
break;
|
||||
case 0x7000: /* ipsec Des + MD Groups */
|
||||
chaType |= (CHA_MDHA_BITMASK | CHA_DESA_BITMASK);
|
||||
break;
|
||||
case 0x8000: /* ipsec aes + md groups */
|
||||
chaType |= (CHA_MDHA_BITMASK | CHA_AESA_BITMASK);
|
||||
break;
|
||||
default:
|
||||
/* invalid opId */
|
||||
return (SEC2_INVALID_OPERATION_ID);
|
||||
}
|
||||
if (((chaType & CHA_AFHA_BITMASK) != 0) && (FreeAfhas == 0))
|
||||
{
|
||||
return (SEC2_CHA_NOT_AVAILABLE);
|
||||
}
|
||||
else if (((chaType & CHA_DESA_BITMASK) != 0) && (FreeDesas == 0))
|
||||
{
|
||||
return (SEC2_CHA_NOT_AVAILABLE);
|
||||
}
|
||||
else if (((chaType & CHA_MDHA_BITMASK) != 0) && (FreeMdhas == 0))
|
||||
{
|
||||
return (SEC2_CHA_NOT_AVAILABLE);
|
||||
}
|
||||
else if (((chaType & CHA_RNGA_BITMASK) != 0) && (FreeRngas == 0))
|
||||
{
|
||||
return (SEC2_CHA_NOT_AVAILABLE);
|
||||
}
|
||||
else if (((chaType & CHA_PKHA_BITMASK) != 0) && (FreePkhas == 0))
|
||||
{
|
||||
return (SEC2_CHA_NOT_AVAILABLE);
|
||||
}
|
||||
else if (((chaType & CHA_AESA_BITMASK) != 0) && (FreeAesas == 0))
|
||||
{
|
||||
return (SEC2_CHA_NOT_AVAILABLE);
|
||||
}
|
||||
else if (((chaType & CHA_KEA_BITMASK) != 0) && (FreeKeas == 0))
|
||||
{
|
||||
return (SEC2_CHA_NOT_AVAILABLE);
|
||||
}
|
||||
|
||||
/* CHA(s) are available, return OK */
|
||||
return (SEC2_SUCCESS);
|
||||
}
|
||||
/********************************************************************/
|
||||
/* Function Name: ReleaseChannel */
|
||||
/* Purpose: To free a reserved channel */
|
||||
/* */
|
||||
/* Input: channel - the channel number (1-4) */
|
||||
/* callingTaskId - the task id */
|
||||
/* locked - TRUE or FALSE */
|
||||
/* Return: SEC2_SUCCESS if success otherwise the error code */
|
||||
/********************************************************************/
|
||||
int ReleaseChannel(unsigned long channel, int callingTaskId, BOOLEAN locked)
|
||||
{
|
||||
int cha, chaType;
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("ReleaseChannel(%ld, taskID=0x%8x, lock=%d)\n", channel, callingTaskId, locked));
|
||||
/* check channel value */
|
||||
if ((channel == 0) || (channel > NUM_CHANNELS)) return (SEC2_INVALID_CHANNEL);
|
||||
|
||||
if (!locked)
|
||||
IOLockChannelAssignment();
|
||||
|
||||
/* check that calling task is the channel's owner */
|
||||
if (ChannelAssignments[channel - 1].ownerTaskId != callingTaskId)
|
||||
{
|
||||
/* error, caller is not the channel owner */
|
||||
if (!locked)
|
||||
IOUnLockChannelAssignment();
|
||||
return (SEC2_INVALID_CHANNEL);
|
||||
}
|
||||
|
||||
/* release all cha's assigned to this channel */
|
||||
for (cha=0; cha<NUM_CHAS; cha++)
|
||||
{
|
||||
if (ChaAssignments[cha] == (unsigned char) channel)
|
||||
{
|
||||
/* determine cha type from cha number */
|
||||
chaType = ChaNumToType(cha);
|
||||
/* release the cha */
|
||||
ReleaseCha((channel << 8) | chaType, callingTaskId, TRUE);
|
||||
}
|
||||
}
|
||||
|
||||
FreeChannels++;
|
||||
|
||||
/* release the channel */
|
||||
ChannelAssignments[channel - 1].assignment = CHANNEL_FREE;
|
||||
|
||||
if (!locked)
|
||||
{
|
||||
IOUnLockChannelAssignment();
|
||||
|
||||
/* schedule queued requests on any freed channels */
|
||||
ScheduleNext();
|
||||
}
|
||||
|
||||
return (SEC2_SUCCESS);
|
||||
} /* end of ReleaseChannel */
|
||||
/**************************************************************************/
|
||||
/* Function Name: ReleaseCha */
|
||||
/* Purpose: To release a specific CHA */
|
||||
/* or a manual channel. */
|
||||
/* Input: channelCha - the bottom eight bits is the CHA chaType */
|
||||
/* the next eight bits is the channel number (1-4) */
|
||||
/* callingTaskId - the task id */
|
||||
/* locked - TRUE or FALSE */
|
||||
/* Return: SEC2_SUCCESS if success otherwise the error code */
|
||||
/**************************************************************************/
|
||||
int ReleaseCha(unsigned long channelCha, int callingTaskId, BOOLEAN locked)
|
||||
{
|
||||
unsigned char channel = (unsigned char)((channelCha >> 8) & 0xFF);
|
||||
unsigned char chaType = (unsigned char)(channelCha & 0xFF);
|
||||
unsigned long chaStatus[2] = {0,0};
|
||||
/* unsigned long temp[2] = {0,0}; */
|
||||
int cha;
|
||||
int numChas;
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("ReleaseCha(%ld, taskID=0x%8x, lock=%d)\n", channelCha, callingTaskId, locked));
|
||||
/* check chaType value */
|
||||
if ((chaType != CHA_AFHA) && (chaType != CHA_DES) && (chaType != CHA_MDHA)
|
||||
&& (chaType != CHA_RNG) && (chaType != CHA_PKHA)
|
||||
&& (chaType != CHA_AESA)
|
||||
)
|
||||
return (SEC2_INVALID_CHA_TYPE);
|
||||
|
||||
if (!locked)
|
||||
IOLockChannelAssignment();
|
||||
|
||||
/* check that callingTaskId matches the channel owner */
|
||||
if (ChannelAssignments[channel - 1].ownerTaskId != callingTaskId)
|
||||
{
|
||||
/* error, cha owner is not current task */
|
||||
if (!locked)
|
||||
IOUnLockChannelAssignment();
|
||||
return (SEC2_INVALID_CHANNEL);
|
||||
}
|
||||
|
||||
/* determine number of CHAs for the chaType */
|
||||
switch (chaType)
|
||||
{
|
||||
case CHA_AFHA:
|
||||
numChas = NUM_AFHAS;
|
||||
break;
|
||||
case CHA_DES:
|
||||
numChas = NUM_DESAS;
|
||||
break;
|
||||
case CHA_MDHA:
|
||||
numChas = NUM_MDHAS;
|
||||
break;
|
||||
case CHA_RNG:
|
||||
numChas = NUM_RNGAS;
|
||||
break;
|
||||
case CHA_PKHA:
|
||||
numChas = NUM_PKHAS;
|
||||
break;
|
||||
case CHA_AESA:
|
||||
numChas = NUM_AESAS;
|
||||
break;
|
||||
}
|
||||
|
||||
/* find the CHA to release */
|
||||
for (cha=chaType; cha<(chaType+numChas); cha++)
|
||||
{
|
||||
/* see if the CHA is assigned to the given channel */
|
||||
if (ChaAssignments[cha] == channel)
|
||||
{
|
||||
/* found a CHA assigned to the given channel */
|
||||
/* release the CHA */
|
||||
chaStatus[0] = *(unsigned long *)(ChaAssignmentStatusRegister);
|
||||
chaStatus[1] = *(unsigned long *)(ChaAssignmentStatusRegister + 1);
|
||||
|
||||
if (cha < 4)
|
||||
{
|
||||
chaStatus[0] &= (~(0xF << (cha * 8)));
|
||||
ChaAssignments[cha] = CHA_DYNAMIC;
|
||||
}
|
||||
else
|
||||
{
|
||||
chaStatus[1] &= (~(0xF << ((cha - 4) * 8)) << 16);
|
||||
ChaAssignments[cha] = CHA_DYNAMIC;
|
||||
}
|
||||
|
||||
*(ChaAssignmentControlRegister) = chaStatus[0];
|
||||
*(ChaAssignmentControlRegister + 1) = chaStatus[1];
|
||||
|
||||
/* reset the CHA */
|
||||
*(ChaResetControlRegister[cha_idx[cha]]) = CHA_SOFTWARE_RESET;
|
||||
*(ChaResetControlRegister[cha_idx[cha]] + 1) = 0;
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* see if we found a CHA to release */
|
||||
if (cha >= (chaType + numChas))
|
||||
{
|
||||
/* we didn't find a CHA to release, return an error */
|
||||
if (!locked)
|
||||
IOUnLockChannelAssignment();
|
||||
return (SEC2_INVALID_CHA_TYPE);
|
||||
}
|
||||
|
||||
/* update free CHA counts */
|
||||
switch (chaType)
|
||||
{
|
||||
case CHA_AFHA:
|
||||
FreeAfhas++;
|
||||
break;
|
||||
case CHA_DES:
|
||||
FreeDesas++;
|
||||
break;
|
||||
case CHA_MDHA:
|
||||
FreeMdhas++;
|
||||
break;
|
||||
case CHA_RNG:
|
||||
FreeRngas++;
|
||||
break;
|
||||
case CHA_PKHA:
|
||||
FreePkhas++;
|
||||
break;
|
||||
case CHA_AESA:
|
||||
FreeAesas++;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!locked)
|
||||
{
|
||||
IOUnLockChannelAssignment();
|
||||
|
||||
/* schedule queued requests on any freed CHAs */
|
||||
ScheduleNext();
|
||||
}
|
||||
|
||||
return (SEC2_SUCCESS);
|
||||
} /* End of ReleaseCha */
|
||||
@@ -0,0 +1,402 @@
|
||||
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_dpd.c -- Code to construct a packet descriptor for SEC2 Driver
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* May 26,2004 sec - add support for scatter pointers
|
||||
* 1.1.0 Nov 16,2004 sec - incorporate linux changes from prior versions
|
||||
* 1.1.1 Dec 16,2004 sec - clean up prototypes and warnings
|
||||
* 1.2 Jan 27,2005 sec - bugfix in DPD dumper
|
||||
*/
|
||||
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
#include "Sec2Descriptors.h"
|
||||
#include "sec2_dpd_Table.h"
|
||||
|
||||
|
||||
static int VerifyRequest(void *request, DPD_DETAILS_ENTRY *pDesc);
|
||||
static DPD_DETAILS_ENTRY *GetRequestDescEntry(unsigned long opId);
|
||||
|
||||
|
||||
|
||||
/* Build a SEC2-channel-compatible fragment map from a generic one */
|
||||
/* inList: external linked list */
|
||||
/* ptrEnt: will become head of compatible list we'll construct */
|
||||
/* */
|
||||
int MapScatterFragments(unsigned long inList,
|
||||
unsigned long *ptrEnt)
|
||||
{
|
||||
int i, listSiz;
|
||||
EXT_SCATTER_ELEMENT *inElem;
|
||||
SCATTER_ELEMENT *outList;
|
||||
|
||||
|
||||
inElem = (EXT_SCATTER_ELEMENT *)inList;
|
||||
|
||||
/* How many elements to alloc? */
|
||||
listSiz = 0;
|
||||
while (inElem != NULL)
|
||||
{
|
||||
listSiz++;
|
||||
inElem = inElem->next;
|
||||
}
|
||||
|
||||
SEC2Dump(DBGTXT_SETRQ, ("MapScatterFragments(): list 0x%08lx has %d fragments\n", inList, listSiz));
|
||||
|
||||
/* Allocate a chunk off the driver's available heap */
|
||||
outList = malloc(sizeof(SCATTER_ELEMENT) * listSiz);
|
||||
if (outList == NULL)
|
||||
return(SEC2_FRAGMENT_POOL_EXHAUSTED);
|
||||
|
||||
/* Stuff allocated chunk with caller's info */
|
||||
i = 0;
|
||||
inElem = (EXT_SCATTER_ELEMENT *)inList;
|
||||
while (inElem != NULL)
|
||||
{
|
||||
outList[i].segAddr = (void *)__vpa((unsigned long)inElem->fragment);
|
||||
outList[i].segLen = (unsigned short)inElem->size;
|
||||
outList[i].linkStat = 0;
|
||||
inElem = inElem->next;
|
||||
SEC2Dump(DBGTXT_SETRQ,
|
||||
("MapScatterFragments(): new fragment 0x%08x, %d bytes\n",
|
||||
(unsigned)outList[i].segAddr,
|
||||
outList[i].segLen));
|
||||
i++;
|
||||
}
|
||||
|
||||
/* once done, set the "return" bit in the last element */
|
||||
outList[i - 1].linkStat |= SEGLIST_RETURN;
|
||||
|
||||
*ptrEnt = __vpa((unsigned long)outList);
|
||||
|
||||
return(SEC2_SUCCESS);
|
||||
}
|
||||
|
||||
/* Free a SEC2-hardware-compatible fragment chain. antithesis of MapScatterFragments */
|
||||
/* Should be called upon as part of a channel interrupt cleanup process */
|
||||
|
||||
void UnmapScatterFragments(unsigned long *ptrEnt)
|
||||
{
|
||||
/* free((void *)ChannelAssignments[channel].Dpds[i]->fld[j].ptr); */
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Convert driver-native request structure to DPD and insert
|
||||
*/
|
||||
|
||||
int RequestToDpd(register GENERIC_REQ *pReq, register int channel)
|
||||
{
|
||||
|
||||
#define DPDPTR (ChannelAssignments[channel].Dpds[dpdCount])
|
||||
|
||||
register DPD_DETAILS_ENTRY *pDesc;
|
||||
register unsigned long opId;
|
||||
register int i, status;
|
||||
register int dpdCount;
|
||||
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): req @0x%08x ch%d\n", (unsigned)pReq, channel+1));
|
||||
|
||||
if (pReq == NULL)
|
||||
return SEC2_NULL_REQUEST;
|
||||
|
||||
dpdCount = 0;
|
||||
|
||||
/* process request(s) */
|
||||
/* do {stuff} while pReq points to real request */
|
||||
do
|
||||
{
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): get entry for opId 0x%08lx\n", pReq->opId));
|
||||
pDesc = GetRequestDescEntry (pReq->opId);
|
||||
if (pDesc == NULL)
|
||||
return SEC2_INVALID_OPERATION_ID;
|
||||
|
||||
/* Validate the contents of the request */
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): VerifyRequest(0x%08x, 0x%08x)\n", (unsigned)pReq, (unsigned)pDesc));
|
||||
status = VerifyRequest(pReq, pDesc);
|
||||
if (status != SEC2_SUCCESS)
|
||||
return status;
|
||||
|
||||
/* If there are insufficient DPDs save the current request
|
||||
list entry and offset. Indicate that the request is "chunked"
|
||||
*/
|
||||
if (dpdCount >= MAX_DPDS)
|
||||
return (SEC2_INSUFFICIENT_REQS);
|
||||
|
||||
/*
|
||||
* We have sufficient resources (DPD slots) to process this request.
|
||||
* Initialize a DPD and link the prior DPD to this one (if it is not the first)
|
||||
*/
|
||||
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): clear DPD 0x%08x\n", (unsigned)DPDPTR));
|
||||
memset(DPDPTR, 0x00, sizeof(DPD));
|
||||
|
||||
/* fill in the dpd header */
|
||||
opId = pReq->opId;
|
||||
DPDPTR->header = pDesc->hdrDesc[1*(opId & DESC_NUM_MASK)];
|
||||
|
||||
/* For each field in a request: */
|
||||
for (i = 0; i < NUM_DPD_FLDS && pDesc->fld[i].txt != NULL; i++)
|
||||
{
|
||||
if (*(long *)pDesc->fld[i].txt == *(long *)"NIL") {
|
||||
DPDPTR->fld[i].ptr = 0;
|
||||
DPDPTR->fld[i].len = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* deal with basic pointer */
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): converting entry %d->0x%08x\n", i, *(unsigned int *)((unsigned int)pReq + pDesc->fld[i].ptrOffset1st)));
|
||||
/* if offset AND caller specfied non-NULL pointer, assign/convert that pointer */
|
||||
if ((pDesc->fld[i].ptrOffset1st != 0) &&
|
||||
*(unsigned int *)((unsigned int)pReq + pDesc->fld[i].ptrOffset1st))
|
||||
DPDPTR->fld[i].ptr = __vpa(*(unsigned int *) ((unsigned int)pReq + pDesc->fld[i].ptrOffset1st));
|
||||
|
||||
/* if scatter pointer, deal with special case */
|
||||
if (pReq->scatterBufs & (0x01 << i))
|
||||
{
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): pointer word %d is scattered\n", i+1));
|
||||
|
||||
/* this should be linked list to fragment map, do conversion */
|
||||
status = MapScatterFragments(*(unsigned int *)((unsigned int)pReq + pDesc->fld[i].ptrOffset1st),
|
||||
&(DPDPTR->fld[i].ptr));
|
||||
if (status != SEC2_SUCCESS) /* map failed? */
|
||||
return(status);
|
||||
}
|
||||
|
||||
/* deal with length */
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): set length = %d\n", *(unsigned int *)((unsigned int)pReq + pDesc->fld[i].lenOffset1st)));
|
||||
DPDPTR->fld[i].len = *(unsigned int *) ((unsigned int)pReq + pDesc->fld[i].lenOffset1st);
|
||||
DPDPTR->fld[i].len <<= 16;
|
||||
|
||||
SEC2Dump(DBGTXT_SETRQ, ("RequestToDpd(): set offset= %d\n", *(unsigned int *)((unsigned int)pReq + pDesc->fld[i].extOffset)));
|
||||
if (pDesc->fld[i].extOffset != 0)
|
||||
DPDPTR->fld[i].len |= *(unsigned int *) ((unsigned int)pReq + pDesc->fld[i].extOffset) << 8;
|
||||
|
||||
if (pReq->scatterBufs & (0x01 << i))
|
||||
DPDPTR->fld[i].len |= PTRTYPE_JBIT; /* set scatter flag bit */
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DBG
|
||||
/* If DPD dump requested, show this packet descriptor content */
|
||||
if (SEC2DebugLevel | DBGTXT_DPDSHOW) {
|
||||
|
||||
SEC2Dump(DBGTXT_DPDSHOW,
|
||||
("DPD header = 0x%08lx\n", DPDPTR->header));
|
||||
|
||||
SEC2Dump(DBGTXT_DPDSHOW,
|
||||
("Primary EU/Mode 0x%02lx:%02lx, ",
|
||||
(DPDPTR->header & 0xf0000000) >> 28,
|
||||
(DPDPTR->header & 0x0ff00000) >> 20));
|
||||
|
||||
SEC2Dump(DBGTXT_DPDSHOW,
|
||||
("Secondary EU/Mode 0x%02lx:%02lx, ",
|
||||
(DPDPTR->header & 0x000f0000) >> 16,
|
||||
(DPDPTR->header & 0x0000ff00) >> 8));
|
||||
|
||||
SEC2Dump(DBGTXT_DPDSHOW,
|
||||
("Type 0x%02lx, ",
|
||||
(DPDPTR->header & 0x000000f8) >> 3));
|
||||
|
||||
if (DPDPTR->header & 0x00000002)
|
||||
SEC2Dump(DBGTXT_DPDSHOW, ("Inbound, "));
|
||||
else
|
||||
SEC2Dump(DBGTXT_DPDSHOW, ("Outbound, "));
|
||||
|
||||
if (DPDPTR->header & 0x00000001)
|
||||
SEC2Dump(DBGTXT_DPDSHOW, ("Done\n"));
|
||||
else
|
||||
SEC2Dump(DBGTXT_DPDSHOW, ("\n"));
|
||||
|
||||
for (i = 0; i < NUM_DPD_FLDS; i++)
|
||||
SEC2Dump(DBGTXT_DPDSHOW,
|
||||
("DPD ptr:len/ext p%d = 0x%08lx:%08lx\n",
|
||||
i,
|
||||
DPDPTR->fld[i].ptr,
|
||||
DPDPTR->fld[i].len));
|
||||
} /* if (DPD SHOW) */
|
||||
#endif
|
||||
|
||||
/* Move onto the next block
|
||||
*/
|
||||
pReq = (GENERIC_REQ *)pReq->nextReq;
|
||||
dpdCount++;
|
||||
|
||||
} while (pReq != NULL); /* End while (request != NULL) */
|
||||
|
||||
return SEC2_SUCCESS;
|
||||
} /* end of RequestToDpd */
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Validate request content
|
||||
*/
|
||||
int VerifyRequest(register void *request, register DPD_DETAILS_ENTRY *pDesc)
|
||||
{
|
||||
register int i;
|
||||
register unsigned long len;
|
||||
/* register unsigned long addr; */
|
||||
|
||||
for (i = 0; i < NUM_DPD_FLDS && pDesc->fld[i].txt != NULL; i++)
|
||||
{
|
||||
/* A NULL pointer to a size checking function means "don't bother checking" */
|
||||
if (pDesc->fld[i].pFncSize != NULL)
|
||||
{
|
||||
len = *(unsigned int *)((unsigned int)request + pDesc->fld[i].lenOffset1st);
|
||||
|
||||
if (!pDesc->fld[i].pFncSize(len))
|
||||
{
|
||||
SEC2Dump(DBGTXT_SETRQ,
|
||||
("VerifyRequest->fld(%s) Invalid Length=%ld\n",
|
||||
pDesc->fld[i].txt, len));
|
||||
return SEC2_INVALID_LENGTH;
|
||||
}
|
||||
}
|
||||
/* check Extent Length < 128 */
|
||||
if (pDesc->fld[i].extOffset != 0)
|
||||
{
|
||||
len = *(unsigned int *)((unsigned int)request + pDesc->fld[i].extOffset);
|
||||
if (len >= 128)
|
||||
return SEC2_INVALID_LENGTH;
|
||||
}
|
||||
}
|
||||
|
||||
return SEC2_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Scan the DPDDetails table for a particular opId value. Return a pointer
|
||||
to the entry if it is found, NULL otherwise
|
||||
*/
|
||||
DPD_DETAILS_ENTRY *GetRequestDescEntry(unsigned long opId)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
opId &= DESC_TYPE_MASK;
|
||||
while (DpdDetails[i].txt != NULL && DpdDetails[i].opId != opId) i++;
|
||||
|
||||
return(DpdDetails[i].opId == 0 ? NULL : &DpdDetails[i]);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* The following Chk???() routines and the FitInBlock() routine are used
|
||||
to verify that the length of a data area is consistent with a request type.
|
||||
|
||||
They are supplied as pointers to functions in the DPDDetails table
|
||||
*/
|
||||
|
||||
|
||||
BOOLEAN ChkDesIvLen(unsigned long len)
|
||||
{
|
||||
return len != 0 && len != DES_BLOCK ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkDesKeyLen(unsigned long len)
|
||||
{
|
||||
return len != DES_BLOCK && len != (2*DES_BLOCK) && len != (3*DES_BLOCK) ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkDesStaticDataLen(unsigned long len)
|
||||
{
|
||||
return (len & 0x7) != 0 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkDesDataLen(unsigned long len)
|
||||
{
|
||||
return (len & 0x7) != 0 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkDesCtxLen(unsigned long len)
|
||||
{
|
||||
return len != 0 && len != DES_BLOCK != 0 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkAesKeyLen(unsigned long len)
|
||||
{
|
||||
return len != 16 && len != 24 && len != 32 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkAesIvLen(unsigned long len)
|
||||
{
|
||||
return len != 0 && len != 16 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkArcKeyLen(unsigned long len)
|
||||
{
|
||||
return len < ARC4_MIN_KEYBYTES || len > ARC4_MAX_KEYBYTES ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkArcCtxLen(unsigned long len)
|
||||
{
|
||||
return len != ARC4_CONTEXTBYTES ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkOptionalArcCtxLen(unsigned long len)
|
||||
{
|
||||
return len != ARC4_CONTEXTBYTES && len != 0 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkEccLen(unsigned long len)
|
||||
{
|
||||
return len > 64 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN FitInBlock(unsigned long len)
|
||||
{
|
||||
return len > BlockSize ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
BOOLEAN ChkCcmpKeyLen(unsigned long len)
|
||||
{
|
||||
return len != 0 && len != 16 ? FALSE : TRUE;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,749 @@
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_dpd_Table.h -- Request to DPD Table translation table
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2000. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* May 24,2003 sec - re-ordered RRMODP pointers per T2.0
|
||||
* Aug 23,2004 sec - add TLS support
|
||||
* Oct 15,2004 sec - reordered R2modN and MODEXP pointers
|
||||
* 1.1.0 Dec 05,2004 sec - prep for release
|
||||
* 1.1.1 Dec 16,2004 sec - remove old unused diagnostics
|
||||
* Jan 17,2005 sec - add in missing IPSEC table entry
|
||||
* 1.2 Jan 27,2005 sec - fix up some obsolete names
|
||||
*/
|
||||
|
||||
extern BOOLEAN ChkDesIvLen(unsigned long len);
|
||||
extern BOOLEAN ChkDesKeyLen(unsigned long len);
|
||||
extern BOOLEAN ChkDesStaticDataLen(unsigned long len);
|
||||
extern BOOLEAN ChkDesDataLen(unsigned long len);
|
||||
extern BOOLEAN ChkDesCryptLen(unsigned long len);
|
||||
extern BOOLEAN ChkDesCtxLen(unsigned long len);
|
||||
extern BOOLEAN ChkArcKeyLen(unsigned long len);
|
||||
extern BOOLEAN ChkArcCtxLen(unsigned long len);
|
||||
extern BOOLEAN ChkOptionalArcCtxLen(unsigned long len);
|
||||
extern BOOLEAN ChkEccLen(unsigned long len);
|
||||
extern BOOLEAN ChkAesIvLen(unsigned long len);
|
||||
extern BOOLEAN ChkAesKeyLen(unsigned long len);
|
||||
extern BOOLEAN ChkCcmpKeyLen(unsigned long len);
|
||||
|
||||
/*! \enum FLD_TYPE
|
||||
\brief A field can either be for reading from or writing to
|
||||
*/
|
||||
typedef enum {
|
||||
Read,
|
||||
Write,
|
||||
Extent
|
||||
} FLD_TYPE;
|
||||
|
||||
/* DPD_FLD_DETAILS_ENTRY
|
||||
Describes where and how a field in a request goes to a field in a DPD
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
char *txt; /* Description of the
|
||||
field within the request
|
||||
a NULL indicates the end
|
||||
of field entries */
|
||||
unsigned int lenOffset1st; /* Offset into request pointer
|
||||
for the initial length field */
|
||||
unsigned int lenOffsetNxt; /* Offset into request pointer
|
||||
for the next length field
|
||||
Used when input points to
|
||||
output of the previous
|
||||
request */
|
||||
unsigned int ptrOffset1st; /* Offset into request pointer
|
||||
for the initial data area */
|
||||
unsigned int extOffset;
|
||||
FLD_TYPE dataType; /* Data type either:
|
||||
a "Read" or "Write" area */
|
||||
BOOLEAN (*pFncSize)(unsigned long len); /* Pointer to
|
||||
function that checks
|
||||
whether the length is
|
||||
consistent with the request */
|
||||
} DPD_FLD_DETAILS_ENTRY;
|
||||
|
||||
/*! \struct DPD_DETAILS_ENTRY
|
||||
\brief Describes how a request is broken into a single DPD or a set of chained
|
||||
DPDs
|
||||
*/
|
||||
typedef struct DPD_DETAILS_ENTRY
|
||||
{
|
||||
unsigned long opId; /* Operation ID for entry */
|
||||
char *txt; /* Description of request
|
||||
a NULL indicates the end
|
||||
of the table */
|
||||
unsigned long sz; /* Size of request */
|
||||
const unsigned long *hdrDesc; /* Descriptor Header */
|
||||
unsigned int lenOffsetBlockLen; /* Offset into request pointer
|
||||
for total length of data */
|
||||
DPD_FLD_DETAILS_ENTRY fld[NUM_DPD_FLDS];
|
||||
} DPD_DETAILS_ENTRY; /* Each request is enumerated here */
|
||||
|
||||
#ifndef offsetof
|
||||
/* offsetof(s,m)
|
||||
Macro that identifies the byte offset of a field m within a structure s
|
||||
*/
|
||||
#define offsetof(s,m) (size_t)&(((s *)0)->m)
|
||||
#endif
|
||||
#define STD_OFFSETS(s,l1,l2,p1,p2) offsetof(s,l1), offsetof(s,l2),\
|
||||
offsetof(s,p1), 0
|
||||
#define EXT_OFFSETS(s,l1,l2,p1,p2) offsetof(s,l1), offsetof(s,l2),\
|
||||
offsetof(s,p1), offsetof(s,p2)
|
||||
#define NULL_PTR_OFFSETS(s,l1,l2) offsetof(s,l1), offsetof(s,l2), 0, 0
|
||||
#define ZERO_LEN_OFFSETS(s,p1,p2) 0, 0, offsetof(s,p1), offsetof(s,p2)
|
||||
#define ALL_ZERO_OFFSETS 0, 0, 0, 0
|
||||
|
||||
static char NIL[] = {"NIL"};
|
||||
|
||||
|
||||
DPD_DETAILS_ENTRY DpdDetails[] =
|
||||
{
|
||||
|
||||
|
||||
/* DPD_RNG_GROUP */
|
||||
{
|
||||
DPD_RNG_GROUP, "DPD_RNG_GROUP",
|
||||
sizeof(RNG_REQ), RngDesc,
|
||||
offsetof(RNG_REQ,rngBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"rngData", STD_OFFSETS(RNG_REQ,rngBytes,rngBytes,rngData,rngData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_DES_CBC_GROUP */
|
||||
{
|
||||
DPD_DES_CBC_GROUP, "DPD_DES_CBC_GROUP",
|
||||
sizeof(DES_CBC_CRYPT_REQ), DesCbcReq,
|
||||
offsetof(DES_CBC_CRYPT_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inIvData", STD_OFFSETS(DES_CBC_CRYPT_REQ,inIvBytes,inIvBytes,inIvData,outIvData), Read, ChkDesIvLen},
|
||||
{"keyData", STD_OFFSETS(DES_CBC_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkDesKeyLen},
|
||||
{"inData", STD_OFFSETS(DES_CBC_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, ChkDesDataLen},
|
||||
{"outData", STD_OFFSETS(DES_CBC_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
|
||||
{"outIvData", STD_OFFSETS(DES_CBC_CRYPT_REQ,outIvBytes,outIvBytes,outIvData,outIvData), Write, ChkDesIvLen},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_DES_ECB_GROUP */
|
||||
{
|
||||
DPD_DES_ECB_GROUP, "DPD_DES_ECB_GROUP",
|
||||
sizeof(DES_CRYPT_REQ), DesReq,
|
||||
offsetof(DES_CRYPT_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"keyData", STD_OFFSETS(DES_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkDesKeyLen},
|
||||
{"inData", STD_OFFSETS(DES_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, ChkDesDataLen},
|
||||
{"outData", STD_OFFSETS(DES_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP */
|
||||
{
|
||||
DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP, "DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP",
|
||||
sizeof(ARC4_LOADCTX_CRYPT_REQ), Rc4LoadCtxUnloadCtxReq,
|
||||
offsetof(ARC4_LOADCTX_CRYPT_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inCtxData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,inCtxBytes,inCtxBytes,inCtxData,outCtxData), Read, ChkArcCtxLen},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, NULL},
|
||||
{"outData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
|
||||
{"outCtxData", STD_OFFSETS(ARC4_LOADCTX_CRYPT_REQ,outCtxBytes,outCtxBytes,outCtxData,outCtxData), Write, ChkArcCtxLen},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP */
|
||||
{
|
||||
DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP, "DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP",
|
||||
sizeof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ), Rc4LoadKeyUnloadCtxReq,
|
||||
offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"keyData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkArcKeyLen},
|
||||
{"inData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,inBytes,inBytes,inData,inData), Read, NULL},
|
||||
{"outData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,inBytes,inBytes,outData,outData), Write, NULL},
|
||||
{"outCtxData", STD_OFFSETS(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ,outCtxBytes,outCtxBytes,outCtxData,outCtxData), Write, ChkArcCtxLen},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_HASH_LDCTX_HASH_ULCTX_GROUP */
|
||||
{
|
||||
DPD_HASH_LDCTX_HASH_ULCTX_GROUP, "DPD_HASH_LDCTX_HASH_ULCTX_GROUP",
|
||||
sizeof(HASH_REQ), MdhaReq,
|
||||
offsetof(HASH_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"ctxData", STD_OFFSETS(HASH_REQ,ctxBytes,outBytes,ctxData,outData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inData", STD_OFFSETS(HASH_REQ,inBytes,inBytes,inData,inData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"outData", STD_OFFSETS(HASH_REQ,outBytes,outBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP */
|
||||
{
|
||||
DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP, "DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP",
|
||||
sizeof(HASH_REQ), MdhaPadReq,
|
||||
offsetof(HASH_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"ctxData", STD_OFFSETS(HASH_REQ,ctxBytes,ctxBytes,ctxData,ctxData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inData", STD_OFFSETS(HASH_REQ,inBytes,inBytes,inData,inData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"outData", STD_OFFSETS(HASH_REQ,outBytes,outBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_HASH_LDCTX_HMAC_ULCTX_GROUP */
|
||||
{
|
||||
DPD_HASH_LDCTX_HMAC_ULCTX_GROUP, "DPD_HASH_LDCTX_HMAC_ULCTX_GROUP",
|
||||
sizeof(HMAC_PAD_REQ), HmacPadReq,
|
||||
offsetof(HMAC_PAD_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"keyData", STD_OFFSETS(HMAC_PAD_REQ,keyBytes,keyBytes,keyData,keyData), Read, NULL},
|
||||
{"inData", STD_OFFSETS(HMAC_PAD_REQ,inBytes,inBytes,inData,inData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"outData", STD_OFFSETS(HMAC_PAD_REQ,outBytes,outBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_MM_LDCTX_EXP_ULCTX_GROUP */
|
||||
{
|
||||
DPD_MM_LDCTX_EXP_ULCTX_GROUP, "DPD_MM_LDCTX_EXP_ULCTX_GROUP",
|
||||
sizeof(MOD_EXP_REQ), PkhaMmExpReq,
|
||||
offsetof(MOD_EXP_REQ,outBytes),
|
||||
{
|
||||
{"modData", STD_OFFSETS(MOD_EXP_REQ,modBytes,modBytes,modData,modData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"aData", STD_OFFSETS(MOD_EXP_REQ,aDataBytes,aDataBytes,aData,aData), Read, NULL},
|
||||
{"expData", STD_OFFSETS(MOD_EXP_REQ,expBytes,expBytes,expData,expData), Read, NULL},
|
||||
{"outData", STD_OFFSETS(MOD_EXP_REQ,outBytes,outBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_MM_SS_RSA_EXP */
|
||||
{
|
||||
DPD_MM_SS_RSA_EXP, "DPD_MM_SS_RSA_EXP",
|
||||
sizeof(MOD_SS_EXP_REQ), PkhaMmSsExpReq,
|
||||
0,
|
||||
{
|
||||
{"modData",STD_OFFSETS(MOD_SS_EXP_REQ,modBytes,modBytes,modData,modData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"aData",STD_OFFSETS(MOD_SS_EXP_REQ,aDataBytes,aDataBytes,aData,aData), Read, NULL},
|
||||
{"expData",STD_OFFSETS(MOD_SS_EXP_REQ,expBytes,expBytes,expData,expData), Read, NULL},
|
||||
{"bData",STD_OFFSETS(MOD_SS_EXP_REQ,bDataBytes,bDataBytes,bData,bData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_MM_LDCTX_R2MODN_ULCTX_GROUP */
|
||||
{
|
||||
DPD_MM_LDCTX_R2MODN_ULCTX_GROUP, "DPD_MM_LDCTX_R2MODN_ULCTX_GROUP",
|
||||
sizeof(MOD_R2MODN_REQ), PkhaModR2modnReq,
|
||||
offsetof(MOD_R2MODN_REQ,outBytes),
|
||||
{
|
||||
{"modData", STD_OFFSETS(MOD_R2MODN_REQ,modBytes,modBytes,modData,modData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"outData", STD_OFFSETS(MOD_R2MODN_REQ,outBytes,outBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_MM_LDCTX_RRMODP_ULCTX_GROUP */
|
||||
{
|
||||
DPD_MM_LDCTX_RRMODP_ULCTX_GROUP, "DPD_MM_LDCTX_RRMODP_ULCTX_GROUP",
|
||||
sizeof(MOD_RRMODP_REQ), PkhaMmRrmodpReq,
|
||||
offsetof(MOD_RRMODP_REQ,outBytes),
|
||||
{
|
||||
{"pData", STD_OFFSETS(MOD_RRMODP_REQ,pBytes,pBytes,pData,pData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"nBytes", NULL_PTR_OFFSETS(MOD_RRMODP_REQ,nBytes,nBytes), Read, NULL},
|
||||
{"outData", STD_OFFSETS(MOD_RRMODP_REQ,outBytes,outBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_MM_LDCTX_2OP_ULCTX_GROUP */
|
||||
{
|
||||
DPD_MOD_LDCTX_2OP_ULCTX_GROUP, "DPD_MOD_LDCTX_2OP_ULCTX_GROUP",
|
||||
sizeof(MOD_2OP_REQ), PkhaMod2OpReq,
|
||||
offsetof(MOD_2OP_REQ,outBytes),
|
||||
{
|
||||
{"modData", STD_OFFSETS(MOD_2OP_REQ,modBytes,modBytes,modData,modData), Read, NULL},
|
||||
{"bData", STD_OFFSETS(MOD_2OP_REQ,bDataBytes,bDataBytes,bData,bData), Read, NULL},
|
||||
{"aData", STD_OFFSETS(MOD_2OP_REQ,aDataBytes,aDataBytes,aData,aData), Read, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"outData", STD_OFFSETS(MOD_2OP_REQ,outBytes,outBytes,outData,outData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_EC_LDCTX_kP_ULCTX_GROUP */
|
||||
{
|
||||
DPD_EC_LDCTX_kP_ULCTX_GROUP, "DPD_EC_LDCTX_kP_ULCTX_GROUP",
|
||||
sizeof(ECC_POINT_REQ), PkhaEccPointReq,
|
||||
offsetof(ECC_POINT_REQ, b3DataBytes),
|
||||
{
|
||||
{"nData", STD_OFFSETS(ECC_POINT_REQ,nDataBytes,nDataBytes,nData,nData), Read, NULL},
|
||||
{"eData", STD_OFFSETS(ECC_POINT_REQ,eDataBytes,eDataBytes,eData,eData), Read, NULL},
|
||||
{"buildData", STD_OFFSETS(ECC_POINT_REQ,buildDataBytes,buildDataBytes,buildData,buildData), Read, NULL},
|
||||
{"b1Data", STD_OFFSETS(ECC_POINT_REQ,b1DataBytes,b1DataBytes,b1Data,b1Data), Write, NULL},
|
||||
{"b2Data", STD_OFFSETS(ECC_POINT_REQ,b2DataBytes,b2DataBytes,b2Data,b2Data), Write, NULL},
|
||||
{"b3Data", STD_OFFSETS(ECC_POINT_REQ,b3DataBytes,b3DataBytes,b3Data,b3Data), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_EC_2OP_GROUP */
|
||||
{
|
||||
DPD_EC_2OP_GROUP, "DPD_EC_2OP_GROUP",
|
||||
sizeof(ECC_2OP_REQ), PkhaEcc2OpReq,
|
||||
offsetof(ECC_2OP_REQ,outBytes),
|
||||
{
|
||||
{"bData", STD_OFFSETS(ECC_2OP_REQ,bDataBytes,bDataBytes,bData,bData), Read, ChkEccLen},
|
||||
{"aData", STD_OFFSETS(ECC_2OP_REQ,aDataBytes,aDataBytes,aData,aData), Read, ChkEccLen},
|
||||
{"modData", STD_OFFSETS(ECC_2OP_REQ,modBytes,modBytes,modData,modData), Read, ChkEccLen},
|
||||
{"outData", STD_OFFSETS(ECC_2OP_REQ,outBytes,outBytes,outData,outData), Write, ChkEccLen},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_EC_SPKBUILD_GROUP */
|
||||
{
|
||||
DPD_EC_SPKBUILD_GROUP, "DPD_EC_SPKBUILD_GROUP",
|
||||
sizeof(ECC_SPKBUILD_REQ), PkhaEccSpkbuildReq,
|
||||
offsetof(ECC_SPKBUILD_REQ, buildDataBytes),
|
||||
{
|
||||
{"a0Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a0DataBytes,a0DataBytes,a0Data,a0Data), Read, NULL},
|
||||
{"a1Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a1DataBytes,a1DataBytes,a1Data,a1Data), Read, NULL},
|
||||
{"a2Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a2DataBytes,a2DataBytes,a2Data,a2Data), Read, NULL},
|
||||
{"a3Data", STD_OFFSETS(ECC_SPKBUILD_REQ,a3DataBytes,a3DataBytes,a3Data,a3Data), Read, NULL},
|
||||
{"b0Data", STD_OFFSETS(ECC_SPKBUILD_REQ,b0DataBytes,b0DataBytes,b0Data,b0Data), Read, NULL},
|
||||
{"b1Data", STD_OFFSETS(ECC_SPKBUILD_REQ,b1DataBytes,b1DataBytes,b1Data,b1Data), Read, NULL},
|
||||
{"buildData", STD_OFFSETS(ECC_SPKBUILD_REQ,buildDataBytes,buildDataBytes,buildData,buildData), Write, NULL},
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_EC_PTADD_DBL_GROUP */
|
||||
{
|
||||
DPD_EC_PTADD_DBL_GROUP, "DPD_EC_PTADD_DBL_GROUP",
|
||||
sizeof(ECC_PTADD_DBL_REQ), PkhaEccPtaddDblReq,
|
||||
offsetof(ECC_PTADD_DBL_REQ, b3DataBytes),
|
||||
{
|
||||
{"modData", STD_OFFSETS(ECC_PTADD_DBL_REQ,modBytes,modBytes,modData,modData), Read, NULL},
|
||||
{"buildData", STD_OFFSETS(ECC_PTADD_DBL_REQ,buildDataBytes,buildDataBytes,buildData,buildData), Read, NULL},
|
||||
{"b2InData", STD_OFFSETS(ECC_PTADD_DBL_REQ,b2InDataBytes,b2InDataBytes,b2InData,b2InData), Read, NULL},
|
||||
{"b3InData", STD_OFFSETS(ECC_PTADD_DBL_REQ,b3InDataBytes,b3InDataBytes,b3InData,b3InData), Read, NULL},
|
||||
{"b1Data", STD_OFFSETS(ECC_PTADD_DBL_REQ,b1DataBytes,b1DataBytes,b1Data,b1Data), Write, NULL},
|
||||
{"b2Data", STD_OFFSETS(ECC_PTADD_DBL_REQ,b2DataBytes,b2DataBytes,b2Data,b2Data), Write, NULL},
|
||||
{"b3Data", STD_OFFSETS(ECC_PTADD_DBL_REQ,b3DataBytes,b3DataBytes,b3Data,b3Data), Write, NULL},
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_IPSEC_CBC_GROUP */
|
||||
{
|
||||
DPD_IPSEC_CBC_GROUP, "DPD_IPSEC_CBC_GROUP",
|
||||
sizeof(IPSEC_CBC_REQ), IpsecCbcReq,
|
||||
offsetof(IPSEC_CBC_REQ,inDataBytes),
|
||||
{
|
||||
{"hashKeyData",STD_OFFSETS(IPSEC_CBC_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"hashInData", STD_OFFSETS(IPSEC_CBC_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
|
||||
{"cryptKeyData",STD_OFFSETS(IPSEC_CBC_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkDesKeyLen},
|
||||
{"cryptCtxInData", STD_OFFSETS(IPSEC_CBC_REQ,cryptCtxInBytes,cryptCtxInBytes,cryptCtxInData,cryptCtxInData), Read, ChkDesCtxLen},
|
||||
{"inData", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
|
||||
{"cryptDataOut", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
|
||||
{"hashDataOut", STD_OFFSETS(IPSEC_CBC_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_IPSEC_ECB_GROUP */
|
||||
{
|
||||
DPD_IPSEC_ECB_GROUP, "DPD_IPSEC_ECB_GROUP",
|
||||
sizeof(IPSEC_ECB_REQ), IpsecEcbReq,
|
||||
offsetof(IPSEC_ECB_REQ,inDataBytes),
|
||||
{
|
||||
{"hashKeyData",STD_OFFSETS(IPSEC_ECB_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"hashInData", STD_OFFSETS(IPSEC_ECB_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
|
||||
{"cryptKeyData",STD_OFFSETS(IPSEC_ECB_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkDesKeyLen},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inData", STD_OFFSETS(IPSEC_ECB_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
|
||||
{"cryptDataOut", STD_OFFSETS(IPSEC_ECB_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
|
||||
{"hashDataOut", STD_OFFSETS(IPSEC_ECB_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_IPSEC_ESP_GROUP */
|
||||
{
|
||||
DPD_IPSEC_ESP_GROUP, "DPD_IPSEC_ESP_GROUP",
|
||||
sizeof(IPSEC_ESP_REQ), IpsecEspReq,
|
||||
offsetof(IPSEC_ESP_REQ,inDataBytes),
|
||||
{
|
||||
{"hashKeyData", STD_OFFSETS(IPSEC_ESP_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"hashInData", STD_OFFSETS(IPSEC_ESP_REQ,hashInDataBytes,hashInDataBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"cryptCtxInData", STD_OFFSETS(IPSEC_ESP_REQ,cryptCtxInBytes,cryptCtxInBytes,cryptCtxInData,cryptCtxInData), Read, ChkDesCtxLen},
|
||||
{"cryptKeyData",STD_OFFSETS(IPSEC_ESP_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkDesKeyLen},
|
||||
{"inData", STD_OFFSETS(IPSEC_ESP_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
|
||||
{"cryptDataOut", EXT_OFFSETS(IPSEC_ESP_REQ,inDataBytes,inDataBytes,cryptDataOut,hashDataOutBytes), Write, NULL},
|
||||
{"cryptCtxOutData", STD_OFFSETS(IPSEC_ESP_REQ,cryptCtxOutBytes,cryptCtxOutBytes,cryptCtxOutData,cryptCtxOutData), Write, ChkDesCtxLen}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_IPSEC_AES_CBC_GROUP */
|
||||
{
|
||||
DPD_IPSEC_AES_CBC_GROUP, "DPD_IPSEC_AES_CBC_GROUP",
|
||||
sizeof(IPSEC_AES_CBC_REQ), IpsecAesCbcReq,
|
||||
offsetof(IPSEC_AES_CBC_REQ,inDataBytes),
|
||||
{
|
||||
{"hashKeyData",STD_OFFSETS(IPSEC_CBC_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"hashInData", STD_OFFSETS(IPSEC_CBC_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
|
||||
{"cryptKeyData",STD_OFFSETS(IPSEC_CBC_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkAesKeyLen},
|
||||
{"cryptCtxInData", STD_OFFSETS(IPSEC_CBC_REQ,cryptCtxInBytes,cryptCtxInBytes,cryptCtxInData,cryptCtxInData), Read, ChkAesIvLen},
|
||||
{"inData", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
|
||||
{"cryptDataOut", STD_OFFSETS(IPSEC_CBC_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
|
||||
{"hashDataOut", STD_OFFSETS(IPSEC_CBC_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_IPSEC_AES_ECB_GROUP */
|
||||
{
|
||||
DPD_IPSEC_AES_ECB_GROUP, "DPD_IPSEC_AES_ECB_GROUP",
|
||||
sizeof(IPSEC_AES_ECB_REQ), IpsecAesEcbReq,
|
||||
offsetof(IPSEC_AES_ECB_REQ,inDataBytes),
|
||||
{
|
||||
{"hashKeyData",STD_OFFSETS(IPSEC_AES_ECB_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"hashInData", STD_OFFSETS(IPSEC_AES_ECB_REQ,hashInDataBytes,hashInDataBytes,hashInData,hashInData), Read, NULL},
|
||||
{"cryptKeyData",STD_OFFSETS(IPSEC_AES_ECB_REQ,cryptKeyBytes,cryptKeyBytes,cryptKeyData,cryptKeyData), Read, ChkAesKeyLen},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inData", STD_OFFSETS(IPSEC_AES_ECB_REQ,inDataBytes,inDataBytes,inData,inData), Read, ChkDesStaticDataLen},
|
||||
{"cryptDataOut",STD_OFFSETS(IPSEC_AES_ECB_REQ,inDataBytes,inDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
|
||||
{"hashDataOut", STD_OFFSETS(IPSEC_AES_ECB_REQ,hashDataOutBytes,hashDataOutBytes,hashDataOut,hashDataOut), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_AESA_CRYPT_GROUP */
|
||||
{
|
||||
DPD_AESA_CRYPT_GROUP, "DPD_AESA_CRYPT_GROUP",
|
||||
sizeof(AESA_CRYPT_REQ), AesaDesc,
|
||||
offsetof(AESA_CRYPT_REQ,inBytes),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"inIvData", STD_OFFSETS(AESA_CRYPT_REQ,inIvBytes,inIvBytes,inIvData,inIvData), Read, ChkAesIvLen},
|
||||
{"keyData", STD_OFFSETS(AESA_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkAesKeyLen},
|
||||
{"inData", STD_OFFSETS(AESA_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, 0},
|
||||
{"outData", STD_OFFSETS(AESA_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
|
||||
{"outCtxData", STD_OFFSETS(AESA_CRYPT_REQ,outCtxBytes,outCtxBytes,outCtxData,outCtxData), Write, NULL},
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_CCMP_GROUP */
|
||||
{
|
||||
DPD_CCMP_GROUP, "DPD_CCMP_GROUP",
|
||||
sizeof(CCMP_REQ), CcmpReq,
|
||||
offsetof(CCMP_REQ,MICData),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"context", STD_OFFSETS(CCMP_REQ,ctxBytes,ctxBytes,context,context), Read, NULL},
|
||||
{"keyData", STD_OFFSETS(CCMP_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkCcmpKeyLen},
|
||||
{"AADData", STD_OFFSETS(CCMP_REQ,AADBytes,AADBytes,AADData,AADData), Read, 0},
|
||||
{"FrameData", STD_OFFSETS(CCMP_REQ,FrameDataBytes,FrameDataBytes,FrameData,FrameData), Read, 0},
|
||||
{"cryptDataOut",STD_OFFSETS(CCMP_REQ,cryptDataBytes,cryptDataBytes,cryptDataOut,cryptDataOut), Write, NULL},
|
||||
{"MICData", STD_OFFSETS(CCMP_REQ,MICBytes,MICBytes,MICData,MICData), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_SRTP_GROUP */
|
||||
{
|
||||
DPD_SRTP_GROUP, "DPD_SRTP_GROUP",
|
||||
sizeof(SRTP_REQ), SrtpReq,
|
||||
offsetof(SRTP_REQ,outIvData),
|
||||
{
|
||||
{"hashKeyData", STD_OFFSETS(SRTP_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"ivData", STD_OFFSETS(SRTP_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
|
||||
{"keyData", STD_OFFSETS(SRTP_REQ,keyBytes,keyBytes,keyData,keyData), Read, ChkAesKeyLen},
|
||||
{"inData", EXT_OFFSETS(SRTP_REQ,inBytes,inBytes,inData,HeaderBytes), Read, 0},
|
||||
{"cryptDataOut",EXT_OFFSETS(SRTP_REQ,cryptDataBytes,cryptDataBytes,cryptDataOut,ROCBytes), Write, NULL},
|
||||
{"digestData", STD_OFFSETS(SRTP_REQ,digestBytes,digestBytes,digestData,digestData), Read, 0},
|
||||
{"outIvData", STD_OFFSETS(SRTP_REQ,outIvBytes,outIvBytes,outIvData,outIvData), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* DPD_KEA_CRYPT_GROUP */
|
||||
/* Descriptor layout
|
||||
* Pointer 1 = (none)
|
||||
* Pointer 2 = IV input
|
||||
* Pointer 3 = Cipher Key
|
||||
* Pointer 4 = Data Input
|
||||
* Pointer 5 = Data Output
|
||||
* Pointer 6 = IV output
|
||||
* Pointer 7 = (none)
|
||||
*/
|
||||
{
|
||||
DPD_KEA_CRYPT_GROUP, "DPD_KEA_CRYPT_GROUP",
|
||||
sizeof(KEA_CRYPT_REQ), KeaReq,
|
||||
offsetof(KEA_CRYPT_REQ, outData),
|
||||
{
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"ivData", STD_OFFSETS(KEA_CRYPT_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
|
||||
{"keyData", STD_OFFSETS(KEA_CRYPT_REQ,keyBytes,keyBytes,keyData,keyData), Read, NULL},
|
||||
{"inData", STD_OFFSETS(KEA_CRYPT_REQ,inBytes,inBytes,inData,inData), Read, NULL},
|
||||
{"outData", STD_OFFSETS(KEA_CRYPT_REQ,inBytes,inBytes,outData,outData), Write, NULL},
|
||||
{"ivData", STD_OFFSETS(KEA_CRYPT_REQ,ivBytes,ivBytes,ivData,ivData), Write, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* DPD_TLS_BLOCK_INBOUND_GROUP
|
||||
* pointer length extent
|
||||
* ----------------------------------------------------------------
|
||||
* p0 hashKeyData hashKeyBytes
|
||||
* p1 hashOnlyData hashOnlyBytes
|
||||
* p2 ivData ivBytes
|
||||
* p3 cipherKeyData cipherKeyBytes
|
||||
* p4 inData inBytes MACcmpBytes
|
||||
* p5 outData outBytes MACoutBytes
|
||||
* p6 ivOutData ivOutBytes
|
||||
* ----------------------------------------------------------------
|
||||
*/
|
||||
{
|
||||
DPD_TLS_BLOCK_INBOUND_GROUP, "DPD_TLS_BLOCK_INBOUND_GROUP",
|
||||
sizeof(TLS_BLOCK_INBOUND_REQ), TlsBlockInboundReq,
|
||||
offsetof(TLS_BLOCK_INBOUND_REQ, ivOutData),
|
||||
{
|
||||
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashOnlyBytes,hashOnlyBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
|
||||
{"ivData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
|
||||
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
|
||||
{"inData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,inBytes,inBytes,inData,MACcmpBytes), Read, NULL},
|
||||
{"outData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,outBytes,outBytes,outData,MACoutBytes), Write, NULL},
|
||||
{"ivOutData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* DPD_TLS_BLOCK_OUTBOUND_GROUP
|
||||
* pointer length extent
|
||||
* ----------------------------------------------------------------
|
||||
* p0 hashKeyData hashKeyBytes
|
||||
* p1 ivData ivBytes
|
||||
* p2 cipherKeyData cipherKeyBytes
|
||||
* p3 hashOnlyData mainDataBytes hashOnlyBytes
|
||||
* p4 outData outBytes MACbytes
|
||||
* p5 cipherOnlyData cipherOnlyBytes
|
||||
* p6 ivOutData ivOutBytes
|
||||
* ----------------------------------------------------------------
|
||||
*/
|
||||
{
|
||||
DPD_TLS_BLOCK_OUTBOUND_GROUP, "DPD_TLS_BLOCK_OUTBOUND_GROUP",
|
||||
sizeof(TLS_BLOCK_OUTBOUND_REQ), TlsBlockOutboundReq,
|
||||
offsetof(TLS_BLOCK_OUTBOUND_REQ, ivOutData),
|
||||
{
|
||||
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"ivData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
|
||||
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
|
||||
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,mainDataBytes,mainDataBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
|
||||
{"outData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,outBytes,outBytes,outData,MACbytes), Write, NULL},
|
||||
{"cipherOnlyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,cipherOnlyBytes,cipherOnlyBytes,cipherOnlyData,cipherOnlyData), Read, NULL},
|
||||
{"ivOutData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* DPD_TLS_STREAM_INBOUND_GROUP
|
||||
* pointer length extent
|
||||
* ----------------------------------------------------------------
|
||||
* p0 hashKeyData hashKeyBytes
|
||||
* p1 hashOnlyData hashOnlyBytes
|
||||
* p2 ivData ivBytes
|
||||
* p3 cipherKeyData cipherKeyBytes
|
||||
* p4 inData inBytes MACcmpBytes
|
||||
* p5 outData outBytes MACoutBytes
|
||||
* p6 ivOutData ivOutBytes
|
||||
* ----------------------------------------------------------------
|
||||
*/
|
||||
{
|
||||
DPD_TLS_STREAM_INBOUND_GROUP, "DPD_TLS_STREAM_INBOUND_GROUP",
|
||||
sizeof(TLS_STREAM_INBOUND_REQ), TlsStreamInboundReq,
|
||||
offsetof(TLS_STREAM_INBOUND_REQ, ivOutBytes),
|
||||
{
|
||||
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,hashOnlyBytes,hashOnlyBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
|
||||
{"ivData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
|
||||
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
|
||||
{"inData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,inBytes,inBytes,inData,MACcmpBytes), Read, NULL},
|
||||
{"outData", EXT_OFFSETS(TLS_BLOCK_INBOUND_REQ,outBytes,outBytes,outData,MACoutBytes), Write, NULL},
|
||||
{"ivOutData", STD_OFFSETS(TLS_BLOCK_INBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* DPD_TLS_STREAM_OUTBOUND_GROUP
|
||||
* pointer length extent
|
||||
* ----------------------------------------------------------------
|
||||
* p0 hashKeyData hashKeyBytes
|
||||
* p1 ivData ivBytes
|
||||
* p2 cipherKeyData cipherKeyBytes
|
||||
* p3 hashOnlyData mainDataBytes hashOnlyBytes
|
||||
* p4 outData outBytes MACbytes
|
||||
* p5
|
||||
* p6 ivOutData ivOutBytes
|
||||
* ----------------------------------------------------------------
|
||||
*/
|
||||
{
|
||||
DPD_TLS_STREAM_OUTBOUND_GROUP, "DPD_TLS_STREAM_OUTBOUND_GROUP",
|
||||
sizeof(TLS_STREAM_OUTBOUND_REQ), TlsStreamOutboundReq,
|
||||
offsetof(TLS_STREAM_OUTBOUND_REQ, ivOutBytes),
|
||||
{
|
||||
{"hashKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,hashKeyBytes,hashKeyBytes,hashKeyData,hashKeyData), Read, NULL},
|
||||
{"ivData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivBytes,ivBytes,ivData,ivData), Read, NULL},
|
||||
{"cipherKeyData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,cipherKeyBytes,cipherKeyBytes,cipherKeyData,cipherKeyData), Read, NULL},
|
||||
{"hashOnlyData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,mainDataBytes,mainDataBytes,hashOnlyData,hashOnlyBytes), Read, NULL},
|
||||
{"outData", EXT_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,outBytes,outBytes,outData,MACbytes), Write, NULL},
|
||||
{NIL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
{"ivOutData", STD_OFFSETS(TLS_BLOCK_OUTBOUND_REQ,ivOutBytes,ivOutBytes,ivOutData,ivOutData), Write, NULL}
|
||||
},
|
||||
},
|
||||
|
||||
|
||||
|
||||
/* Always terminates list, keep this line at the end when adding functions */
|
||||
{
|
||||
0, NULL,
|
||||
0, NULL,
|
||||
0,
|
||||
{
|
||||
{NULL, ALL_ZERO_OFFSETS, Read, NULL},
|
||||
},
|
||||
},
|
||||
|
||||
};
|
||||
@@ -0,0 +1,409 @@
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_init.c -- The Initialization code for SEC2 Driver
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* 1.1.0 Nov 16,2004 sec - incorporate linux changes from prior versions
|
||||
* 1.1.1 Dec 16,2004 sec - remove old unused diagnostics
|
||||
* 1.2 Jan 27,2005 sec - fix comments associated with global inhibit
|
||||
*/
|
||||
|
||||
#define SEC2_GLOBAL
|
||||
#define INIT_C
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
|
||||
/* Interpeak begin */
|
||||
#undef NUM_CHANNELS
|
||||
#define NUM_CHANNELS (num_channels)
|
||||
int num_channels;
|
||||
extern int ipfreescale_sec_num_channels(void);
|
||||
/* Interpeak end */
|
||||
|
||||
#if defined(DBG)
|
||||
/* unsigned long SEC2DebugLevel = (DBGTXT_SETRQ | DBGTXT_SVCRQ | DBGTXT_INITDEV | DBGTXT_DPDSHOW | DBGTXT_INFO); */
|
||||
unsigned long SEC2DebugLevel = (DBGTXT_INFO);
|
||||
#else
|
||||
unsigned long SEC2DebugLevel = 0x0;
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL
|
||||
EXPORT_SYMBOL(SEC2DebugLevel);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Function Name: SEC2DriverInit
|
||||
* Purpose:
|
||||
* Step1: Build base address by requesting peripheral base
|
||||
* Step2: Init ChannelRegister & Cha Register
|
||||
* Step3: Allocate Channel Assignments
|
||||
* Step4: Init ChannelAssignments & ChaAssignments
|
||||
* Step5: Init ProcessQueueTop & ProcessQueueBottom
|
||||
* Step6: Init Semaphores
|
||||
* Step7: Reset all Chas and Channels
|
||||
* Step8: Config all Channels
|
||||
* Step9: Connect Interrupt
|
||||
* Step10: Enable Interrupt
|
||||
* Step11: Return Success
|
||||
*
|
||||
* Input: None
|
||||
*
|
||||
* Return: SEC2_SUCCESS if everything passed, otherwise the error code
|
||||
*************************************************************************/
|
||||
/* static unsigned long CurrentCHAStatus[2]; */
|
||||
|
||||
int SEC2DriverInit(void)
|
||||
{
|
||||
static int status, i;
|
||||
static int cha;
|
||||
static int channel;
|
||||
static unsigned long address;
|
||||
static unsigned int idx[] = {0,2,4,3,5,1};
|
||||
static char *coreID;
|
||||
#ifdef __KERNEL__
|
||||
bd_t *binfo = (bd_t *) __res;
|
||||
#endif
|
||||
|
||||
/* Interpeak begin */
|
||||
num_channels = ipfreescale_sec_num_channels();
|
||||
/* Interpeak end */
|
||||
|
||||
|
||||
/* Check prior initialization, and initialize driver per OS convention */
|
||||
#ifdef VXWORKS
|
||||
if (taskIdVerify (taskNameToId ("tSEC2_pc")) == OK) {
|
||||
printf ("\nSecurity Processor already initialized\n");
|
||||
return (OK);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
/* Anything not done in the module init hook? */
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* sysGetPeripheralBase() gets the PQ3 CCSBAR from the OS */
|
||||
#ifdef VXWORKS
|
||||
IOBaseAddress = (sysGetPeripheralBase() + TALITOS2X_BASE_ADDRESS);
|
||||
#endif
|
||||
|
||||
/* get base from the kernel, and map it into an accessible region */
|
||||
#ifdef __KERNEL__
|
||||
IOBaseAddress = (unsigned long) ioremap((phys_addr_t)(binfo->bi_immr_base + TALITOS2X_BASE_ADDRESS), SEC2_BASE_SIZE);
|
||||
#endif
|
||||
|
||||
|
||||
/* Identify the running hardware */
|
||||
SEC2Dump(DBGTXT_INFO, ("SEC 2.x Security Processor Core\n"));
|
||||
SEC2Dump(DBGTXT_INFO, ("Driver Version %s %s %s\n", VERSION, __DATE__,__TIME__));
|
||||
|
||||
coremask = *((volatile unsigned long *)(IOBaseAddress + IDENTIFICATION_OFFSET) + 1);
|
||||
|
||||
switch(coremask)
|
||||
{
|
||||
case SEC_COREID_2_0_0:
|
||||
coreID = "2.0.0";
|
||||
break;
|
||||
|
||||
case SEC_COREID_2_1_0:
|
||||
coreID = "2.1.0";
|
||||
break;
|
||||
|
||||
default:
|
||||
coreID = "unknown";
|
||||
break;
|
||||
}
|
||||
|
||||
SEC2Dump(DBGTXT_INFO, ("Security Core Version Mask: %s (0x%08lx)\n\n", coreID, coremask));
|
||||
|
||||
|
||||
/* set up rebound cha index table */
|
||||
memcpy ((char *)cha_idx, (char *)idx, sizeof (idx));
|
||||
|
||||
/* set up SEC2 register addresses */
|
||||
/* controller registers */
|
||||
ChaAssignmentStatusRegister = (volatile unsigned long*)
|
||||
(IOBaseAddress + CHA_ASSIGNMENT_STATUS_OFFSET);
|
||||
InterruptControlRegister = (volatile unsigned long*)
|
||||
(IOBaseAddress + INTERRUPT_CONTROL_OFFSET);
|
||||
InterruptStatusRegister = (volatile unsigned long*)
|
||||
(IOBaseAddress + INTERRUPT_STATUS_OFFSET);
|
||||
InterruptClearRegister = (volatile unsigned long*)
|
||||
(IOBaseAddress + INTERRUPT_CLEAR_OFFSET);
|
||||
IdRegister = (volatile unsigned long*)
|
||||
(IOBaseAddress + IDENTIFICATION_OFFSET);
|
||||
MasterControlRegister = (volatile unsigned long *)
|
||||
(IOBaseAddress + SEC2_MASTER_CONTROL_REGISTER);
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->IOBaseAddress=0x%08lx\n", IOBaseAddress));
|
||||
|
||||
|
||||
|
||||
/* Reset the SEC2 */
|
||||
/* Note that we turn on global inhibit for all processors. At the time */
|
||||
/* of coding, GI only exists in the 8349; it's irrelevant to PQ3 devices. */
|
||||
/* So, it's just turned on for all processors, which is OK for now. */
|
||||
/* In time, this may be need to become an option in build configuration. */
|
||||
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->reset Master Control Register\n"));
|
||||
*(MasterControlRegister) = SEC2_RESET | SEC2_GLOBAL_INHIBIT;
|
||||
*(MasterControlRegister + 1) = 0;
|
||||
|
||||
|
||||
SEC2Dump(DBGTXT_INITDEV,
|
||||
("SEC2DriverInit->IdRegister=0x%08lx 0x%08lx\n",
|
||||
*(IdRegister),
|
||||
*(IdRegister + 1)));
|
||||
|
||||
|
||||
|
||||
/* channel registers */
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->channel registers\n"));
|
||||
for (channel=0, address=CHANNEL_CONFIG_BASE; channel<NUM_CHANNELS;
|
||||
channel++,address+=CHANNEL_DISTANCE)
|
||||
{
|
||||
ChannelConfigRegister[channel] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
for (channel=0,address=CHANNEL_POINTER_STATUS_BASE; channel<NUM_CHANNELS;
|
||||
channel++,address+=CHANNEL_DISTANCE)
|
||||
{
|
||||
ChannelPointerStatusRegister[channel] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
for (channel=0,address=CHANNEL_NEXT_DESCRIPTOR_BASE; channel<NUM_CHANNELS;
|
||||
channel++,address+=CHANNEL_DISTANCE)
|
||||
{
|
||||
ChannelNextDescriptorRegister[channel] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
for (channel=0,address=CHANNEL_DBR_BASE; channel<NUM_CHANNELS;
|
||||
channel++,address+=CHANNEL_DISTANCE)
|
||||
{
|
||||
ChannelDataBufferDescriptorRegister[channel] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
for (channel=0,address=CHANNEL_CDPR_BASE; channel<NUM_CHANNELS;
|
||||
channel++,address+=CHANNEL_DISTANCE)
|
||||
{
|
||||
ChannelCurrentDescriptorPointerRegister[channel] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
|
||||
/* cha registers */
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->cha registers\n"));
|
||||
for (cha=0,address=CHA_RESET_CONTROL_BASE; cha<NUM_CHAS;
|
||||
cha++,address+=CHA_DISTANCE)
|
||||
{
|
||||
ChaResetControlRegister[cha] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
for (cha=0,address=CHA_INTERRUPT_STATUS_BASE; cha<NUM_CHAS;
|
||||
cha++,address+=CHA_DISTANCE)
|
||||
{
|
||||
ChaInterruptStatusRegister[cha_idx[cha]] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
for (cha=0,address=CHA_INTERRUPT_CONTROL_BASE; cha<NUM_CHAS;
|
||||
cha++,address+=CHA_DISTANCE)
|
||||
{
|
||||
ChaInterruptControlRegister[cha] =
|
||||
(volatile unsigned long*)(IOBaseAddress + address);
|
||||
}
|
||||
|
||||
/* allocate other driver variables */
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->allocating other driver variables\n"));
|
||||
|
||||
/* variable init */
|
||||
FreeChannels = NUM_CHANNELS;
|
||||
FreeRngas = NUM_RNGAS;
|
||||
FreeAfhas = NUM_AFHAS;
|
||||
FreeDesas = NUM_DESAS;
|
||||
FreeMdhas = NUM_MDHAS;
|
||||
FreePkhas = NUM_PKHAS;
|
||||
FreeAesas = NUM_AESAS;
|
||||
|
||||
/* Init ChannelAssignments */
|
||||
for (channel=0; channel<NUM_CHANNELS; channel++)
|
||||
{
|
||||
if ((status = InitChannelAssignment(channel)) != SEC2_SUCCESS)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
}
|
||||
|
||||
/* Init ChaAssignments */
|
||||
for (cha=0; cha<16; cha++)
|
||||
{
|
||||
ChaAssignments[cha] = CHA_DYNAMIC;
|
||||
}
|
||||
|
||||
/* initialize process queue */
|
||||
for (i=0; i<QUEUE_ENTRY_DEPTH-1;i++)
|
||||
Queue[i].next = &Queue[i+1];
|
||||
Queue[QUEUE_ENTRY_DEPTH-1].next = &Queue[0];
|
||||
for (i=1; i<QUEUE_ENTRY_DEPTH;i++)
|
||||
Queue[i].previous = &Queue[i-1];
|
||||
Queue[0].previous = &Queue[QUEUE_ENTRY_DEPTH-1];
|
||||
|
||||
ProcessQueueTop = &Queue[0];
|
||||
ProcessQueueBottom = &Queue[0];
|
||||
|
||||
IOInitSemaphores();
|
||||
|
||||
#ifdef VXWORKS
|
||||
if ((status = IOInitQs()) != SEC2_SUCCESS)
|
||||
return status;
|
||||
|
||||
if ((status = IORegisterDriver()) != SEC2_SUCCESS)
|
||||
return status;
|
||||
#endif
|
||||
|
||||
/* reset all the CHA's */
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->reset Reset Control Register %d\n", NUM_CHAS));
|
||||
for (cha=0; cha<NUM_CHAS; cha++)
|
||||
{
|
||||
|
||||
*(ChaResetControlRegister[cha]) = 0;
|
||||
*(ChaResetControlRegister[cha] + 1) = CHA_SOFTWARE_RESET;
|
||||
|
||||
if (cha == CHA_DES) /* is this cha des? */
|
||||
{
|
||||
*(ChaInterruptControlRegister[cha]) = 0;
|
||||
*(ChaInterruptControlRegister[cha] + 1) = CHA_DESA_KEY_PARITY_ERROR_DISABLE;
|
||||
}
|
||||
|
||||
if (cha == CHA_PKHA) /* is this cha the pkha? */
|
||||
{
|
||||
*(ChaInterruptControlRegister[cha]) = 0;
|
||||
*(ChaInterruptControlRegister[cha] + 1) = CHA_PKHA_ILLEGAL_ADDR_ERROR_DISABLE;
|
||||
}
|
||||
}
|
||||
|
||||
/* reset all the channels */
|
||||
SEC2Dump(DBGTXT_INITDEV,
|
||||
("SEC2DriverInit->reset Crypto-Channel Configuration Registers %d\n",
|
||||
NUM_CHANNELS));
|
||||
for (channel=0; channel<NUM_CHANNELS; channel++)
|
||||
{
|
||||
/* reset the channel & configure the channels */
|
||||
*(ChannelConfigRegister[channel]) = CHANNEL_RESET;
|
||||
*(ChannelConfigRegister[channel] + 1) = 0;
|
||||
|
||||
*(ChannelConfigRegister[channel]) = 0;
|
||||
*(ChannelConfigRegister[channel] + 1) = CHANNEL_INTEN | CHANNEL_BURST128;
|
||||
}
|
||||
|
||||
/* Enable the main interrupt from SEC core at the controller/OS level */
|
||||
if ((status = IOConnectInterrupt()) != SEC2_SUCCESS)
|
||||
return status;
|
||||
|
||||
/* enable interrupts at the core level -- channels done and all errors */
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->enable interrupts\n"));
|
||||
|
||||
|
||||
|
||||
/* Unmask all "done" bits from all channels and accelerators */
|
||||
*(InterruptControlRegister) = ALL_CHANNEL_INT_DONE_MASK | ALL_CHANNEL_INT_ERROR_MASK;
|
||||
*(InterruptControlRegister + 1) = ALL_CHA_INT_ERROR_MASK;
|
||||
|
||||
SEC2Dump(DBGTXT_INITDEV, ("SEC2DriverInit->return SEC2_SUCCESS!\n"));
|
||||
|
||||
return SEC2_SUCCESS;
|
||||
} /* end of DriverEntry */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
IO_STATUS InitChannelAssignment(int channel)
|
||||
{
|
||||
size_t count;
|
||||
|
||||
SEC2Dump(DBGTXT_INITDEV, ("InitChannelAssignment channel=%d\n", channel+1));
|
||||
|
||||
ChannelAssignments[channel].assignment = CHANNEL_FREE;
|
||||
ChannelAssignments[channel].ownerTaskId = 0;
|
||||
ChannelAssignments[channel].pReq = NULL;
|
||||
ChannelAssignments[channel].pCurrReq = NULL;
|
||||
ChannelAssignments[channel].Dpds = &dpd[channel][0];
|
||||
|
||||
for (count=0; count<MAX_DPDS; count++)
|
||||
{
|
||||
ChannelAssignments[channel].Dpds[count] = &Descriptors[channel][count];
|
||||
if (ChannelAssignments[channel].Dpds[count] == NULL)
|
||||
return SEC2_IO_MEMORY_ALLOCATE_ERROR;
|
||||
}
|
||||
|
||||
SEC2Dump(DBGTXT_INITDEV, ("InitChannelAssignment channel=%d done\n", channel+1));
|
||||
|
||||
return (SEC2_SUCCESS);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Module initialization stuff for Linux */
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/* fopts struct from device registration */
|
||||
SEC2_GLOBAL struct file_operations sec2_fopts = {
|
||||
open: SEC2Open,
|
||||
release: SEC2Close,
|
||||
ioctl: SEC2_ioctl,
|
||||
};
|
||||
|
||||
static int __init sec2_init(void)
|
||||
{
|
||||
int rtstat;
|
||||
|
||||
/* Assume that this is going to be a chrdev */
|
||||
/* If a major number isn't specified, default to dynamic assignment */
|
||||
rtstat = register_chrdev(SEC2_DEVMAJOR, SEC2_DEVNAME, &sec2_fopts);
|
||||
if (rtstat < 0) {
|
||||
printk(KERN_WARNING "sec2drv: can't register driver, fatal\n");
|
||||
return rtstat;
|
||||
}
|
||||
|
||||
if (SEC2_DEVMAJOR == 0) /* if no specific major requested, and there was no error above */
|
||||
sec2_devmajor = rtstat; /* set the dynamic number */
|
||||
|
||||
/* Now go call the standard driver initialization */
|
||||
return SEC2DriverInit();
|
||||
}
|
||||
|
||||
|
||||
static void __exit sec2_exit(void)
|
||||
{
|
||||
int rtstat;
|
||||
|
||||
rtstat = unregister_chrdev(sec2_devmajor, SEC2_DEVNAME);
|
||||
free_irq(MPC85xx_IRQ_SEC, NULL);
|
||||
}
|
||||
|
||||
|
||||
EXPORT_SYMBOL (SEC2_ioctl);
|
||||
EXPORT_SYMBOL (MarkScatterBuffer);
|
||||
/* EXPORT_SYMTAB */
|
||||
|
||||
module_init(sec2_init);
|
||||
module_exit(sec2_exit);
|
||||
|
||||
MODULE_LICENSE("Freescale Restricted");
|
||||
MODULE_DESCRIPTION("SEC 2.x Security Core Device Driver");
|
||||
MODULE_AUTHOR("Freescale Semiconductor, Inc.");
|
||||
#endif
|
||||
@@ -0,0 +1,188 @@
|
||||
|
||||
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_io.c -- bus operations for SEC2 Driver
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003, 2004 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs adapted from the final version of mpc18x
|
||||
* May 12,2004 sec - switched core interrupt for 8555 configuration
|
||||
* 1.1.0 Dec 05,2004 sec - merge in linux support from prior versions
|
||||
* 1.1.1 Dec 16,2004 sec - remove lock variable, remove old diagnostics
|
||||
* 1.2 Jan 27,2005
|
||||
*/
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
extern void InterruptServiceRoutine(int irq, void *dev_id, struct pt_regs *pt_regs);
|
||||
#endif
|
||||
|
||||
#ifdef VXWORKS
|
||||
|
||||
#include "intLib.h"
|
||||
|
||||
|
||||
IO_STATUS IOInitQs()
|
||||
{
|
||||
/* set up ISR/ProcessingComplete message queue */
|
||||
IsrMsgQId = msgQCreate(MAX_MESSAGES, sizeof(DEVICE_REGS), MSG_Q_FIFO);
|
||||
if (IsrMsgQId == NULL)
|
||||
return SEC2_VXWORKS_CANNOT_CREATE_QUEUE;
|
||||
|
||||
return SEC2_SUCCESS;
|
||||
}
|
||||
|
||||
IO_STATUS IORegisterDriver()
|
||||
{
|
||||
/* start ProcessComplete task, with high priority */
|
||||
if (taskSpawn ("tSEC2_pc",
|
||||
PROCESSING_COMPLETE_PRIORITY,
|
||||
0,
|
||||
PROCESSING_COMPLETE_STACKSIZE,
|
||||
(FUNCPTR)ProcessingComplete,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0) == TASK_ID_ERROR)
|
||||
return (SEC2_UNKNOWN_ERROR);
|
||||
|
||||
/* add the driver to the driver table */
|
||||
driverNum = iosDrvInstall(SEC2Open, NULL, SEC2Open, SEC2Close, NULL, NULL, SEC2_ioctl);
|
||||
if (driverNum < 0)
|
||||
return (SEC2_IO_VXWORKS_DRIVER_TABLE_ADD_ERROR);
|
||||
|
||||
(void) iosDevAdd(&vxworksDrvDev, vxworksDrvName, driverNum);
|
||||
|
||||
return (SEC2_SUCCESS);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
void IOInitSemaphores()
|
||||
{
|
||||
/* initialize semaphores */
|
||||
#ifdef VXWORKS
|
||||
ChannelAssignSemId = semMCreate(SEM_Q_PRIORITY | SEM_INVERSION_SAFE | SEM_DELETE_SAFE);
|
||||
QueueSemId = semMCreate(SEM_Q_PRIORITY | SEM_INVERSION_SAFE | SEM_DELETE_SAFE);
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
spin_lock_init(&ChannelAssignLock);
|
||||
spin_lock_init(&QueueLock);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* IOConnectInterrupt()
|
||||
*/
|
||||
|
||||
#ifdef VXWORKS
|
||||
/* the Interrupt connect should be moved to sysLib.c since it is board dependent */
|
||||
IO_STATUS IOConnectInterrupt()
|
||||
{
|
||||
/* Interpeak begin */
|
||||
int inum_sec2;
|
||||
extern int ipfreescale_sec_inum(void);
|
||||
|
||||
inum_sec2 = ipfreescale_sec_inum();
|
||||
/* Install our IRQ handler */
|
||||
if (intConnect(INUM_TO_IVEC(inum_sec2),
|
||||
(VOIDFUNCPTR)InterruptServiceRoutine,
|
||||
(int)NULL) == ERROR)
|
||||
return(ERROR);
|
||||
|
||||
/* Enable the handler at the controller level */
|
||||
intEnable(inum_sec2);
|
||||
/* Interpeak end */
|
||||
|
||||
|
||||
SEC2Dump(DBGTXT_INITDEV, ("IOConnectInterrupt ISR connected\n"));
|
||||
return(SEC2_SUCCESS);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
IO_STATUS IOConnectInterrupt()
|
||||
{
|
||||
if ((request_irq(MPC85xx_IRQ_SEC, InterruptServiceRoutine, 0, "mpc-sec", NULL)) != 0)
|
||||
return -1;
|
||||
|
||||
return (SEC2_SUCCESS);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/sched.h>
|
||||
#include <asm/atomic.h>
|
||||
#include <asm/semaphore.h>
|
||||
|
||||
unsigned long irq_flag; /* here for spin locks to use */
|
||||
|
||||
static inline int __sem_update_count(struct semaphore *sem, int incr)
|
||||
{
|
||||
int old_count, tmp;
|
||||
|
||||
__asm__ __volatile__("\n"
|
||||
"1: lwarx %0,0,%3\n"
|
||||
" srawi %0,%0,31\n"
|
||||
" andc %1,%0,%1\n"
|
||||
" add %1,%1,%4\n"
|
||||
PPC405_ERR77(0,%3)
|
||||
" stwcx. %1,0,%3\n"
|
||||
" bne 1b"
|
||||
: "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
|
||||
: "r" (&sem->count), "r" (incr), "m" (sem->count)
|
||||
: "cc");
|
||||
|
||||
return old_count;
|
||||
}
|
||||
|
||||
long __down_interruptible_timeout(struct semaphore *sem, long timeout)
|
||||
{
|
||||
int retval = 0;
|
||||
struct task_struct *tsk = current;
|
||||
DECLARE_WAITQUEUE(wait, tsk);
|
||||
|
||||
tsk->state = TASK_INTERRUPTIBLE;
|
||||
add_wait_queue_exclusive(&sem->wait, &wait);
|
||||
smp_wmb();
|
||||
|
||||
while (__sem_update_count(sem, -1) <= 0) {
|
||||
if (signal_pending(current)) {
|
||||
__sem_update_count(sem, 0);
|
||||
retval = -EINTR;
|
||||
break;
|
||||
}
|
||||
timeout = schedule_timeout(timeout);
|
||||
tsk->state = TASK_INTERRUPTIBLE;
|
||||
}
|
||||
tsk->state = TASK_RUNNING;
|
||||
remove_wait_queue(&sem->wait, &wait);
|
||||
wake_up(&sem->wait);
|
||||
return timeout >= 0 ? 0 : -1;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,248 @@
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_ioctl.c - Driver service hooks for the SEC2.x security core
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* 1.1.0 Nov 22,2003 sec - merge in changes from Linux fork
|
||||
* 1.1.1 Dev 15,2004 sec - remove old diagnostics
|
||||
* 1.2 Jan 27,2005 sec - fix minor compiler warnings
|
||||
*/
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
|
||||
/* Interpeak begin */
|
||||
#undef NUM_CHANNELS
|
||||
#define NUM_CHANNELS (num_channels)
|
||||
extern int num_channels;
|
||||
/* Interpeak end */
|
||||
|
||||
/* Interpeak begin */
|
||||
#ifdef __KERNEL__
|
||||
Ctx_queue_header ctx_done_queue = { NULL, NULL };
|
||||
Ctx_queue_header ctx_error_queue = { NULL, NULL };
|
||||
|
||||
static inline Ctx_queue_element *ctx_element_dequeue(Ctx_queue_header *hdr, int pid)
|
||||
{
|
||||
register Ctx_queue_element *element;
|
||||
register Ctx_queue_element *prev = NULL;
|
||||
|
||||
for(element = hdr->head; element != NULL; element = element->next)
|
||||
{
|
||||
if (element->pid == pid)
|
||||
{
|
||||
if (prev == NULL)
|
||||
{
|
||||
/* Matched the first element */
|
||||
hdr->head = element->next;
|
||||
if (!hdr->head)
|
||||
{
|
||||
/* Queue is now empty */
|
||||
hdr->tail = NULL;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
prev->next = element->next;
|
||||
if (prev->next == NULL)
|
||||
{
|
||||
/* Matched the last element */
|
||||
hdr->tail = prev;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
prev = element;
|
||||
}
|
||||
return element;
|
||||
}
|
||||
#endif
|
||||
/* Interpeak end */
|
||||
|
||||
#ifdef __KERNEL__
|
||||
int SEC2Open(struct inode *nd, struct file *fil)
|
||||
{
|
||||
SEC2Dump(DBGTXT_SETRQ, ("SEC2Open() called, inode 0x%08x, file 0x%08x\n", (unsigned int)nd, (unsigned int)fil));
|
||||
|
||||
MOD_INC_USE_COUNT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef VXWORKS
|
||||
int SEC2Open(DEV_HDR *pDevHdr, int mode, int flags)
|
||||
{
|
||||
|
||||
return((int)pDevHdr);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
int SEC2Close(struct inode *nd, struct file *fil)
|
||||
#else
|
||||
int SEC2Close(int devDesc)
|
||||
#endif
|
||||
{
|
||||
int channel;
|
||||
QUEUE_ENTRY *QueueEntry;
|
||||
int callingTaskId = (int)taskIdSelf();
|
||||
|
||||
SEC2Dump(DBGTXT_SETRQ, ("SEC2Close() called\n"));
|
||||
|
||||
QueueEntry = ProcessQueueTop;
|
||||
while (QueueEntry->pReq != NULL)
|
||||
{
|
||||
if (QueueEntry->requestingTaskId == callingTaskId)
|
||||
{
|
||||
((GENERIC_REQ*)QueueEntry->pReq)->status = SEC2_CANCELLED_REQUEST;
|
||||
QueueEntry->pReq = NULL;
|
||||
}
|
||||
QueueEntry = QueueEntry->next;
|
||||
}
|
||||
|
||||
|
||||
IOLockChannelAssignment();
|
||||
|
||||
/* release any leftover reserved channels associated with this descriptor */
|
||||
for (channel=0; channel<NUM_CHANNELS; channel++)
|
||||
if (ChannelAssignments[channel].ownerTaskId == callingTaskId)
|
||||
/* release this channel */
|
||||
ReleaseChannel(channel+1, callingTaskId, TRUE);
|
||||
|
||||
IOUnLockChannelAssignment();
|
||||
ScheduleNext();
|
||||
|
||||
#ifdef __KERNEL__
|
||||
MOD_DEC_USE_COUNT;
|
||||
#endif
|
||||
|
||||
return SEC2_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
int SEC2_ioctl(struct inode *nd,
|
||||
struct file *fil,
|
||||
unsigned int ioctlCode,
|
||||
unsigned long param)
|
||||
#else
|
||||
int SEC2_ioctl(int devDesc, register int ioctlCode, register void *param)
|
||||
#endif
|
||||
{
|
||||
int status;
|
||||
|
||||
#ifdef __KERNEL__
|
||||
MALLOC_REQ *mem;
|
||||
/* Interpeak begin */
|
||||
Ctx_queue_element *item;
|
||||
/* Interpeak end */
|
||||
#endif
|
||||
status = SEC2_SUCCESS;
|
||||
|
||||
switch (ioctlCode)
|
||||
{
|
||||
case IOCTL_PROC_REQ:
|
||||
if (param == (int)NULL)
|
||||
{
|
||||
status = SEC2_INVALID_ADDRESS;
|
||||
break;
|
||||
}
|
||||
status = ProcessRequest((GENERIC_REQ *)param, (int)taskIdSelf());
|
||||
break;
|
||||
|
||||
case IOCTL_GET_STATUS:
|
||||
GetStatus((STATUS_REQ *)param, (int)taskIdSelf());
|
||||
break;
|
||||
|
||||
#ifdef __KERNEL__
|
||||
case IOCTL_MALLOC:
|
||||
if ((((MALLOC_REQ *)param)->ptr = malloc(((MALLOC_REQ *)param)->sz)) == 0) {
|
||||
status = SEC2_MALLOC_FAILED;
|
||||
break;
|
||||
}
|
||||
memset(((MALLOC_REQ *)param)->ptr, 0, ((MALLOC_REQ *)param)->sz);
|
||||
status = SEC2_SUCCESS;
|
||||
break;
|
||||
|
||||
case IOCTL_COPYFROM:
|
||||
mem = (MALLOC_REQ *)param;
|
||||
mem->pid = current->pid;
|
||||
copy_from_user(mem->to, mem->from, mem->sz);
|
||||
status = SEC2_SUCCESS;
|
||||
break;
|
||||
|
||||
case IOCTL_COPYTO:
|
||||
mem = (MALLOC_REQ *)param;
|
||||
mem->pid = current->pid;
|
||||
copy_to_user(mem->to, mem->from, mem->sz);
|
||||
status = SEC2_SUCCESS;
|
||||
break;
|
||||
|
||||
case IOCTL_FREE:
|
||||
free((void *)param);
|
||||
break;
|
||||
#endif
|
||||
|
||||
/* Interpeak begin */
|
||||
#ifdef __KERNEL__
|
||||
case IOCTL_GET_DONE:
|
||||
IOLockChannelAssignment();
|
||||
|
||||
item = ctx_element_dequeue(&ctx_done_queue, (int)taskIdSelf());
|
||||
if(item)
|
||||
{
|
||||
status = put_user(item->ctx, (void **)param);
|
||||
kfree(item);
|
||||
}
|
||||
else
|
||||
{
|
||||
status = put_user(0, (void **)param);
|
||||
}
|
||||
|
||||
IOUnLockChannelAssignment();
|
||||
break;
|
||||
|
||||
case IOCTL_GET_ERROR:
|
||||
IOLockChannelAssignment();
|
||||
|
||||
item = ctx_element_dequeue(&ctx_error_queue, (int)taskIdSelf());
|
||||
if(item)
|
||||
{
|
||||
status = put_user(item->ctx, (void **)param);
|
||||
kfree(item);
|
||||
}
|
||||
else
|
||||
{
|
||||
status = put_user(0, (void **)param);
|
||||
}
|
||||
|
||||
IOUnLockChannelAssignment();
|
||||
break;
|
||||
#endif
|
||||
/* Interpeak end */
|
||||
|
||||
default:
|
||||
/* invalide IOCTL code, return an error */
|
||||
/* need OS-specific error value here */
|
||||
return (S_ioLib_UNKNOWN_REQUEST);
|
||||
} /* end switch (ioctlCode) */
|
||||
|
||||
return (status);
|
||||
}
|
||||
@@ -0,0 +1,721 @@
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_request.c - request/response handler
|
||||
****************************************************************************
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* Jun 04,2004 sec - add completion cleanup for scatter pointers
|
||||
* 1.1.0 Nov 16,2004 sec - integrate linux changes from prior versions, eliminate
|
||||
* StartDescriptor() function
|
||||
* 1.1.1 Dec 16,2004 sec - remove lock variable, remove old diagnostics, add
|
||||
* minor optimizations
|
||||
* 1.2 Jan 27,2005 sec - add CHA details to error dump
|
||||
*/
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
|
||||
/* Interpeak begin */
|
||||
#define MAX_NUM_CHANNELS 4
|
||||
#undef NUM_CHANNELS
|
||||
#define NUM_CHANNELS (num_channels)
|
||||
extern int num_channels;
|
||||
/* Interpeak end */
|
||||
|
||||
/* Interpeak begin */
|
||||
#ifdef __KERNEL__
|
||||
static inline void ctx_element_enqueue(Ctx_queue_header *hdr, Ctx_queue_element *item)
|
||||
{
|
||||
item->next = NULL;
|
||||
if (hdr->head)
|
||||
{
|
||||
/* Place item in the end of the queue */
|
||||
hdr->tail->next = item;
|
||||
hdr->tail = item;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Queue is empty */
|
||||
hdr->head = item;
|
||||
hdr->tail = item;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
/* Interpeak end */
|
||||
|
||||
|
||||
/********************************************************************************/
|
||||
/* Function Name: ProcessRequest */
|
||||
/* Purpose: To handle the IO request routine */
|
||||
/* Input: req - the pointer of the IO request */
|
||||
/* callingTaskId - the task Id */
|
||||
/* Output: req - the pointer of the IO request buffer */
|
||||
/* Return: SEC2_Success if success, otherwise error code */
|
||||
/********************************************************************************/
|
||||
|
||||
int ProcessRequest(GENERIC_REQ *req, int callingTaskId)
|
||||
{
|
||||
register int freeChannel;
|
||||
int status;
|
||||
QUEUE_ENTRY *newEntry;
|
||||
BOOLEAN bAvailableCHA;
|
||||
|
||||
/* Interpeak begin */
|
||||
/* schedule queued requests on any freed channels */
|
||||
ScheduleNext();
|
||||
/* Interpeak end */
|
||||
|
||||
/* check to see if the required CHA is available */
|
||||
bAvailableCHA = FALSE;
|
||||
if (CheckChas(req->opId) == SEC2_SUCCESS)
|
||||
bAvailableCHA = TRUE;
|
||||
|
||||
IOLockChannelAssignment();
|
||||
|
||||
if (bAvailableCHA && FreeChannels > 0)
|
||||
{
|
||||
/* dynamic request, see if there are any free channels */
|
||||
for (freeChannel=0;freeChannel<NUM_CHANNELS;freeChannel++)
|
||||
{
|
||||
|
||||
if (ChannelAssignments[freeChannel].assignment == CHANNEL_FREE)
|
||||
{
|
||||
SEC2Dump(DBGTXT_SETRQ, ("ProcessRequest(): free channel = %d\n", freeChannel));
|
||||
/* reserve this free channel for this operation */
|
||||
ChannelAssignments[freeChannel].assignment = CHANNEL_DYNAMIC;
|
||||
ChannelAssignments[freeChannel].ownerTaskId = callingTaskId;
|
||||
ChannelAssignments[freeChannel].pReq = req;
|
||||
FreeChannels--;
|
||||
|
||||
IOUnLockChannelAssignment();
|
||||
|
||||
/* translate this request into DPD's */
|
||||
status = RequestToDpd(req, freeChannel);
|
||||
if (status != SEC2_SUCCESS)
|
||||
return CompleteRequest(freeChannel, status, FALSE, NULL);
|
||||
|
||||
/* write the address of the first DPD to the channel */
|
||||
/* this starts the request */
|
||||
*(ChannelNextDescriptorRegister[freeChannel]+1) = __vpa((unsigned long)(ChannelAssignments[freeChannel].Dpds[0]));
|
||||
|
||||
#ifdef __KERNEL__
|
||||
/* Interpeak begin */
|
||||
if(!in_interrupt())
|
||||
/* Interpeak end */
|
||||
schedule();
|
||||
#endif
|
||||
return SEC2_SUCCESS;
|
||||
}
|
||||
}
|
||||
/* Interpeak begin */
|
||||
goto queue;
|
||||
/* Interpeak end */
|
||||
} else {
|
||||
/* Interpeak begin */
|
||||
queue:
|
||||
/* Interpeak end */
|
||||
IOUnLockChannelAssignment();
|
||||
|
||||
if (QueueEntryDepth >= QUEUE_ENTRY_DEPTH)
|
||||
return (SEC2_INSUFFICIENT_REQS);
|
||||
|
||||
#ifndef __KERNEL__
|
||||
semTake (QueueSemId, 100);
|
||||
#endif
|
||||
newEntry = ProcessQueueBottom;
|
||||
ProcessQueueBottom = ProcessQueueBottom->next;
|
||||
/* fill in the queue structure */
|
||||
newEntry->pReq = req;
|
||||
newEntry->requestingTaskId = callingTaskId;
|
||||
QueueEntryDepth++;
|
||||
#ifndef __KERNEL__
|
||||
semGive (QueueSemId);
|
||||
#endif
|
||||
SEC2Dump(DBGTXT_SETRQ, ("Queueing Up->newEntry=0x%lx\n", (unsigned long)newEntry));
|
||||
}
|
||||
|
||||
return SEC2_SUCCESS;
|
||||
} /* end of ProcessDynamicRequest() */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
void ProcessingComplete(unsigned long not_used)
|
||||
#else
|
||||
void ProcessingComplete(void)
|
||||
#endif
|
||||
{
|
||||
register int channel;
|
||||
register int cha;
|
||||
/* Interpeak begin */
|
||||
int status[MAX_NUM_CHANNELS]; /* The status for the channel */
|
||||
BOOLEAN bIsComplete[MAX_NUM_CHANNELS]; /* Indicates that the channel is done */
|
||||
/* Interpeak end */
|
||||
DEVICE_REGS *pRegs; /* register? */
|
||||
static DEVICE_REGS regs;
|
||||
#ifdef DBG
|
||||
int i;
|
||||
#endif
|
||||
|
||||
pRegs = ®s;
|
||||
|
||||
/* we sit here forever, waiting for register content messages from the ISR */
|
||||
while (1)
|
||||
{
|
||||
#ifdef VXWORKS
|
||||
/* wait for register content message from the ISR */
|
||||
if (msgQReceive(IsrMsgQId,
|
||||
(char*)pRegs,
|
||||
sizeof(DEVICE_REGS),
|
||||
WAIT_FOREVER) != sizeof(DEVICE_REGS))
|
||||
continue;
|
||||
#else
|
||||
QmsgWait();
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef DBG
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("ProcessingComplete(): IntStatus - "));
|
||||
if ((pRegs->IntStatus[0] & ALL_CHANNEL_INT_ERROR_MASK) ||
|
||||
(pRegs->IntStatus[1] & ALL_CHA_INT_ERROR_MASK))
|
||||
{
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("Error "));
|
||||
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_1) SEC2Dump(DBGTXT_SVCRQ, ("ch1 "));
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_2) SEC2Dump(DBGTXT_SVCRQ, ("ch2 "));
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_3) SEC2Dump(DBGTXT_SVCRQ, ("ch3 "));
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_ERROR_4) SEC2Dump(DBGTXT_SVCRQ, ("ch4 "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_ERROR_DEU) SEC2Dump(DBGTXT_SVCRQ, ("DES "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_ERROR_AESU) SEC2Dump(DBGTXT_SVCRQ, ("AES "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_ERROR_MDEU) SEC2Dump(DBGTXT_SVCRQ, ("MD "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_ERROR_AFEU) SEC2Dump(DBGTXT_SVCRQ, ("AF "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_ERROR_RNG) SEC2Dump(DBGTXT_SVCRQ, ("RNG "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_ERROR_PKEU) SEC2Dump(DBGTXT_SVCRQ, ("PK "));
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("\n"));
|
||||
|
||||
for (i = 0; i < NUM_CHANNELS; i++)
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("Ch %d ptr status: 0x%08lx%08lx\n",
|
||||
i + 1,
|
||||
pRegs->ChannelError[i][0],
|
||||
pRegs->ChannelError[i][1]));
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("DES int status: 0x%08lx\n", pRegs->ChaError[cha_idx[0]][1]));
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("AES int status: 0x%08lx\n", pRegs->ChaError[cha_idx[1]][1]));
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("MDEU int status: 0x%08lx\n", pRegs->ChaError[cha_idx[2]][1]));
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("AFEU int status: 0x%08lx\n", pRegs->ChaError[cha_idx[3]][1]));
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("RNG int status: 0x%08lx\n", pRegs->ChaError[cha_idx[4]][1]));
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("PKEU int status: 0x%08lx\n", pRegs->ChaError[cha_idx[5]][1]));
|
||||
}
|
||||
else
|
||||
if ((pRegs->IntStatus[0] & ALL_CHANNEL_INT_DONE_MASK) ||
|
||||
(pRegs->IntStatus[1] & ALL_CHA_INT_DONE_MASK))
|
||||
{
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("Done "));
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_1) SEC2Dump(DBGTXT_SVCRQ, ("ch1 "));
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_2) SEC2Dump(DBGTXT_SVCRQ, ("ch2 "));
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_3) SEC2Dump(DBGTXT_SVCRQ, ("ch3 "));
|
||||
if (pRegs->IntStatus[0] & CHANNEL_INT_DONE_4) SEC2Dump(DBGTXT_SVCRQ, ("ch4 "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_DONE_DEU) SEC2Dump(DBGTXT_SVCRQ, ("DES "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_DONE_AESU) SEC2Dump(DBGTXT_SVCRQ, ("AES "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_DONE_MDEU) SEC2Dump(DBGTXT_SVCRQ, ("MD "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_DONE_AFEU) SEC2Dump(DBGTXT_SVCRQ, ("AF "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_DONE_RNG) SEC2Dump(DBGTXT_SVCRQ, ("RNG "));
|
||||
if (pRegs->IntStatus[1] & CHA_INT_DONE_PKEU) SEC2Dump(DBGTXT_SVCRQ, ("PK "));
|
||||
}
|
||||
else
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("Unknown"));
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("\n"));
|
||||
#endif
|
||||
|
||||
for (channel = 0; channel < NUM_CHANNELS; channel++)
|
||||
{
|
||||
bIsComplete[channel] = FALSE;
|
||||
status[channel] = SEC2_SUCCESS;
|
||||
}
|
||||
|
||||
/* deal with any channel done interrupts */
|
||||
if ((pRegs->IntStatus[0] & ALL_CHANNEL_INT_DONE_MASK) != 0)
|
||||
/* found at least one channel done interrupt */
|
||||
for (channel = 0; channel < NUM_CHANNELS; channel++)
|
||||
if ((pRegs->IntStatus[0] & ChannelDoneInterruptMasks[channel]) != 0)
|
||||
/* found a channel done interrupt */
|
||||
bIsComplete[channel] = TRUE;
|
||||
|
||||
/* deal with any CHA done (manual/debug/target mode) interrupts */
|
||||
if ((pRegs->IntStatus[1] & ALL_CHA_INT_DONE_MASK) != 0)
|
||||
/* found at least one CHA done interrupt */
|
||||
for (cha=0; cha<NUM_CHAS; cha++)
|
||||
if ((pRegs->IntStatus[1] & ChaDoneInterruptMasks[cha]) != 0)
|
||||
{
|
||||
/* found a CHA done interrupt, notify application */
|
||||
if (cha < 4)
|
||||
channel = (pRegs->ChaAssignmentStatus[0] >> (cha * 8)) & 0xF;
|
||||
else
|
||||
channel = (pRegs->ChaAssignmentStatus[1] >> ((cha - 4) * 8)) & 0xF;
|
||||
|
||||
if (channel > 0 && channel < (NUM_CHANNELS+1))
|
||||
bIsComplete[channel-1] = TRUE;
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ,
|
||||
("ProcessingComplete(): Channel %d Assigned\n",
|
||||
channel));
|
||||
} /* if (CHA int status) */
|
||||
|
||||
|
||||
/* deal with any error interrupts */
|
||||
if (((pRegs->IntStatus[0] & ALL_INT_ERRORS_MASK_LOW) != 0) ||
|
||||
((pRegs->IntStatus[1] & ALL_INT_ERRORS_MASK_HIGH) != 0))
|
||||
{
|
||||
/* need to find the channel */
|
||||
/* deal with CHA error interrupts */
|
||||
|
||||
for (cha=0; cha<NUM_CHAS; cha++)
|
||||
{
|
||||
if (cha < 4)
|
||||
channel = (pRegs->ChaAssignmentStatus[0] >> (cha * 8)) & 0xF;
|
||||
else
|
||||
channel = (pRegs->ChaAssignmentStatus[1] >> ((cha - 4) * 8)) & 0xF;
|
||||
|
||||
if (channel > 0 && channel < (NUM_CHANNELS+1) &&
|
||||
(pRegs->IntStatus[0] & ChannelErrorInterruptMasks[channel-1]) != 0)
|
||||
{
|
||||
status[channel-1] = SEC2_CHA_ERROR;
|
||||
bIsComplete[channel-1] = TRUE;
|
||||
}
|
||||
} /* end for cha loop */
|
||||
|
||||
for (channel=0; channel<NUM_CHANNELS; channel++)
|
||||
{
|
||||
if ((pRegs->IntStatus[0] & ChannelErrorInterruptMasks[channel]) != 0)
|
||||
{
|
||||
bIsComplete[channel] = TRUE;
|
||||
|
||||
/* this was a channel error then */
|
||||
/* return the error code with some sort of quasi-priority, since */
|
||||
/* multiples could occur */
|
||||
|
||||
status[channel] = SEC2_UNKNOWN_ERROR;
|
||||
|
||||
if ((pRegs->ChannelError[channel][1] & CHANNEL_CHA_ERROR) ||
|
||||
(pRegs->ChannelError[channel][1] & CHANNEL_CHA_ASSIGN_ERROR))
|
||||
status[channel] = SEC2_CHA_ERROR;
|
||||
|
||||
if (pRegs->ChannelError[channel][1] & CHANNEL_UNRECOGNIZED_HEADER_ERROR)
|
||||
status[channel] = SEC2_INVALID_OPERATION_ID;
|
||||
|
||||
if (pRegs->ChannelError[channel][1] & CHA_PARITY_SYSTEM_ERROR)
|
||||
status[channel] = SEC2_PARITY_SYSTEM_ERROR;
|
||||
|
||||
if (pRegs->ChannelError[channel][1] & CHANNEL_NULL_FETCH_POINTER)
|
||||
status[channel] = SEC2_INCOMPLETE_POINTER;
|
||||
|
||||
if ((pRegs->ChannelError[channel][1] & CHANNEL_SCATTER_LENGTH_ERROR) ||
|
||||
(pRegs->ChannelError[channel][1] & CHANNEL_SCATTER_BOUND_ERROR) ||
|
||||
(pRegs->ChannelError[channel][1] & CHANNEL_GATHER_LENGTH_ERROR) ||
|
||||
(pRegs->ChannelError[channel][1] & CHANNEL_GATHER_BOUND_ERROR) ||
|
||||
(pRegs->ChannelError[channel][1] & CHANNEL_ZERO_SCATTER_LEN_ERROR))
|
||||
status[channel] = SEC2_SCATTER_LIST_ERROR;
|
||||
|
||||
if (pRegs->ChannelError[channel][1] & CHANNEL_BUS_MASTER_ERROR)
|
||||
status[channel] = SEC2_BUS_MASTER_ERROR;
|
||||
|
||||
if ((pRegs->ChannelError[channel][1] & CHANNEL_FETCH_FIFO_NEARMISS_ERROR) ||
|
||||
(pRegs->ChannelError[channel][1] & CHANNEL_FETCH_FIFO_OVERFLOW_ERROR))
|
||||
status[channel] = SEC2_FETCH_FIFO_OVERFLOW;
|
||||
|
||||
} /* if (valid interrupt) */
|
||||
} /* for (channels) */
|
||||
} /* if (cha int done) */
|
||||
|
||||
for (channel = 0; channel < NUM_CHANNELS; channel++)
|
||||
if (bIsComplete[channel])
|
||||
CompleteRequest(channel, status[channel], TRUE, pRegs);
|
||||
|
||||
/* schedule queued requests on any freed channels */
|
||||
ScheduleNext();
|
||||
|
||||
} /* if (message from queue) */
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("ProcessingComplete Done\n"));
|
||||
} /* End of ProcessingComplete */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void RemoveQueueEntry(QUEUE_ENTRY *entry)
|
||||
{
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("RemoveQueueEntry->Entry=0x%lx\n", (unsigned long)entry));
|
||||
semTake (QueueSemId, 100);
|
||||
if (QueueEntryDepth > 0) {
|
||||
QueueEntryDepth--;
|
||||
entry->requestingTaskId = 0;
|
||||
entry->pReq = NULL;
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("RemoveQueueEntry->QueueEntryDepth=0x%lx\n", QueueEntryDepth));
|
||||
ProcessQueueTop = ProcessQueueTop->next;
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("RemoveQueueEntry->ProcessQueueTop=0x%lx\n", (unsigned long)ProcessQueueTop));
|
||||
}
|
||||
semGive (QueueSemId);
|
||||
return;
|
||||
|
||||
} /* end of RemoveQueueEntry */
|
||||
|
||||
|
||||
|
||||
|
||||
/* does not return a status value -- all errors are returned to the requesting
|
||||
application through the request structure status value */
|
||||
/* this should only be called with channel assignments locked */
|
||||
void ScheduleNext()
|
||||
{
|
||||
register unsigned int channel;
|
||||
int status;
|
||||
|
||||
IOLockChannelAssignment();
|
||||
|
||||
channel = 0;
|
||||
while (channel < NUM_CHANNELS)
|
||||
{
|
||||
if (ChannelAssignments[channel].assignment != CHANNEL_FREE)
|
||||
{
|
||||
channel++;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Is there anything queued up? */
|
||||
if (QueueEntryDepth > 0) {
|
||||
if (CheckChas(ProcessQueueTop->pReq->opId) != SEC2_SUCCESS) {
|
||||
SEC2Dump(DBGTXT_SETRQ, ("ScheduleNext->Breaking Out CheckChas fails 0x%lx\n", ProcessQueueTop->pReq->opId));
|
||||
break;
|
||||
}
|
||||
|
||||
ChannelAssignments[channel].assignment = CHANNEL_DYNAMIC;
|
||||
ChannelAssignments[channel].pReq = ProcessQueueTop->pReq;
|
||||
ChannelAssignments[channel].ownerTaskId = ProcessQueueTop->requestingTaskId;
|
||||
RemoveQueueEntry(ProcessQueueTop);
|
||||
FreeChannels--;
|
||||
|
||||
SEC2Dump(DBGTXT_SETRQ, ("ScheduleNext->FreeChannels 0x%x\n", FreeChannels));
|
||||
|
||||
IOUnLockChannelAssignment();
|
||||
status = RequestToDpd(ChannelAssignments[channel].pReq, channel);
|
||||
|
||||
if (status != SEC2_SUCCESS)
|
||||
{
|
||||
/* Problem with request, return error to the application */
|
||||
CompleteRequest(channel, status, TRUE, NULL);
|
||||
IOLockChannelAssignment();
|
||||
continue;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* write the address of the first DPD to the channel */
|
||||
/* this starts hardware processing the request */
|
||||
|
||||
*(ChannelNextDescriptorRegister[channel]+1) = __vpa((unsigned long)(ChannelAssignments[channel].Dpds[0]));
|
||||
|
||||
#ifdef __KERNEL__
|
||||
/* Interpeak begin */
|
||||
if(!in_interrupt())
|
||||
/* Interpeak end */
|
||||
schedule();
|
||||
#endif
|
||||
|
||||
IOLockChannelAssignment();
|
||||
}
|
||||
}
|
||||
/* finished with this channel */
|
||||
channel++;
|
||||
}
|
||||
|
||||
IOUnLockChannelAssignment();
|
||||
|
||||
}
|
||||
|
||||
|
||||
/* As T2.0 is designed, output from PKHA will be "front loaded" in the output */
|
||||
/* buffer such that data starts at the zeroth element in the output buffer */
|
||||
/* As long as the output and the modulus size match, this is fine. If the */
|
||||
/* output is larger than the modulus, then we would normally expect the */
|
||||
/* output to be at the far end of the buffer (leading zeros at the start) */
|
||||
/* However, it puts the modulated output "up front". Normally, there's no */
|
||||
/* reason for the output > modulus, but if it exists, this corrects for it */
|
||||
|
||||
#ifdef PKHA_OUTPUT_SHIFT
|
||||
|
||||
static void fixPKHAresult(DPD *pkDesc)
|
||||
{
|
||||
int i;
|
||||
unsigned long modlen, outlen, shift, *outbuf;
|
||||
unsigned long *src, *dest;
|
||||
|
||||
modlen = (pkDesc->fld[0].len & 0xffff0000) >> 16;
|
||||
outlen = (pkDesc->fld[4].len & 0xffff0000) >> 16;
|
||||
outbuf = (unsigned long *)pkDesc->fld[4].ptr;
|
||||
|
||||
|
||||
/* Check difference and save, if not different, exit */
|
||||
if (outlen > modlen)
|
||||
shift = (outlen - modlen)/4;
|
||||
else
|
||||
return;
|
||||
|
||||
dest = &outbuf[(outlen / 4) - 1];
|
||||
src = &outbuf[(modlen / 4) - 1];
|
||||
|
||||
for (i = 0; i < shift; i++)
|
||||
{
|
||||
*(dest--) = *(src);
|
||||
*(src--) = 0;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
int CompleteRequest(int channel, int status, BOOLEAN bDoNotify, DEVICE_REGS *pRegs)
|
||||
{
|
||||
register GENERIC_REQ *req = NULL;
|
||||
int i, j;
|
||||
|
||||
|
||||
IOLockChannelAssignment();
|
||||
|
||||
if (ChannelAssignments[channel].pReq != NULL)
|
||||
req = ChannelAssignments[channel].pReq;
|
||||
else
|
||||
{
|
||||
/* Interpeak begin */
|
||||
IOUnLockChannelAssignment();
|
||||
/* Interpeak end */
|
||||
return -1;
|
||||
}
|
||||
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("CompleteRequest->channel %d, request=0x%lx\n", channel, (unsigned long)req));
|
||||
((GENERIC_REQ*)req)->status = status;
|
||||
|
||||
ChannelAssignments[channel].pReq = NULL;
|
||||
|
||||
#ifdef PKHA_OUTPUT_SHIFT
|
||||
/* This is here as a workaround for completing PKHA */
|
||||
for (i = 0; i < MAX_DPDS; i++)
|
||||
if (ChannelAssignments[channel].Dpds[i] != NULL)
|
||||
if ((ChannelAssignments[channel].Dpds[i]->header & 0xf8) == 0x00000080) /* PKHA? */
|
||||
fixPKHAresult(ChannelAssignments[channel].Dpds[i]);
|
||||
#endif
|
||||
|
||||
/* Walk through the request's descriptor list. For any DPD that was in use, */
|
||||
/* if they used scatter lists, we have to return the free elements to the */
|
||||
/* fragment pool. So check for scattered pointers, and unmap them */
|
||||
|
||||
for (i = 0; i < MAX_DPDS; i++)
|
||||
if (ChannelAssignments[channel].Dpds[i] != NULL)
|
||||
for (j = 0; j < NUM_DPD_FLDS; j++)
|
||||
if (ChannelAssignments[channel].Dpds[i]->fld[j].len & PTRTYPE_JBIT)
|
||||
UnmapScatterFragments((void *)ChannelAssignments[channel].Dpds[i]->fld[j].ptr);
|
||||
|
||||
/* Change the assignment state. This is the last thing to be done
|
||||
since the channel becomes immediately available when you set it
|
||||
to FREE (dynamic) or ASSIGNED (static).
|
||||
*/
|
||||
if (ChannelAssignments[channel].assignment == CHANNEL_DYNAMIC)
|
||||
{
|
||||
FreeChannels++;
|
||||
ChannelAssignments[channel].assignment = CHANNEL_FREE;
|
||||
}
|
||||
|
||||
/* Interpeak begin */
|
||||
#ifdef __KERNEL__
|
||||
if (bDoNotify)
|
||||
{
|
||||
if (status == SEC2_SUCCESS)
|
||||
{
|
||||
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_IS_PID)
|
||||
{
|
||||
Ctx_queue_element *item;
|
||||
|
||||
item = kmalloc(sizeof(Ctx_queue_element), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
|
||||
if (item != NULL)
|
||||
{
|
||||
item->pid = (int)((GENERIC_REQ *)req)->notify;
|
||||
item->ctx = ((GENERIC_REQ*)req)->pNotifyCtx;
|
||||
ctx_element_enqueue(&ctx_done_queue, item);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_ERROR_IS_PID)
|
||||
{
|
||||
Ctx_queue_element *item;
|
||||
|
||||
item = kmalloc(sizeof(Ctx_queue_element), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
|
||||
if (item != NULL)
|
||||
{
|
||||
item->pid = (int)((GENERIC_REQ *)req)->notify_on_error;
|
||||
item->ctx = ((GENERIC_REQ*)req)->pNotifyCtx;
|
||||
ctx_element_enqueue(&ctx_error_queue, item);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
/* Interpeak end */
|
||||
|
||||
IOUnLockChannelAssignment();
|
||||
|
||||
if (bDoNotify)
|
||||
{
|
||||
if (status == SEC2_SUCCESS)
|
||||
{
|
||||
/* This is a normal completion notifier */
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("CompleteReqest(): success notifier in process\n"));
|
||||
|
||||
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_IS_PID)
|
||||
{
|
||||
#ifdef __KERNEL__
|
||||
send_sig(SIGUSR1, find_task_by_pid((long)((GENERIC_REQ*)req)->notify), 0);
|
||||
#endif
|
||||
#ifdef VXWORKS
|
||||
(void)kill((long)((GENERIC_REQ*)req)->notify, SIGUSR1);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((((GENERIC_REQ*)req)->notify) != NULL)
|
||||
(((GENERIC_REQ*)req)->notify)(((GENERIC_REQ*)req)->pNotifyCtx);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
/* else this is an error notifier... */
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("CompleteReqest(): error notifier in process\n"));
|
||||
|
||||
if (((GENERIC_REQ *)req)->notifyFlags & NOTIFY_ERROR_IS_PID)
|
||||
{
|
||||
#ifdef __KERNEL__
|
||||
send_sig(SIGUSR2, find_task_by_pid((long)((GENERIC_REQ *)req)->notify_on_error), 0);
|
||||
#endif
|
||||
#ifdef VXWORKS
|
||||
(void)kill((long)((GENERIC_REQ*)req)->notify_on_error, SIGUSR2);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((((GENERIC_REQ*)req)->notify_on_error) != NULL)
|
||||
{
|
||||
/* first, do the error context save */
|
||||
((GENERIC_REQ*)req)->ctxNotifyOnErr.errorcode = ((GENERIC_REQ*)req)->status;
|
||||
|
||||
if (pRegs == NULL)
|
||||
memset(&(((GENERIC_REQ*)req)->ctxNotifyOnErr.driverstatus),0,sizeof(STATUS_REQ));
|
||||
else
|
||||
CopyRegsToStatus(&(((GENERIC_REQ*)req)->ctxNotifyOnErr.driverstatus), pRegs);
|
||||
|
||||
((GENERIC_REQ*)req)->ctxNotifyOnErr.request = req;
|
||||
|
||||
/* now call the handler */
|
||||
SEC2Dump(DBGTXT_SVCRQ, ("CompleteRequest(): calling error notifier with context\n"));
|
||||
(((GENERIC_REQ*)req)->notify_on_error)(&(((GENERIC_REQ*)req)->ctxNotifyOnErr));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int GetStatus(STATUS_REQ *pStatus, int callingTaskId)
|
||||
{
|
||||
int i;
|
||||
|
||||
pStatus->ChaAssignmentStatusRegister[0] = *(unsigned long *)(ChaAssignmentStatusRegister);
|
||||
pStatus->ChaAssignmentStatusRegister[1] = *(unsigned long *)(ChaAssignmentStatusRegister + 1);
|
||||
|
||||
pStatus->InterruptControlRegister[0] = *(unsigned long *)(InterruptControlRegister);
|
||||
pStatus->InterruptControlRegister[1] = *(unsigned long *)(InterruptControlRegister + 1);
|
||||
|
||||
pStatus->InterruptStatusRegister[0] = *(unsigned long *)(InterruptStatusRegister);
|
||||
pStatus->InterruptStatusRegister[1] = *(unsigned long *)(InterruptStatusRegister + 1);
|
||||
|
||||
pStatus->IdRegister = *(unsigned long *)(IdRegister);
|
||||
|
||||
for (i = 0; i < NUM_CHANNELS; i++)
|
||||
{
|
||||
pStatus->ChannelStatusRegister[i][0] = *(unsigned long *)(ChannelPointerStatusRegister[i]);
|
||||
pStatus->ChannelStatusRegister[i][1] = *(unsigned long *)(ChannelPointerStatusRegister[i] + 1);
|
||||
}
|
||||
|
||||
for (i = 0; i < NUM_CHANNELS; i++)
|
||||
{
|
||||
pStatus->ChannelConfigurationRegister[i][0] = *(unsigned long *)(ChannelConfigRegister[i]);
|
||||
pStatus->ChannelConfigurationRegister[i][1] = *(unsigned long *)(ChannelConfigRegister[i] + 1);
|
||||
}
|
||||
|
||||
for (i = 0; i < NUM_CHAS; i++)
|
||||
{
|
||||
pStatus->CHAInterruptStatusRegister[i][0] = *(unsigned long *)(ChaInterruptStatusRegister[i]);
|
||||
pStatus->CHAInterruptStatusRegister[i][1] = *(unsigned long *)(ChaInterruptStatusRegister[i] + 1);
|
||||
}
|
||||
|
||||
|
||||
pStatus->QueueEntryDepth = QueueEntryDepth;
|
||||
pStatus->FreeChannels = FreeChannels;
|
||||
pStatus->FreeRngas = FreeRngas;
|
||||
pStatus->FreeAfhas = FreeAfhas;
|
||||
pStatus->FreeDesas = FreeDesas;
|
||||
pStatus->FreeMdhas = FreeMdhas;
|
||||
pStatus->FreePkhas = FreePkhas;
|
||||
pStatus->FreeAesas = FreeAesas;
|
||||
pStatus->FreeKeas = FreeKeas;
|
||||
pStatus->BlockSize = BlockSize;
|
||||
|
||||
return SEC2_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
void CopyRegsToStatus(STATUS_REQ *pStatus, DEVICE_REGS *pRegs)
|
||||
{
|
||||
int channel, cha;
|
||||
|
||||
/* Build up the driver status structure. It will be passed back by
|
||||
the notify on error routine
|
||||
*/
|
||||
|
||||
pStatus->InterruptStatusRegister[0] = pRegs->IntStatus[0];
|
||||
pStatus->InterruptStatusRegister[1] = pRegs->IntStatus[1];
|
||||
pStatus->ChaAssignmentStatusRegister[0] = pRegs->ChaAssignmentStatus[0];
|
||||
pStatus->ChaAssignmentStatusRegister[1] = pRegs->ChaAssignmentStatus[1];
|
||||
|
||||
for (channel=0; channel<NUM_CHANNELS; channel++)
|
||||
{
|
||||
pStatus->ChannelStatusRegister[channel][0] = pRegs->ChannelError[channel][0];
|
||||
pStatus->ChannelStatusRegister[channel][1] = pRegs->ChannelError[channel][1];
|
||||
}
|
||||
for (cha=0; cha<NUM_CHAS; cha++)
|
||||
{
|
||||
pStatus->CHAInterruptStatusRegister[cha][0] = pRegs->ChaError[cha][0];
|
||||
pStatus->CHAInterruptStatusRegister[cha][1] = pRegs->ChaError[cha][1];
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,403 @@
|
||||
|
||||
/****************************************************************************
|
||||
* sec2_sctrMap.c - scatter buffer pointer marker
|
||||
****************************************************************************
|
||||
* Copyright (c) 2004-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* 1.2 Jan 27,2005 sec - change some obsolete names
|
||||
*/
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
|
||||
typedef struct _scatter_assoc
|
||||
{
|
||||
unsigned long offset;
|
||||
unsigned long pos;
|
||||
} SCATTER_ASSOC;
|
||||
|
||||
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_RNG[] =
|
||||
{
|
||||
{offsetof(RNG_REQ, rngData), 0x10},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_DES_CBC_CTX[] =
|
||||
{
|
||||
{offsetof(DES_CBC_CRYPT_REQ, inIvData), 0x02},
|
||||
{offsetof(DES_CBC_CRYPT_REQ, keyData), 0x04},
|
||||
{offsetof(DES_CBC_CRYPT_REQ, inData), 0x08},
|
||||
{offsetof(DES_CBC_CRYPT_REQ, outData), 0x10},
|
||||
{offsetof(DES_CBC_CRYPT_REQ, outIvData), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_DES_ECB[] =
|
||||
{
|
||||
{offsetof(DES_CRYPT_REQ, keyData), 0x04},
|
||||
{offsetof(DES_CRYPT_REQ, inData), 0x08},
|
||||
{offsetof(DES_CRYPT_REQ, outData), 0x10},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_RC4_LDCTX_CRYPT_ULCTX[] =
|
||||
{
|
||||
{offsetof(ARC4_LOADCTX_CRYPT_REQ, inCtxData), 0x02},
|
||||
{offsetof(ARC4_LOADCTX_CRYPT_REQ, inData), 0x08},
|
||||
{offsetof(ARC4_LOADCTX_CRYPT_REQ, outData), 0x10},
|
||||
{offsetof(ARC4_LOADCTX_CRYPT_REQ, outCtxData), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_RC4_LDKEY_CRYPT_ULCTX[] =
|
||||
{
|
||||
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, keyData), 0x04},
|
||||
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, inData), 0x08},
|
||||
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, outData), 0x10},
|
||||
{offsetof(ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ, outCtxData), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_HASH_LDCTX_HASH_ULCTX[] =
|
||||
{
|
||||
{offsetof(HASH_REQ, ctxData), 0x02},
|
||||
{offsetof(HASH_REQ, inData), 0x08},
|
||||
{offsetof(HASH_REQ, outData), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_HASH_LDCTX_HASH_PAD_ULCTX[] =
|
||||
{
|
||||
{offsetof(HASH_REQ, ctxData), 0x02},
|
||||
{offsetof(HASH_REQ, inData), 0x08},
|
||||
{offsetof(HASH_REQ, outData), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_HASH_LDCTX_HMAC_ULCTX[] =
|
||||
{
|
||||
{offsetof(HMAC_PAD_REQ, keyData), 0x04},
|
||||
{offsetof(HMAC_PAD_REQ, inData), 0x08},
|
||||
{offsetof(HMAC_PAD_REQ, outData), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_MM_LDCTX_EXP_ULCTX[] =
|
||||
{
|
||||
{offsetof(MOD_EXP_REQ, aData), 0x02},
|
||||
{offsetof(MOD_EXP_REQ, expData), 0x04},
|
||||
{offsetof(MOD_EXP_REQ, modData), 0x08},
|
||||
{offsetof(MOD_EXP_REQ, outData), 0x10},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_MM_SS_RSA_EXP[] =
|
||||
{
|
||||
{offsetof(MOD_SS_EXP_REQ, modData), 0x01},
|
||||
{offsetof(MOD_SS_EXP_REQ, aData), 0x04},
|
||||
{offsetof(MOD_SS_EXP_REQ, expData), 0x08},
|
||||
{offsetof(MOD_SS_EXP_REQ, bData), 0x10},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_MM_LDCTX_R2MODN_ULCTX[] =
|
||||
{
|
||||
{offsetof(MOD_R2MODN_REQ, modData), 0x08},
|
||||
{offsetof(MOD_R2MODN_REQ, outData), 0x10},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_MM_LDCTX_RRMODP_ULCTX[] =
|
||||
{
|
||||
{offsetof(MOD_RRMODP_REQ, pData), 0x01},
|
||||
{offsetof(MOD_RRMODP_REQ, nBytes), 0x08},
|
||||
{offsetof(MOD_RRMODP_REQ, outData), 0x10},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_MOD_LDCTX_2OP_ULCTX[] =
|
||||
{
|
||||
{offsetof(MOD_2OP_REQ, modData), 0x01},
|
||||
{offsetof(MOD_2OP_REQ, bData), 0x02},
|
||||
{offsetof(MOD_2OP_REQ, aData), 0x04},
|
||||
{offsetof(MOD_2OP_REQ, outData), 0x10},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_EC_LDCTX_kP_ULCTX[] =
|
||||
{
|
||||
{offsetof(ECC_POINT_REQ, nData), 0x01},
|
||||
{offsetof(ECC_POINT_REQ, eData), 0x02},
|
||||
{offsetof(ECC_POINT_REQ, buildData), 0x04},
|
||||
{offsetof(ECC_POINT_REQ, b1Data), 0x08},
|
||||
{offsetof(ECC_POINT_REQ, b2Data), 0x10},
|
||||
{offsetof(ECC_POINT_REQ, b3Data), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_EC_SPKBUILD_ULCTX[] =
|
||||
{
|
||||
{offsetof(ECC_SPKBUILD_REQ, a0Data), 0x01},
|
||||
{offsetof(ECC_SPKBUILD_REQ, a1Data), 0x02},
|
||||
{offsetof(ECC_SPKBUILD_REQ, a2Data), 0x04},
|
||||
{offsetof(ECC_SPKBUILD_REQ, a3Data), 0x08},
|
||||
{offsetof(ECC_SPKBUILD_REQ, b0Data), 0x10},
|
||||
{offsetof(ECC_SPKBUILD_REQ, b1Data), 0x20},
|
||||
{offsetof(ECC_SPKBUILD_REQ, buildData), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_EC_2OP[] =
|
||||
{
|
||||
{offsetof(ECC_2OP_REQ, bData), 0x01},
|
||||
{offsetof(ECC_2OP_REQ, aData), 0x02},
|
||||
{offsetof(ECC_2OP_REQ, modData), 0x04},
|
||||
{offsetof(ECC_2OP_REQ, outData), 0x08},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_IPSEC_CBC[] =
|
||||
{
|
||||
{offsetof(IPSEC_CBC_REQ, hashKeyData), 0x01},
|
||||
{offsetof(IPSEC_CBC_REQ, hashInData), 0x02},
|
||||
{offsetof(IPSEC_CBC_REQ, cryptKeyData), 0x04},
|
||||
{offsetof(IPSEC_CBC_REQ, cryptCtxInData), 0x08},
|
||||
{offsetof(IPSEC_CBC_REQ, inData), 0x10},
|
||||
{offsetof(IPSEC_CBC_REQ, cryptDataOut), 0x20},
|
||||
{offsetof(IPSEC_CBC_REQ, hashDataOut), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_IPSEC_ESP[] =
|
||||
{
|
||||
{offsetof(IPSEC_ESP_REQ, hashKeyData), 0x01},
|
||||
{offsetof(IPSEC_ESP_REQ, hashInData), 0x02},
|
||||
{offsetof(IPSEC_ESP_REQ, cryptCtxInData), 0x04},
|
||||
{offsetof(IPSEC_ESP_REQ, cryptKeyData), 0x08},
|
||||
{offsetof(IPSEC_ESP_REQ, inData), 0x10},
|
||||
{offsetof(IPSEC_ESP_REQ, cryptDataOut), 0x20},
|
||||
{offsetof(IPSEC_ESP_REQ, cryptCtxOutData), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_IPSEC_STATIC_CBC[] =
|
||||
{
|
||||
{offsetof(IPSEC_CBC_REQ, hashKeyData), 0x01},
|
||||
{offsetof(IPSEC_CBC_REQ, hashInData), 0x02},
|
||||
{offsetof(IPSEC_CBC_REQ, cryptKeyData), 0x04},
|
||||
{offsetof(IPSEC_CBC_REQ, cryptCtxInData), 0x08},
|
||||
{offsetof(IPSEC_CBC_REQ, inData), 0x10},
|
||||
{offsetof(IPSEC_CBC_REQ, cryptDataOut), 0x20},
|
||||
{offsetof(IPSEC_CBC_REQ, hashDataOut), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_IPSEC_ECB[] =
|
||||
{
|
||||
{offsetof(IPSEC_ECB_REQ, hashKeyData), 0x02},
|
||||
{offsetof(IPSEC_ECB_REQ, cryptKeyData), 0x04},
|
||||
{offsetof(IPSEC_ECB_REQ, hashInData), 0x08},
|
||||
{offsetof(IPSEC_ECB_REQ, inData), 0x10},
|
||||
{offsetof(IPSEC_ECB_REQ, cryptDataOut), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_IPSEC_AES_CBC[] =
|
||||
{
|
||||
{offsetof(IPSEC_AES_CBC_REQ, hashKeyData), 0x01},
|
||||
{offsetof(IPSEC_AES_CBC_REQ, hashInData), 0x02},
|
||||
{offsetof(IPSEC_AES_CBC_REQ, cryptKeyData), 0x04},
|
||||
{offsetof(IPSEC_AES_CBC_REQ, cryptCtxInData), 0x08},
|
||||
{offsetof(IPSEC_AES_CBC_REQ, inData), 0x10},
|
||||
{offsetof(IPSEC_AES_CBC_REQ, cryptDataOut), 0x20},
|
||||
{offsetof(IPSEC_AES_CBC_REQ, hashDataOut), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_IPSEC_AES_ECB[] =
|
||||
{
|
||||
{offsetof(IPSEC_AES_ECB_REQ, hashKeyData), 0x01},
|
||||
{offsetof(IPSEC_AES_ECB_REQ, hashInData), 0x02},
|
||||
{offsetof(IPSEC_AES_ECB_REQ, cryptKeyData), 0x04},
|
||||
{offsetof(IPSEC_AES_ECB_REQ, inData), 0x10},
|
||||
{offsetof(IPSEC_AES_ECB_REQ, cryptDataOut), 0x20},
|
||||
{offsetof(IPSEC_AES_ECB_REQ, hashDataOut), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_AESA_CRYPT[] =
|
||||
{
|
||||
{offsetof(AESA_CRYPT_REQ, inIvData), 0x02},
|
||||
{offsetof(AESA_CRYPT_REQ, keyData), 0x04},
|
||||
{offsetof(AESA_CRYPT_REQ, inData), 0x08},
|
||||
{offsetof(AESA_CRYPT_REQ, outData), 0x10},
|
||||
{offsetof(AESA_CRYPT_REQ, outCtxData), 0x20},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_CCMP[] =
|
||||
{
|
||||
{offsetof(CCMP_REQ, context), 0x02},
|
||||
{offsetof(CCMP_REQ, keyData), 0x04},
|
||||
{offsetof(CCMP_REQ, AADData), 0x08},
|
||||
{offsetof(CCMP_REQ, FrameData), 0x10},
|
||||
{offsetof(CCMP_REQ, cryptDataOut), 0x20},
|
||||
{offsetof(CCMP_REQ, MICData), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
static const SCATTER_ASSOC SCTMAP_SRTP[] =
|
||||
{
|
||||
{offsetof(SRTP_REQ, hashKeyData), 0x01},
|
||||
{offsetof(SRTP_REQ, ivData), 0x02},
|
||||
{offsetof(SRTP_REQ, keyData), 0x04},
|
||||
{offsetof(SRTP_REQ, inData), 0x08},
|
||||
{offsetof(SRTP_REQ, cryptDataOut), 0x10},
|
||||
{offsetof(SRTP_REQ, digestData), 0x20},
|
||||
{offsetof(SRTP_REQ, outIvData), 0x40},
|
||||
{0, 0}
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
static unsigned char locate(SCATTER_ASSOC *assoc,
|
||||
unsigned long offset)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
while(assoc[i].offset)
|
||||
if (assoc[i].offset == offset)
|
||||
return(assoc[i].pos);
|
||||
else
|
||||
i++;
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
||||
/* Locate a pointer field within a request struct, look it up, and mark the */
|
||||
/* scatter buffer mask if it is such */
|
||||
|
||||
int MarkScatterBuffer(void *request, void *buffer)
|
||||
{
|
||||
GENERIC_REQ *rq;
|
||||
unsigned long offs;
|
||||
|
||||
rq = (GENERIC_REQ *)request;
|
||||
offs = (unsigned long)buffer - (unsigned long)request;
|
||||
|
||||
switch (rq->opId & DESC_TYPE_MASK)
|
||||
{
|
||||
case DPD_RNG_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_RNG, offs);
|
||||
break;
|
||||
|
||||
case DPD_DES_CBC_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_DES_CBC_CTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_DES_ECB_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_DES_ECB, offs);
|
||||
break;
|
||||
|
||||
case DPD_RC4_LDCTX_CRYPT_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_RC4_LDCTX_CRYPT_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_RC4_LDKEY_CRYPT_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_RC4_LDKEY_CRYPT_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_HASH_LDCTX_HASH_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_HASH_LDCTX_HASH_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_HASH_LDCTX_HASH_PAD_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_HASH_LDCTX_HASH_PAD_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_HASH_LDCTX_HMAC_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_HASH_LDCTX_HMAC_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_MM_LDCTX_EXP_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_LDCTX_EXP_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_MM_SS_EXP_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_SS_RSA_EXP, offs);
|
||||
break;
|
||||
|
||||
case DPD_MM_LDCTX_R2MODN_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_LDCTX_R2MODN_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_MM_LDCTX_RRMODP_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MM_LDCTX_RRMODP_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_MOD_LDCTX_2OP_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_MOD_LDCTX_2OP_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_EC_LDCTX_kP_ULCTX_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_EC_LDCTX_kP_ULCTX, offs);
|
||||
break;
|
||||
|
||||
case DPD_EC_2OP_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_EC_2OP, offs);
|
||||
break;
|
||||
|
||||
case DPD_IPSEC_CBC_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_CBC, offs);
|
||||
break;
|
||||
|
||||
case DPD_IPSEC_ECB_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_ECB, offs);
|
||||
break;
|
||||
|
||||
case DPD_IPSEC_AES_CBC_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_AES_CBC, offs);
|
||||
break;
|
||||
|
||||
case DPD_IPSEC_AES_ECB_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_AES_ECB, offs);
|
||||
break;
|
||||
|
||||
case DPD_AESA_CRYPT_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_AESA_CRYPT, offs);
|
||||
break;
|
||||
|
||||
case DPD_IPSEC_ESP_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_IPSEC_ESP, offs);
|
||||
break;
|
||||
|
||||
case DPD_CCMP_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_CCMP, offs);
|
||||
break;
|
||||
|
||||
case DPD_SRTP_GROUP:
|
||||
rq->scatterBufs |= locate((SCATTER_ASSOC *)SCTMAP_SRTP, offs);
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,170 @@
|
||||
/****************************************************************************
|
||||
* sec2isr.c -- The Interrupt Service code for SEC2 Driver
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003, 2004 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* Revision History:
|
||||
* 1.0 Aug 24,2003 dgs - adapted from the final version of mpc18x
|
||||
* May 12,2004 sec - turned on some windview events for debug
|
||||
* Jun 06,2004 sec - corrected channel reset logic
|
||||
* Jun 10,2004 sec - remove superfluous I/O calls
|
||||
* Jul 22,2004 sec - added double CHA reset to handle errata
|
||||
* 1.1.0 Nov 16,2004 sec - updated for linux change merge from prior revs
|
||||
* 1.1.1 Dec 16,2004 sec - cleanup, remove unused diagnostics
|
||||
* 1.2 Jan 27,2005
|
||||
*/
|
||||
|
||||
|
||||
#include "Sec2Driver.h"
|
||||
|
||||
/* Interpeak begin */
|
||||
#undef NUM_CHANNELS
|
||||
#define NUM_CHANNELS (num_channels)
|
||||
extern int num_channels;
|
||||
/* Interpeak end */
|
||||
|
||||
/**************************************************************************
|
||||
* Function Name: InterruptServiceRoutine
|
||||
* Purpose: To handle all interrupt generated by Channel or CHA (Done or Error)
|
||||
* indicated by the Interrupt Status Register
|
||||
* If Error, clean the InterruptStatusRegister by writing InterruptClearRegister
|
||||
* If Done, call ProcessRequestDone routine
|
||||
* Input: Interrupt - PKINTERRUPT
|
||||
* Context - PVOID the request Context
|
||||
*
|
||||
|
||||
*************************************************************************/
|
||||
#ifdef __KERNEL__
|
||||
DEVICE_REGS pRegs_queue[PREGS_QUEUE_DEPTH];
|
||||
unsigned PQ_head = 0;
|
||||
unsigned PQ_tail = 0;
|
||||
unsigned PQ_entries = 0;
|
||||
|
||||
extern void ProcessingComplete(unsigned long not_used);
|
||||
DECLARE_TASKLET(isr_tasklet,ProcessingComplete,0);
|
||||
|
||||
void InterruptServiceRoutine(int irq, void *dev_id, struct pt_regs *pt_regs)
|
||||
#else
|
||||
void InterruptServiceRoutine(void)
|
||||
#endif
|
||||
{
|
||||
register int cha, cha_res;
|
||||
register int channel;
|
||||
unsigned long temp[2];
|
||||
unsigned long intStatus0, intStatus1;
|
||||
DEVICE_REGS *pRegs;
|
||||
static DEVICE_REGS regs;
|
||||
|
||||
|
||||
|
||||
/* save interrupt status register for the ProcessingComplete */
|
||||
intStatus0 = *(InterruptStatusRegister);
|
||||
intStatus1 = *(InterruptStatusRegister + 1);
|
||||
|
||||
pRegs = ®s;
|
||||
pRegs->IntStatus[0] = intStatus0;
|
||||
pRegs->IntStatus[1] = intStatus1;
|
||||
|
||||
/* check for error interrupts, was there any error? */
|
||||
if ((intStatus0 & ALL_INT_ERRORS_MASK_LOW) ||
|
||||
(intStatus1 & ALL_INT_ERRORS_MASK_HIGH))
|
||||
{
|
||||
/* save assigment statii for background servicing to use */
|
||||
pRegs->ChaAssignmentStatus[0] = *(ChaAssignmentStatusRegister);
|
||||
pRegs->ChaAssignmentStatus[1] = *(ChaAssignmentStatusRegister + 1);
|
||||
|
||||
/* service CHA error interrupts first */
|
||||
for (cha_res = 0; cha_res < NUM_CHAS; cha_res++)
|
||||
{
|
||||
/* save the channel this CHA is assigned to if any */
|
||||
if (cha_res < 4)
|
||||
channel = (pRegs->ChaAssignmentStatus[0] >> (cha_res * 8)) & 0xF;
|
||||
else
|
||||
channel = (pRegs->ChaAssignmentStatus[1] >> ((cha_res - 4) * 8)) & 0xF;
|
||||
|
||||
cha = cha_idx[cha_res];
|
||||
if ((intStatus1 & ChaErrorInterruptMasks[cha]) ||
|
||||
(channel > 0 && channel < (NUM_CHANNELS+1) &&
|
||||
(intStatus0 & ChannelErrorInterruptMasks[channel-1])))
|
||||
{
|
||||
/* found a CHA error interrupt, read the CHA status register */
|
||||
pRegs->ChaError[cha][0] = *(unsigned long *)(ChaInterruptStatusRegister[cha]);
|
||||
pRegs->ChaError[cha][1] = *(unsigned long *)(ChaInterruptStatusRegister[cha] + 1);
|
||||
|
||||
/* ensure that the associated channel is reset */
|
||||
if (channel > 0 && channel < (NUM_CHANNELS+1))
|
||||
intStatus0 |= ChannelErrorInterruptMasks[channel-1];
|
||||
|
||||
pRegs->ChannelError[channel][0] = *(unsigned long *)(ChannelPointerStatusRegister[channel-1]);
|
||||
pRegs->ChannelError[channel][1] = *(unsigned long *)(ChannelPointerStatusRegister[channel-1] + 1);
|
||||
|
||||
|
||||
|
||||
/* Done extracting info, reset the CHA */
|
||||
/* This will be done twice to work around an errata that has to do with CHA */
|
||||
/* reset hold time */
|
||||
|
||||
*(ChaResetControlRegister[cha]) = CHA_SOFTWARE_RESET;
|
||||
*(ChaResetControlRegister[cha] + 1) = 0;
|
||||
|
||||
*(ChaResetControlRegister[cha]) = CHA_SOFTWARE_RESET;
|
||||
*(ChaResetControlRegister[cha] + 1) = 0;
|
||||
|
||||
if (cha == CHA_DES) /* is this cha des? */
|
||||
{
|
||||
*(ChaInterruptControlRegister[cha]) = CHA_DESA_KEY_PARITY_ERROR_DISABLE;
|
||||
*(ChaInterruptControlRegister[cha] + 1) = 0;
|
||||
}
|
||||
if (cha == CHA_PKHA) /* is this cha the pkha? */
|
||||
{
|
||||
*(ChaInterruptControlRegister[cha]) = CHA_PKHA_ILLEGAL_ADDR_ERROR_DISABLE;
|
||||
*(ChaInterruptControlRegister[cha] + 1) = 0;
|
||||
}
|
||||
} /* if (cha causes error) */
|
||||
} /* for (all chas) */
|
||||
|
||||
|
||||
/* look at the channel error interrupts next */
|
||||
for (channel=0; channel<NUM_CHANNELS; channel++)
|
||||
{
|
||||
if (intStatus0 & ChannelErrorInterruptMasks[channel])
|
||||
{
|
||||
/* fetch a copy of the CPSR for out-of-ISR processing */
|
||||
pRegs->ChannelError[channel][0] = *(unsigned long *)(ChannelPointerStatusRegister[channel]);
|
||||
pRegs->ChannelError[channel][1] = *(unsigned long *)(ChannelPointerStatusRegister[channel] + 1);
|
||||
|
||||
/* reset the channel */
|
||||
*(ChannelConfigRegister[channel]) = (unsigned long)CHANNEL_RESET;
|
||||
*(ChannelConfigRegister[channel] + 1) = (unsigned long)0;
|
||||
|
||||
/* give the hardware a chance to clock... */
|
||||
temp[0] = *(unsigned long *)(ChannelConfigRegister[channel]);
|
||||
|
||||
/* re-enable channel interrupts */
|
||||
*(ChannelConfigRegister[channel]) = (unsigned long)0;
|
||||
*(ChannelConfigRegister[channel] + 1) = (unsigned long)CHANNEL_INTEN | CHANNEL_BURST128;
|
||||
} /* if (channel error) */
|
||||
} /* for (all channels) */
|
||||
} /* if (any error interrupt) */
|
||||
|
||||
/* clear latched interrupts at the control register level */
|
||||
*(InterruptClearRegister) = intStatus0;
|
||||
*(InterruptClearRegister + 1) = intStatus1;
|
||||
|
||||
/* schedule process complete function */
|
||||
#ifdef __KERNEL__
|
||||
(void)QmsgSend();
|
||||
#else
|
||||
(void)msgQSend(IsrMsgQId, (char*)pRegs, sizeof(DEVICE_REGS), NO_WAIT, MSG_PRI_NORMAL);
|
||||
#endif
|
||||
} /* end of SEC2InterruptService */
|
||||
Binary file not shown.
@@ -0,0 +1,575 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/* Include the internal definitions of this module */
|
||||
#include "sec_dcl.h"
|
||||
#include "sec_dcl_api.h"
|
||||
#include "sec_dcl_cmd.h"
|
||||
|
||||
|
||||
/* Include the external interfaces of other modules */
|
||||
#include "xx_ext.h"
|
||||
#include "sec_ext.h"
|
||||
#include "part_ext.h"
|
||||
#include "error_ext.h"
|
||||
#include "string_ext.h"
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
#include "mem_ext.h"
|
||||
#endif
|
||||
/* wind river end */
|
||||
|
||||
#define __ERR_MODULE__ MODULE_SEC
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_SecDcl* p_SecDcl);
|
||||
/* static t_Handle CreateDescObject(t_SecDcl* p_SecDcl,uint32_t length,uint32_t* p_Buffer);*/
|
||||
|
||||
/*******************************/
|
||||
/* Initialization Unit (below) */
|
||||
|
||||
|
||||
t_Handle SEC_DCL_Config(t_SecDclParam* p_Param)
|
||||
{
|
||||
t_SecDcl* p_SecDcl;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Param,E_NULL_POINTER);
|
||||
|
||||
/* Allocate the driver structure */
|
||||
/* ----------------------------- */
|
||||
p_SecDcl = (t_SecDcl*)XX_Malloc(sizeof(t_SecDcl));
|
||||
if (p_SecDcl == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("SEC DCL driver"));
|
||||
return (t_Handle)p_SecDcl;
|
||||
}
|
||||
memset(p_SecDcl,0,sizeof(t_SecDcl));
|
||||
|
||||
/* Allocate the driver parameters structure */
|
||||
/* ---------------------------------------- */
|
||||
p_SecDcl->p_DriverParam = (t_SecDclDriverParam*)XX_Malloc(sizeof(t_SecDclDriverParam));
|
||||
if (p_SecDcl->p_DriverParam == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("SEC DCL driver parameters"));
|
||||
return (t_Handle)p_SecDcl;
|
||||
}
|
||||
memset(p_SecDcl->p_DriverParam,0,sizeof(t_SecDclDriverParam));
|
||||
|
||||
/* Configure the driver parameters */
|
||||
/* ------------------------------- */
|
||||
p_SecDcl->p_DriverParam->h_Sec = p_Param->h_Sec ;
|
||||
p_SecDcl->p_DriverParam->memId = p_Param->memId ;
|
||||
p_SecDcl->p_DriverParam->alignment = p_Param->alignment ;
|
||||
p_SecDcl->p_DriverParam->prefixSize = p_Param->prefixSize ;
|
||||
p_SecDcl->p_DriverParam->postfixSize = p_Param->postfixSize;
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
p_SecDcl->p_DriverParam->noofBuf = p_Param->noofBuf ;
|
||||
p_SecDcl->p_DriverParam->descSize = p_Param->descSize ;
|
||||
p_SecDcl->p_DriverParam->descBufSize = p_Param->descBufSize;
|
||||
#endif
|
||||
/* wind river end */
|
||||
|
||||
return (t_Handle)p_SecDcl;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_DCL_Init(t_Handle h_SecDcl)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint8_t majRevNum;
|
||||
uint8_t minRevNum;
|
||||
/* wind river start */
|
||||
t_Error status;
|
||||
/* wind river end */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecDcl->p_DriverParam,E_INVALID_STATE);
|
||||
CHECK_INIT_PARAMETERS(p_SecDcl,CheckInitParameters);
|
||||
|
||||
majRevNum = SEC_GetMajRevNum(p_SecDcl->p_DriverParam->h_Sec);
|
||||
minRevNum = SEC_GetMinRevNum(p_SecDcl->p_DriverParam->h_Sec);
|
||||
if (majRevNum==1 && minRevNum==0)
|
||||
REPORT_ERROR(MAJOR,E_NOT_SUPPORTED,("SEC version"));
|
||||
|
||||
p_SecDcl->ptrSize = SEC_GetPtrSize(p_SecDcl->p_DriverParam->h_Sec);
|
||||
|
||||
p_SecDcl->memId = p_SecDcl->p_DriverParam->memId ;
|
||||
p_SecDcl->alignment = p_SecDcl->p_DriverParam->alignment ;
|
||||
p_SecDcl->prefixSize = p_SecDcl->p_DriverParam->prefixSize ;
|
||||
p_SecDcl->postfixSize = p_SecDcl->p_DriverParam->postfixSize;
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
p_SecDcl->descSize = p_SecDcl->p_DriverParam->descSize ;
|
||||
p_SecDcl->descBufSize = p_SecDcl->p_DriverParam->descBufSize;
|
||||
p_SecDcl->noofBuf = p_SecDcl->p_DriverParam->noofBuf ;
|
||||
#endif
|
||||
/* wind river end */
|
||||
XX_Free(p_SecDcl->p_DriverParam);
|
||||
p_SecDcl->p_DriverParam = NULL;
|
||||
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
/* Initiate memory to be used for pre-allocated descriptor buffers, for increased performance */
|
||||
#ifdef SEC4_USE_QI
|
||||
status = MEM_InitSmart("DESC", &(p_SecDcl->h_SecMem), p_SecDcl->noofBuf, p_SecDcl->descSize,
|
||||
p_SecDcl->prefixSize, p_SecDcl->postfixSize, p_SecDcl->alignment, p_SecDcl->memId, FALSE);
|
||||
#else
|
||||
status = MEM_Init("DESC", &(p_SecDcl->h_SecMem), p_SecDcl->noofBuf, p_SecDcl->descSize,
|
||||
p_SecDcl->prefixSize, p_SecDcl->postfixSize, p_SecDcl->alignment);
|
||||
#endif
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
status = MEM_InitSmart("SMRT", &(p_SecDcl->h_SecMemSmart), p_SecDcl->noofBuf, p_SecDcl->descBufSize,
|
||||
p_SecDcl->prefixSize, p_SecDcl->postfixSize, p_SecDcl->alignment, p_SecDcl->memId, FALSE);
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
#endif
|
||||
/* wind river end */
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_DCL_Free(t_Handle h_SecDcl)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
|
||||
if (p_SecDcl->p_DriverParam)
|
||||
XX_Free(p_SecDcl->p_DriverParam);
|
||||
XX_Free(p_SecDcl);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Initialization Unit (above) */
|
||||
/*******************************/
|
||||
|
||||
|
||||
/********************************/
|
||||
/* Runtime Control Unit (below) */
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitSeqJobDesc(t_Handle h_SecDcl,
|
||||
t_SeqJobDescParam* p_JobDescParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
t_Desc* p_ShrDesc;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxJobDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_JobDescParam,E_NULL_POINTER);
|
||||
|
||||
p_ShrDesc = (t_Desc*)p_JobDescParam->h_ShrDesc;
|
||||
SANITY_CHECK_EXIT(p_ShrDesc,E_INVALID_HANDLE);
|
||||
|
||||
/* Verify that casting from (uint8_t*) to (uint32_t*) can be applied safely */
|
||||
ASSERT_COND((CAST_POINTER_TO_UINT64(p_ShrDesc->p_Buffer)%sizeof(uint32_t))==0);
|
||||
|
||||
length = InitSeqJobDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
(uint32_t*)p_ShrDesc->p_Buffer,
|
||||
p_JobDescParam->inputSeq.sgt,
|
||||
p_JobDescParam->inputSeq.size,
|
||||
p_JobDescParam->inputSeq.p_Data,
|
||||
p_JobDescParam->outputSeq.sgt,
|
||||
p_JobDescParam->outputSeq.size,
|
||||
p_JobDescParam->outputSeq.p_Data);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitSplitKeyJobDesc(t_Handle h_SecDcl,
|
||||
t_SplitKeyJobDescParam* p_JobDescParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxJobDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_JobDescParam,E_NULL_POINTER);
|
||||
|
||||
length = InitSplitKeyJobDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
p_JobDescParam->p_InputKey,
|
||||
p_JobDescParam->p_OutputKey,
|
||||
p_JobDescParam->hashAlg);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitIpsecEncapShrDesc(t_Handle h_SecDcl,
|
||||
t_IpsecShrDescParam* p_ShrDescParam,
|
||||
t_IpsecEncapParam* p_EncapParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxJobDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_ShrDescParam,E_NULL_POINTER);
|
||||
SANITY_CHECK_EXIT(p_EncapParam,E_NULL_POINTER);
|
||||
|
||||
length = InitIpsecEncapShrDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
p_ShrDescParam->dataMoveSize,
|
||||
p_ShrDescParam->cryptoKey.imm,
|
||||
p_ShrDescParam->cryptoKey.size,
|
||||
p_ShrDescParam->cryptoKey.p_Data,
|
||||
p_ShrDescParam->authenKey.imm,
|
||||
p_ShrDescParam->authenKey.size,
|
||||
p_ShrDescParam->authenKey.p_Data,
|
||||
p_ShrDescParam->cryptoAlg,
|
||||
p_ShrDescParam->authenAlg,
|
||||
p_EncapParam);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitIpsecDecapShrDesc(t_Handle h_SecDcl,
|
||||
t_IpsecShrDescParam* p_ShrDescParam,
|
||||
t_IpsecDecapParam* p_DecapParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxShrDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_ShrDescParam,E_NULL_POINTER);
|
||||
SANITY_CHECK_EXIT(p_DecapParam,E_NULL_POINTER);
|
||||
|
||||
length = InitIpsecDecapShrDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
p_ShrDescParam->dataMoveSize,
|
||||
p_ShrDescParam->cryptoKey.imm,
|
||||
p_ShrDescParam->cryptoKey.size,
|
||||
p_ShrDescParam->cryptoKey.p_Data,
|
||||
p_ShrDescParam->authenKey.imm,
|
||||
p_ShrDescParam->authenKey.size,
|
||||
p_ShrDescParam->authenKey.p_Data,
|
||||
p_ShrDescParam->cryptoAlg,
|
||||
p_ShrDescParam->authenAlg,
|
||||
p_DecapParam);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitDtlsEncapShrDesc(t_Handle h_SecDcl,
|
||||
t_DtlsShrDescParam* p_ShrDescParam,
|
||||
t_DtlsEncapParam* p_EncapParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxShrDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_ShrDescParam,E_NULL_POINTER);
|
||||
SANITY_CHECK_EXIT(p_EncapParam,E_NULL_POINTER);
|
||||
|
||||
length = InitDtlsEncapShrDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
p_ShrDescParam->dataMoveSize,
|
||||
p_ShrDescParam->cryptoKey.imm,
|
||||
p_ShrDescParam->cryptoKey.size,
|
||||
p_ShrDescParam->cryptoKey.p_Data,
|
||||
p_ShrDescParam->authenKey.imm,
|
||||
p_ShrDescParam->authenKey.size,
|
||||
p_ShrDescParam->authenKey.p_Data,
|
||||
p_ShrDescParam->cipherAlg,
|
||||
p_EncapParam);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitDtlsDecapShrDesc(t_Handle h_SecDcl,
|
||||
t_DtlsShrDescParam* p_ShrDescParam,
|
||||
t_DtlsDecapParam* p_DecapParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxShrDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_ShrDescParam,E_NULL_POINTER);
|
||||
SANITY_CHECK_EXIT(p_DecapParam,E_NULL_POINTER);
|
||||
|
||||
length = InitDtlsDecapShrDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
p_ShrDescParam->dataMoveSize,
|
||||
p_ShrDescParam->cryptoKey.imm,
|
||||
p_ShrDescParam->cryptoKey.size,
|
||||
p_ShrDescParam->cryptoKey.p_Data,
|
||||
p_ShrDescParam->authenKey.imm,
|
||||
p_ShrDescParam->authenKey.size,
|
||||
p_ShrDescParam->authenKey.p_Data,
|
||||
p_ShrDescParam->cipherAlg,
|
||||
p_DecapParam);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitMacsecEncapShrDesc(t_Handle h_SecDcl,
|
||||
t_MacsecShrDescParam* p_ShrDescParam,
|
||||
t_MacsecEncapParam* p_EncapParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxShrDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_ShrDescParam,E_NULL_POINTER);
|
||||
SANITY_CHECK_EXIT(p_EncapParam,E_NULL_POINTER);
|
||||
|
||||
length = InitMacsecEncapShrDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
p_ShrDescParam->dataMoveSize,
|
||||
p_ShrDescParam->cipherKey.imm,
|
||||
p_ShrDescParam->cipherKey.size,
|
||||
p_ShrDescParam->cipherKey.p_Data,
|
||||
p_ShrDescParam->cipherAlg,
|
||||
p_EncapParam);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
t_Handle SEC_DCL_InitMacsecDecapShrDesc(t_Handle h_SecDcl,
|
||||
t_MacsecShrDescParam* p_ShrDescParam,
|
||||
t_MacsecDecapParam* p_DecapParam)
|
||||
{
|
||||
t_SecDcl* p_SecDcl = (t_SecDcl*)h_SecDcl;
|
||||
|
||||
uint32_t length;
|
||||
uint32_t buffer[MAX_DESC_LENGTH];
|
||||
/* Using MAX_DESC_LENGTH instead of MaxShrDescLen in order to keep it simple */
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecDcl,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_ShrDescParam,E_NULL_POINTER);
|
||||
SANITY_CHECK_EXIT(p_DecapParam,E_NULL_POINTER);
|
||||
|
||||
length = InitMacsecDecapShrDesc(buffer,
|
||||
p_SecDcl->ptrSize,
|
||||
p_ShrDescParam->dataMoveSize,
|
||||
p_ShrDescParam->cipherKey.imm,
|
||||
p_ShrDescParam->cipherKey.size,
|
||||
p_ShrDescParam->cipherKey.p_Data,
|
||||
p_ShrDescParam->cipherAlg,
|
||||
p_DecapParam);
|
||||
|
||||
return CreateDescObject(p_SecDcl,length,buffer);
|
||||
}
|
||||
|
||||
|
||||
uint8_t* SEC_DCL_GetDescPrefix(t_Handle h_Desc)
|
||||
{
|
||||
t_Desc* p_Desc = (t_Desc*)h_Desc;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Desc,E_INVALID_HANDLE);
|
||||
|
||||
return p_Desc->p_Prefix;
|
||||
}
|
||||
|
||||
|
||||
uint8_t* SEC_DCL_GetDescBuffer(t_Handle h_Desc)
|
||||
{
|
||||
t_Desc* p_Desc = (t_Desc*)h_Desc;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Desc,E_INVALID_HANDLE);
|
||||
|
||||
return p_Desc->p_Buffer;
|
||||
}
|
||||
|
||||
|
||||
uint8_t* SEC_DCL_GetDescPostfix(t_Handle h_Desc)
|
||||
{
|
||||
t_Desc* p_Desc = (t_Desc*)h_Desc;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Desc,E_INVALID_HANDLE);
|
||||
|
||||
return p_Desc->p_Postfix;
|
||||
}
|
||||
|
||||
|
||||
uint32_t SEC_DCL_GetBufferSize(t_Handle h_Desc)
|
||||
{
|
||||
t_Desc* p_Desc = (t_Desc*)h_Desc;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Desc,E_INVALID_HANDLE);
|
||||
|
||||
return p_Desc->bufferSize;
|
||||
}
|
||||
|
||||
|
||||
void SEC_DCL_FreeDesc(t_Handle h_Desc)
|
||||
{
|
||||
t_Desc* p_Desc = (t_Desc*)h_Desc;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Desc,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Desc->p_Mem,E_INVALID_STATE);
|
||||
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
/* Use pre allocated buffer pools for increased performance */
|
||||
/* Return to pre-allocated buffer pool*/
|
||||
MEM_Put(p_Desc->h_SecMemSmart, p_Desc->p_Mem);
|
||||
MEM_Put(p_Desc->h_SecMem, p_Desc);
|
||||
#else
|
||||
XX_FreeSmart(p_Desc->p_Mem);
|
||||
#ifdef SEC4_USE_QI
|
||||
XX_FreeSmart(p_Desc);
|
||||
#else
|
||||
XX_Free(p_Desc);
|
||||
#endif
|
||||
#endif
|
||||
/* wind river end */
|
||||
}
|
||||
|
||||
|
||||
/* Runtime Control Unit (above) */
|
||||
/********************************/
|
||||
|
||||
|
||||
/*****************************/
|
||||
/* Internal Routines (below) */
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_SecDcl* p_SecDcl)
|
||||
{
|
||||
if (p_SecDcl->p_DriverParam->h_Sec == NULL)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_HANDLE,("SEC object"));
|
||||
|
||||
if (p_SecDcl->p_DriverParam->alignment % sizeof(uint32_t))
|
||||
RETURN_ERROR(MAJOR,E_INVALID_VALUE,("Descriptor buffer alignment must a multiple of %u",sizeof(uint32_t)));
|
||||
|
||||
if (!IN_RANGE(MIN_VAL_alignment,p_SecDcl->p_DriverParam->alignment,MAX_VAL_alignment))
|
||||
RETURN_ERROR(MAJOR,E_NOT_IN_RANGE,("Descriptor buffer alignment must be between %u and %u",MIN_VAL_alignment,MAX_VAL_alignment));
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
/* static */ /* wind river */
|
||||
t_Handle CreateDescObject(t_SecDcl* p_SecDcl,uint32_t length,uint32_t* p_Buffer)
|
||||
{
|
||||
t_Desc* p_Desc;
|
||||
|
||||
int memId = p_SecDcl->memId ;
|
||||
uint32_t alignment = p_SecDcl->alignment ;
|
||||
uint32_t prefixSize = p_SecDcl->prefixSize ;
|
||||
uint32_t postfixSize = p_SecDcl->postfixSize;
|
||||
|
||||
uint32_t bufferSize = length*sizeof(uint32_t);
|
||||
uint32_t newAlignment = DIV_CEIL(prefixSize,alignment)*alignment;
|
||||
/* [newAlignment >= prefixSize] AND [newAlignment == N*alignment] */
|
||||
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
t_Handle h_Mem;
|
||||
/* Use pre allocated buffers for increased performance */
|
||||
#ifdef SEC4_USE_QI
|
||||
/* Allocate job descriptor objects from shared memory as well so that any core can release it
|
||||
* E.g. shared descriptors */
|
||||
p_Desc = MEM_Get(p_SecDcl->h_SecMemSmart);
|
||||
h_Mem = p_SecDcl->h_SecMemSmart;
|
||||
#else
|
||||
p_Desc = MEM_Get(p_SecDcl->h_SecMem);
|
||||
h_Mem = p_SecDcl->h_SecMem;
|
||||
#endif /* #ifdef SEC4_USE_QI */
|
||||
|
||||
#else
|
||||
#ifdef SEC4_USE_QI
|
||||
/* Allocate job descriptor objects from shared memory as well so that any core can release it
|
||||
* E.g. shared descriptors */
|
||||
p_Desc = XX_MallocSmart(sizeof(t_Desc), memId, alignment);
|
||||
#else
|
||||
p_Desc = XX_Malloc(sizeof(t_Desc));
|
||||
#endif /* #ifdef SEC4_USE_QI */
|
||||
#endif /* #ifdef SEC4_PREALLOC_DESC_BUF */
|
||||
/* wind river end */
|
||||
if (p_Desc == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Descriptor object"));
|
||||
return NULL;
|
||||
}
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
p_Desc->h_SecMem = h_Mem;
|
||||
#endif /* #ifdef SEC4_PREALLOC_DESC_BUF */
|
||||
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
/* Use pre allocated buffers for increased performance */
|
||||
p_Desc->p_Mem = MEM_Get(p_SecDcl->h_SecMemSmart);
|
||||
h_Mem = p_SecDcl->h_SecMemSmart;
|
||||
#else
|
||||
p_Desc->p_Mem = XX_MallocSmart(newAlignment+bufferSize+postfixSize,memId,newAlignment);
|
||||
#endif
|
||||
/* wind river end */
|
||||
if (p_Desc->p_Mem == NULL)
|
||||
{
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
MEM_Put(p_SecDcl->h_SecMem, p_Desc);
|
||||
#else
|
||||
XX_Free(p_Desc);
|
||||
#endif
|
||||
/* wind river end */
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Descriptor buffer"));
|
||||
return NULL;
|
||||
}
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
p_Desc->h_SecMemSmart = h_Mem;
|
||||
#endif
|
||||
/* wind river end */
|
||||
|
||||
p_Desc->p_Prefix = p_Desc->p_Mem+newAlignment-prefixSize;
|
||||
p_Desc->p_Buffer = p_Desc->p_Mem+newAlignment;
|
||||
p_Desc->p_Postfix = p_Desc->p_Mem+newAlignment+bufferSize;
|
||||
|
||||
p_Desc->bufferSize = bufferSize;
|
||||
memcpy(p_Desc->p_Buffer,p_Buffer,bufferSize);
|
||||
|
||||
return (t_Handle)p_Desc;
|
||||
}
|
||||
|
||||
|
||||
/* Internal Routines (above) */
|
||||
/*****************************/
|
||||
@@ -0,0 +1,83 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __SEC_DCL_H
|
||||
#define __SEC_DCL_H
|
||||
|
||||
|
||||
#include "sec_dcl_ext.h"
|
||||
|
||||
|
||||
typedef struct t_SecDclDriverParam
|
||||
{
|
||||
t_Handle h_Sec ; /* SEC object */
|
||||
int memId ; /* Memory partition ID */
|
||||
uint32_t alignment ; /* Alignment of each descriptor buffer */
|
||||
uint32_t prefixSize ; /* Size of data preceding each descriptor buffer */
|
||||
uint32_t postfixSize; /* Size of data succeeding each descriptor buffer */
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
uint32_t noofBuf ; /* Number of allocated descriptor objects */
|
||||
uint32_t descSize ; /* Size of data for descriptor objects */
|
||||
uint32_t descBufSize; /* Size of data for descriptor buffers */
|
||||
#endif
|
||||
/* wind river end */
|
||||
}
|
||||
t_SecDclDriverParam;
|
||||
|
||||
|
||||
typedef struct t_SecDcl
|
||||
{
|
||||
t_SecDclDriverParam* p_DriverParam; /* Driver parameters */
|
||||
|
||||
uint32_t ptrSize ; /* SEC pointer size */
|
||||
int memId ; /* Memory partition ID */
|
||||
uint32_t alignment ; /* Alignment of each descriptor buffer */
|
||||
uint32_t prefixSize ; /* Size of data preceding each descriptor buffer */
|
||||
uint32_t postfixSize; /* Size of data succeeding each descriptor buffer */
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
uint32_t noofBuf ; /* Number of allocated descriptor objects */
|
||||
uint32_t descSize ; /* Size of data for descriptor objects */
|
||||
uint32_t descBufSize; /* Size of data for descriptor buffers */
|
||||
t_Handle h_SecMem ; /* Handle for pre-allocated memory for descriptor objects */
|
||||
t_Handle h_SecMemSmart; /* Handle for pre-allocated memory for descriptor buffers */
|
||||
#endif
|
||||
/* wind river end */
|
||||
}
|
||||
t_SecDcl;
|
||||
|
||||
|
||||
typedef struct t_Desc
|
||||
{
|
||||
uint8_t* p_Mem ; /* Pointer to allocated memory */
|
||||
uint8_t* p_Prefix ; /* Pointer to data preceding the descriptor buffer */
|
||||
uint8_t* p_Buffer ; /* Pointer to the descriptor buffer */
|
||||
uint8_t* p_Postfix ; /* Pointer to data succeeding the descriptor buffer */
|
||||
uint32_t bufferSize; /* Size of the descriptor buffer */
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
t_Handle h_SecMem ; /* Handle for pre-allocated memory for descriptor objects */
|
||||
t_Handle h_SecMemSmart; /* Handle for pre-allocated memory for descriptor buffers */
|
||||
#endif
|
||||
/* wind river end */
|
||||
}
|
||||
t_Desc;
|
||||
|
||||
/* wind river start */
|
||||
t_Handle CreateDescObject(t_SecDcl* p_SecDcl,uint32_t length,uint32_t* p_Buffer);
|
||||
/* wind river end */
|
||||
|
||||
#define MIN_VAL_alignment 4
|
||||
#define MAX_VAL_alignment 256
|
||||
|
||||
|
||||
#endif /* __SEC_DCL_H */
|
||||
@@ -0,0 +1,774 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/* Include the internal definitions of this module */
|
||||
#include "sec_dcl_api.h"
|
||||
#include "sec_dcl_cmd.h"
|
||||
|
||||
|
||||
/* Include the external interfaces of other modules */
|
||||
#include "error_ext.h"
|
||||
#include "string_ext.h"
|
||||
|
||||
|
||||
#define EXIT_IF(cond) ASSERT_COND(!(cond))
|
||||
#define KEY_IMM_IF(cond) (uint32_t)((cond)? KEY_IMM:0)
|
||||
|
||||
|
||||
static inline uint32_t CalcSplitKeyCmdFlags(e_SplitKeyHashAlg hashAlg);
|
||||
|
||||
|
||||
static inline uint32_t CalcIpsecCmdFlags(uint32_t initFlags,
|
||||
e_IpsecCryptoAlg cryptoAlg,
|
||||
e_IpsecAuthenAlg authenAlg);
|
||||
|
||||
|
||||
static inline uint32_t CalcDtlsCmdFlags(uint32_t initFlags,
|
||||
e_DtlsCipherAlg cipherAlg);
|
||||
|
||||
|
||||
static inline uint32_t CalcMacsecCmdFlags(uint32_t initFlags,
|
||||
e_MacsecCipherAlg cipherAlg);
|
||||
|
||||
|
||||
static inline void InsertDataMoveCommands(t_DescHandle* p_DescHandle,
|
||||
uint32_t dataMoveSize);
|
||||
|
||||
|
||||
static inline void InsertNopCommands(t_DescHandle* p_DescHandle,
|
||||
uint32_t numOfCommands);
|
||||
|
||||
|
||||
uint32_t MaxJobDescLen()
|
||||
{
|
||||
return MAX_DESC_LENGTH;
|
||||
}
|
||||
|
||||
|
||||
uint32_t MaxShrDescLen(uint32_t ptrSize)
|
||||
{
|
||||
return MAX_DESC_LENGTH-1-ptrSize/sizeof(uint32_t);
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitSeqJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t* p_ShrDesc,
|
||||
bool inputSeqSgt,
|
||||
uint32_t inputSeqSize,
|
||||
uint8_t* p_InputSeqData,
|
||||
bool outputSeqSgt,
|
||||
uint32_t outputSeqSize,
|
||||
uint8_t* p_OutputSeqData)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t cmdFlags;
|
||||
|
||||
cmdFlags = JOB_DESC_HDR_REO|JOB_DESC_HDR_SHARE_DEFER;
|
||||
CmdInsertJobDescRefShrHdr(&descHandle,cmdFlags,p_ShrDesc);
|
||||
|
||||
cmdFlags = (uint32_t)(outputSeqSgt? SEQ_OUT_PTR_SGT:NO_CMD_FLAGS);
|
||||
CmdInsertSeqOutPtr(&descHandle,cmdFlags,outputSeqSize,p_OutputSeqData);
|
||||
|
||||
cmdFlags = (uint32_t)(inputSeqSgt? SEQ_IN_PTR_SGT:NO_CMD_FLAGS);
|
||||
CmdInsertSeqInPtr(&descHandle,cmdFlags,inputSeqSize,p_InputSeqData);
|
||||
|
||||
CloseJobDescRefShr(&descHandle,p_ShrDesc);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitSplitKeyJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint8_t* p_InputKey,
|
||||
uint8_t* p_OutputKey,
|
||||
e_SplitKeyHashAlg hashAlg)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t inputSize [] = {16,20,28,32, 48, 64};
|
||||
uint32_t outputSize[] = {32,40,64,64,128,128};
|
||||
|
||||
uint32_t cmdFlags;
|
||||
uint32_t startIndex;
|
||||
|
||||
cmdFlags = JOB_DESC_HDR_SHARE_NEVER;
|
||||
CmdInsertJobDescHdr(&descHandle,cmdFlags);
|
||||
|
||||
startIndex = descHandle.nextIndex;
|
||||
cmdFlags = KEY_CLASS_2_DST_REGISTER;
|
||||
CmdInsertKey(&descHandle,cmdFlags,inputSize[hashAlg],p_InputKey);
|
||||
|
||||
cmdFlags = CalcSplitKeyCmdFlags(hashAlg);
|
||||
CmdInsertAlgOperation(&descHandle,cmdFlags);
|
||||
|
||||
/* FIFO load of 0 bytes in order to kickstart MDHA */
|
||||
cmdFlags = FIFO_LOAD_CTYPE|FIFO_LOAD_CLASS_2_TYPE_MSG_L2|FIFO_LOAD_IMM;
|
||||
CmdInsertAnything(&descHandle,cmdFlags);
|
||||
|
||||
cmdFlags = FIFO_STORE_CLASS_2_TYPE_MDHA_SPLIT_ECB_JKEK;
|
||||
CmdInsertFifoStore(&descHandle,cmdFlags,outputSize[hashAlg],p_OutputKey);
|
||||
|
||||
CloseJobDesc(&descHandle,startIndex);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitIpsecEncapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_IpsecCryptoAlg cryptoAlg,
|
||||
e_IpsecAuthenAlg authenAlg,
|
||||
t_IpsecEncapParam* p_Param)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t cmdFlags;
|
||||
uint32_t startIndex;
|
||||
uint32_t jumpCmdIndex;
|
||||
|
||||
t_IpsecEncapPdb pdb;
|
||||
memset(&pdb,0,sizeof(pdb));
|
||||
|
||||
pdb.nextHdr = p_Param->nextHdr ;
|
||||
pdb.nhOffset = p_Param->nhOffset;
|
||||
pdb.seqNum = p_Param->seqNum ;
|
||||
pdb.spi = p_Param->spi ;
|
||||
pdb.ipHdrLen = p_Param->ipHdrLen;
|
||||
|
||||
if (p_Param->copyDf)
|
||||
pdb.nextHdr |= IPSEC_ENCAP_HMO_DFC;
|
||||
if (p_Param->decTtl)
|
||||
pdb.nextHdr |= IPSEC_ENCAP_HMO_DTTL;
|
||||
if (p_Param->enCksm)
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_CKSM;
|
||||
if (p_Param->copyDs)
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_DSC;
|
||||
if (p_Param->randIv)
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_IVSRC;
|
||||
if (p_Param->extSeqNum)
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_ESN;
|
||||
|
||||
switch (p_Param->ipsecVer)
|
||||
{
|
||||
case e_IPSEC_VER_4:
|
||||
break;
|
||||
case e_IPSEC_VER_6:
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_IPV6;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (p_Param->ipsecHdr)
|
||||
{
|
||||
case e_IPSEC_HDR_NONE:
|
||||
break;
|
||||
case e_IPSEC_HDR_IN_FRAME:
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_INC;
|
||||
break;
|
||||
case e_IPSEC_HDR_IN_PARAM:
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_INC;
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_SRC;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (p_Param->ipsecMode)
|
||||
{
|
||||
case e_IPSEC_MODE_TRANSPORT:
|
||||
break;
|
||||
case e_IPSEC_MODE_TUNNEL:
|
||||
pdb.options |= IPSEC_ENCAP_OPTION_TUNNEL;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (p_Param->ipsecType)
|
||||
{
|
||||
case e_IPSEC_TYPE_CBC:
|
||||
memcpy((void*)pdb.alg.cbc.iv,p_Param->alg.cbc.iv,16);
|
||||
break;
|
||||
case e_IPSEC_TYPE_CTR:
|
||||
pdb.alg.ctr.nonce = p_Param->alg.ctr.nonce ;
|
||||
pdb.alg.ctr.initCount = p_Param->alg.ctr.initCount;
|
||||
memcpy((void*)pdb.alg.ctr.iv,p_Param->alg.ctr.iv,8);
|
||||
break;
|
||||
case e_IPSEC_TYPE_CCM:
|
||||
pdb.alg.ccm.salt = p_Param->alg.ccm.salt ;
|
||||
pdb.alg.ccm.b0Flags = p_Param->alg.ccm.b0Flags ;
|
||||
pdb.alg.ccm.ctrFlags = p_Param->alg.ccm.ctrFlags ;
|
||||
pdb.alg.ccm.initCount = p_Param->alg.ccm.initCount;
|
||||
memcpy((void*)pdb.alg.ccm.iv,p_Param->alg.ccm.iv,8);
|
||||
break;
|
||||
case e_IPSEC_TYPE_GCM:
|
||||
pdb.alg.gcm.salt = p_Param->alg.gcm.salt;
|
||||
memcpy((void*)pdb.alg.gcm.iv,p_Param->alg.gcm.iv,8);
|
||||
break;
|
||||
}
|
||||
|
||||
EXIT_IF(p_Param->ipsecMode==e_IPSEC_MODE_TUNNEL && p_Param->nhOffset!=0);
|
||||
EXIT_IF(p_Param->extSeqNum==FALSE && p_Param->seqNum>=0x00000000FFFFFFFFLL);
|
||||
EXIT_IF(p_Param->extSeqNum!=FALSE && p_Param->seqNum==0xFFFFFFFFFFFFFFFFLL);
|
||||
EXIT_IF(p_Param->ipsecHdr==e_IPSEC_HDR_NONE && (p_Param->ipHdrLen!=0 || p_Param->p_IpHdr!=NULL));
|
||||
EXIT_IF(p_Param->ipsecHdr==e_IPSEC_HDR_IN_FRAME && (p_Param->ipHdrLen==0 || p_Param->p_IpHdr!=NULL));
|
||||
EXIT_IF(p_Param->ipsecHdr==e_IPSEC_HDR_IN_PARAM && (p_Param->ipHdrLen==0 || p_Param->p_IpHdr==NULL));
|
||||
|
||||
cmdFlags = SHR_DESC_HDR_SC|SHR_DESC_HDR_SHARE_SERIAL;
|
||||
CmdInsertShrDescHdr(&descHandle,cmdFlags);
|
||||
|
||||
CmdInsertDataBlock(&descHandle,sizeof(pdb),(uint8_t*)&pdb);
|
||||
if (p_Param->ipsecHdr == e_IPSEC_HDR_IN_PARAM)
|
||||
CmdInsertDataBlock(&descHandle,p_Param->ipHdrLen,p_Param->p_IpHdr);
|
||||
|
||||
startIndex = descHandle.nextIndex;
|
||||
if (dataMoveSize > 0)
|
||||
InsertDataMoveCommands(&descHandle,dataMoveSize);
|
||||
|
||||
jumpCmdIndex = descHandle.nextIndex;
|
||||
cmdFlags = JUMP_CLASS_BOTH|JUMP_SL_1|JUMP_TEST_ALL_MATCH|JUMP_COND_SL_1_SHRD;
|
||||
CmdInsertLocalJump(&descHandle,cmdFlags);
|
||||
|
||||
cmdFlags = KEY_CLASS_2_DST_REGISTER|KEY_IMM_IF(authenKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,authenKeySize,p_AuthenKeyData);
|
||||
|
||||
cmdFlags = KEY_CLASS_1_DST_REGISTER|KEY_IMM_IF(cryptoKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,cryptoKeySize,p_CryptoKeyData);
|
||||
|
||||
CmdUpdateLocalJump(&descHandle,jumpCmdIndex);
|
||||
|
||||
cmdFlags = CalcIpsecCmdFlags(PCL_OP_TYPE_ENCAP_ID_IPSEC,cryptoAlg,authenAlg);
|
||||
CmdInsertPclOperation(&descHandle,cmdFlags);
|
||||
|
||||
CloseShrDesc(&descHandle,startIndex);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitIpsecDecapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_IpsecCryptoAlg cryptoAlg,
|
||||
e_IpsecAuthenAlg authenAlg,
|
||||
t_IpsecDecapParam* p_Param)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t cmdFlags;
|
||||
uint32_t startIndex;
|
||||
uint32_t jumpCmdIndex;
|
||||
|
||||
t_IpsecDecapPdb pdb;
|
||||
memset(&pdb,0,sizeof(pdb));
|
||||
|
||||
pdb.ipHdrLen = p_Param->ipHdrLen;
|
||||
pdb.nhOffset = p_Param->nhOffset;
|
||||
pdb.seqNum = p_Param->seqNum ;
|
||||
|
||||
if (p_Param->decTtl)
|
||||
pdb.ipHdrLen |= IPSEC_DECAP_HMO_DTTL;
|
||||
if (p_Param->copyDs)
|
||||
pdb.ipHdrLen |= IPSEC_DECAP_HMO_DSC;
|
||||
if (p_Param->enCksm)
|
||||
pdb.options |= IPSEC_DECAP_OPTION_CKSM;
|
||||
if (p_Param->extSeqNum)
|
||||
pdb.options |= IPSEC_DECAP_OPTION_ESN;
|
||||
if (p_Param->outFmt)
|
||||
pdb.options |= IPSEC_DECAP_OPTION_FMT;
|
||||
|
||||
switch (p_Param->ipsecArs)
|
||||
{
|
||||
case e_IPSEC_ARS_0:
|
||||
break;
|
||||
case e_IPSEC_ARS_32:
|
||||
pdb.options |= IPSEC_DECAP_OPTION_ARS32;
|
||||
break;
|
||||
case e_IPSEC_ARS_64:
|
||||
pdb.options |= IPSEC_DECAP_OPTION_ARS64;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (p_Param->ipsecVer)
|
||||
{
|
||||
case e_IPSEC_VER_4:
|
||||
break;
|
||||
case e_IPSEC_VER_6:
|
||||
pdb.options |= IPSEC_DECAP_OPTION_IPV6;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (p_Param->ipsecMode)
|
||||
{
|
||||
case e_IPSEC_MODE_TRANSPORT:
|
||||
break;
|
||||
case e_IPSEC_MODE_TUNNEL:
|
||||
pdb.options |= IPSEC_DECAP_OPTION_TUNNEL;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (p_Param->ipsecType)
|
||||
{
|
||||
case e_IPSEC_TYPE_CBC:
|
||||
break;
|
||||
case e_IPSEC_TYPE_CTR:
|
||||
pdb.alg.ctr.salt = p_Param->alg.ctr.salt ;
|
||||
pdb.alg.ctr.initCount = p_Param->alg.ctr.initCount;
|
||||
break;
|
||||
case e_IPSEC_TYPE_CCM:
|
||||
pdb.alg.ccm.salt = p_Param->alg.ccm.salt ;
|
||||
pdb.alg.ccm.ivFlags = p_Param->alg.ccm.ivFlags ;
|
||||
pdb.alg.ccm.ctrFlags = p_Param->alg.ccm.ctrFlags ;
|
||||
pdb.alg.ccm.initCount = p_Param->alg.ccm.initCount;
|
||||
break;
|
||||
case e_IPSEC_TYPE_GCM:
|
||||
pdb.alg.gcm.salt = p_Param->alg.gcm.salt;
|
||||
break;
|
||||
}
|
||||
|
||||
EXIT_IF(p_Param->ipsecMode==e_IPSEC_MODE_TUNNEL && p_Param->nhOffset!=0);
|
||||
EXIT_IF(p_Param->extSeqNum==FALSE && p_Param->seqNum>=0x00000000FFFFFFFFLL);
|
||||
EXIT_IF(p_Param->extSeqNum!=FALSE && p_Param->seqNum==0xFFFFFFFFFFFFFFFFLL);
|
||||
|
||||
cmdFlags = SHR_DESC_HDR_SC|SHR_DESC_HDR_SHARE_SERIAL;
|
||||
CmdInsertShrDescHdr(&descHandle,cmdFlags);
|
||||
|
||||
CmdInsertDataBlock(&descHandle,sizeof(pdb),(uint8_t*)&pdb);
|
||||
|
||||
startIndex = descHandle.nextIndex;
|
||||
if (dataMoveSize > 0)
|
||||
InsertDataMoveCommands(&descHandle,dataMoveSize);
|
||||
|
||||
jumpCmdIndex = descHandle.nextIndex;
|
||||
cmdFlags = JUMP_CLASS_BOTH|JUMP_SL_1|JUMP_TEST_ALL_MATCH|JUMP_COND_SL_1_SHRD;
|
||||
CmdInsertLocalJump(&descHandle,cmdFlags);
|
||||
|
||||
cmdFlags = KEY_CLASS_2_DST_REGISTER|KEY_IMM_IF(authenKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,authenKeySize,p_AuthenKeyData);
|
||||
|
||||
cmdFlags = KEY_CLASS_1_DST_REGISTER|KEY_IMM_IF(cryptoKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,cryptoKeySize,p_CryptoKeyData);
|
||||
|
||||
CmdUpdateLocalJump(&descHandle,jumpCmdIndex);
|
||||
|
||||
cmdFlags = CalcIpsecCmdFlags(PCL_OP_TYPE_DECAP_ID_IPSEC,cryptoAlg,authenAlg);
|
||||
CmdInsertPclOperation(&descHandle,cmdFlags);
|
||||
|
||||
CloseShrDesc(&descHandle,startIndex);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitDtlsEncapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_DtlsCipherAlg cipherAlg,
|
||||
t_DtlsEncapParam* p_Param)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t cmdFlags;
|
||||
uint32_t startIndex;
|
||||
uint32_t jumpCmdIndex;
|
||||
|
||||
t_DtlsEncapPdb pdb;
|
||||
memset(&pdb,0,sizeof(pdb));
|
||||
|
||||
pdb.type = p_Param->type ;
|
||||
pdb.version = p_Param->version;
|
||||
pdb.epoch = p_Param->epoch ;
|
||||
|
||||
if (p_Param->wbIv)
|
||||
pdb.options |= DTLS_ENCAP_OPTION_W_B;
|
||||
if (p_Param->expIv)
|
||||
pdb.options |= DTLS_ENCAP_OPTION_E_I;
|
||||
|
||||
pdb.seqNum1 = DTLS_ENCAP_SEQ_NUM_1(p_Param->seqNum);
|
||||
pdb.seqNum2 = DTLS_ENCAP_SEQ_NUM_2(p_Param->seqNum);
|
||||
|
||||
memcpy((void*)pdb.iv,p_Param->iv,16);
|
||||
|
||||
EXIT_IF(p_Param->seqNum >= 0x0000FFFFFFFFFFFFLL);
|
||||
|
||||
cmdFlags = SHR_DESC_HDR_SC|SHR_DESC_HDR_SHARE_SERIAL;
|
||||
CmdInsertShrDescHdr(&descHandle,cmdFlags);
|
||||
|
||||
CmdInsertDataBlock(&descHandle,sizeof(pdb),(uint8_t*)&pdb);
|
||||
|
||||
startIndex = descHandle.nextIndex;
|
||||
if (dataMoveSize > 0)
|
||||
InsertDataMoveCommands(&descHandle,dataMoveSize);
|
||||
|
||||
jumpCmdIndex = descHandle.nextIndex;
|
||||
cmdFlags = JUMP_CLASS_BOTH|JUMP_SL_1|JUMP_TEST_ALL_MATCH|JUMP_COND_SL_1_SHRD;
|
||||
CmdInsertLocalJump(&descHandle,cmdFlags);
|
||||
|
||||
cmdFlags = KEY_CLASS_2_DST_REGISTER|KEY_IMM_IF(authenKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,authenKeySize,p_AuthenKeyData);
|
||||
|
||||
cmdFlags = KEY_CLASS_1_DST_REGISTER|KEY_IMM_IF(cryptoKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,cryptoKeySize,p_CryptoKeyData);
|
||||
|
||||
CmdUpdateLocalJump(&descHandle,jumpCmdIndex);
|
||||
|
||||
cmdFlags = CalcDtlsCmdFlags(PCL_OP_TYPE_ENCAP_ID_DTLS,cipherAlg);
|
||||
CmdInsertPclOperation(&descHandle,cmdFlags);
|
||||
|
||||
CloseShrDesc(&descHandle,startIndex);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitDtlsDecapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_DtlsCipherAlg cipherAlg,
|
||||
t_DtlsDecapParam* p_Param)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t cmdFlags;
|
||||
uint32_t startIndex;
|
||||
uint32_t jumpCmdIndex;
|
||||
|
||||
t_DtlsDecapPdb pdb;
|
||||
memset(&pdb,0,sizeof(pdb));
|
||||
|
||||
pdb.epoch = p_Param->epoch;
|
||||
|
||||
if (p_Param->wbIv)
|
||||
pdb.options |= DTLS_DECAP_OPTION_W_B;
|
||||
if (p_Param->expIv)
|
||||
pdb.options |= DTLS_DECAP_OPTION_E_I;
|
||||
|
||||
pdb.seqNum1 = DTLS_DECAP_SEQ_NUM_1(p_Param->seqNum);
|
||||
pdb.seqNum2 = DTLS_DECAP_SEQ_NUM_2(p_Param->seqNum);
|
||||
|
||||
memcpy((void*)pdb.iv,p_Param->iv,16);
|
||||
|
||||
switch (p_Param->dtlsArs)
|
||||
{
|
||||
case e_DTLS_ARS_0:
|
||||
break;
|
||||
case e_DTLS_ARS_32:
|
||||
pdb.options |= DTLS_DECAP_OPTION_ARS32;
|
||||
break;
|
||||
case e_DTLS_ARS_64:
|
||||
pdb.options |= DTLS_DECAP_OPTION_ARS64;
|
||||
break;
|
||||
}
|
||||
|
||||
EXIT_IF(p_Param->seqNum >= 0x0000FFFFFFFFFFFFLL);
|
||||
|
||||
cmdFlags = SHR_DESC_HDR_SC|SHR_DESC_HDR_SHARE_SERIAL;
|
||||
CmdInsertShrDescHdr(&descHandle,cmdFlags);
|
||||
|
||||
CmdInsertDataBlock(&descHandle,sizeof(pdb),(uint8_t*)&pdb);
|
||||
|
||||
startIndex = descHandle.nextIndex;
|
||||
if (dataMoveSize > 0)
|
||||
InsertDataMoveCommands(&descHandle,dataMoveSize);
|
||||
|
||||
jumpCmdIndex = descHandle.nextIndex;
|
||||
cmdFlags = JUMP_CLASS_BOTH|JUMP_SL_1|JUMP_TEST_ALL_MATCH|JUMP_COND_SL_1_SHRD;
|
||||
CmdInsertLocalJump(&descHandle,cmdFlags);
|
||||
|
||||
cmdFlags = KEY_CLASS_2_DST_REGISTER|KEY_IMM_IF(authenKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,authenKeySize,p_AuthenKeyData);
|
||||
|
||||
cmdFlags = KEY_CLASS_1_DST_REGISTER|KEY_IMM_IF(cryptoKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,cryptoKeySize,p_CryptoKeyData);
|
||||
|
||||
CmdUpdateLocalJump(&descHandle,jumpCmdIndex);
|
||||
|
||||
cmdFlags = CalcDtlsCmdFlags(PCL_OP_TYPE_DECAP_ID_DTLS,cipherAlg);
|
||||
CmdInsertPclOperation(&descHandle,cmdFlags);
|
||||
|
||||
CloseShrDesc(&descHandle,startIndex);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitMacsecEncapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cipherKeyImm,
|
||||
uint32_t cipherKeySize,
|
||||
uint8_t* p_CipherKeyData,
|
||||
e_MacsecCipherAlg cipherAlg,
|
||||
t_MacsecEncapParam* p_Param)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t cmdFlags;
|
||||
uint32_t startIndex;
|
||||
uint32_t jumpCmdIndex;
|
||||
|
||||
t_MacsecEncapPdb pdb;
|
||||
memset(&pdb,0,sizeof(pdb));
|
||||
|
||||
pdb.aadLength = p_Param->aadLength;
|
||||
pdb.sci = p_Param->sci ;
|
||||
pdb.etherType = p_Param->etherType;
|
||||
pdb.tciAn = p_Param->tciAn ;
|
||||
pdb.pn = p_Param->pn ;
|
||||
|
||||
cmdFlags = SHR_DESC_HDR_SC|SHR_DESC_HDR_SHARE_SERIAL;
|
||||
CmdInsertShrDescHdr(&descHandle,cmdFlags);
|
||||
|
||||
CmdInsertDataBlock(&descHandle,sizeof(pdb),(uint8_t*)&pdb);
|
||||
|
||||
startIndex = descHandle.nextIndex;
|
||||
if (dataMoveSize > 0)
|
||||
InsertDataMoveCommands(&descHandle,dataMoveSize);
|
||||
|
||||
jumpCmdIndex = descHandle.nextIndex;
|
||||
cmdFlags = JUMP_CLASS_1|JUMP_SL_1|JUMP_TEST_ALL_MATCH|JUMP_COND_SL_1_SHRD;
|
||||
CmdInsertLocalJump(&descHandle,cmdFlags);
|
||||
|
||||
cmdFlags = KEY_CLASS_1_DST_REGISTER|KEY_IMM_IF(cipherKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,cipherKeySize,p_CipherKeyData);
|
||||
|
||||
CmdUpdateLocalJump(&descHandle,jumpCmdIndex);
|
||||
|
||||
cmdFlags = CalcMacsecCmdFlags(PCL_OP_TYPE_ENCAP_ID_MACSEC,cipherAlg);
|
||||
CmdInsertPclOperation(&descHandle,cmdFlags);
|
||||
|
||||
CloseShrDesc(&descHandle,startIndex);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
uint32_t InitMacsecDecapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cipherKeyImm,
|
||||
uint32_t cipherKeySize,
|
||||
uint8_t* p_CipherKeyData,
|
||||
e_MacsecCipherAlg cipherAlg,
|
||||
t_MacsecDecapParam* p_Param)
|
||||
{
|
||||
t_DescHandle descHandle = NewDescHandle(p_Desc,ptrSize);
|
||||
|
||||
uint32_t cmdFlags;
|
||||
uint32_t startIndex;
|
||||
uint32_t jumpCmdIndex;
|
||||
|
||||
t_MacsecDecapPdb pdb;
|
||||
memset(&pdb,0,sizeof(pdb));
|
||||
|
||||
pdb.aadLength = p_Param->aadLength;
|
||||
pdb.sci = p_Param->sci ;
|
||||
pdb.arLen = p_Param->arLen ;
|
||||
pdb.pn = p_Param->pn ;
|
||||
|
||||
if (p_Param->enAr)
|
||||
pdb.options |= MACSEC_DECAP_OPTION_AR;
|
||||
|
||||
cmdFlags = SHR_DESC_HDR_SC|SHR_DESC_HDR_SHARE_SERIAL;
|
||||
CmdInsertShrDescHdr(&descHandle,cmdFlags);
|
||||
|
||||
CmdInsertDataBlock(&descHandle,sizeof(pdb),(uint8_t*)&pdb);
|
||||
|
||||
startIndex = descHandle.nextIndex;
|
||||
if (dataMoveSize > 0)
|
||||
InsertDataMoveCommands(&descHandle,dataMoveSize);
|
||||
|
||||
jumpCmdIndex = descHandle.nextIndex;
|
||||
cmdFlags = JUMP_CLASS_1|JUMP_SL_1|JUMP_TEST_ALL_MATCH|JUMP_COND_SL_1_SHRD;
|
||||
CmdInsertLocalJump(&descHandle,cmdFlags);
|
||||
|
||||
cmdFlags = KEY_CLASS_1_DST_REGISTER|KEY_IMM_IF(cipherKeyImm);
|
||||
CmdInsertKey(&descHandle,cmdFlags,cipherKeySize,p_CipherKeyData);
|
||||
|
||||
CmdUpdateLocalJump(&descHandle,jumpCmdIndex);
|
||||
|
||||
cmdFlags = CalcMacsecCmdFlags(PCL_OP_TYPE_DECAP_ID_MACSEC,cipherAlg);
|
||||
CmdInsertPclOperation(&descHandle,cmdFlags);
|
||||
|
||||
CloseShrDesc(&descHandle,startIndex);
|
||||
return descHandle.nextIndex;
|
||||
}
|
||||
|
||||
|
||||
static inline uint32_t CalcSplitKeyCmdFlags(e_SplitKeyHashAlg hashAlg)
|
||||
{
|
||||
uint32_t cmdFlags = ALG_OP_TYPE_CLASS_2|ALG_OP_AAI_MDS_SHA_HMAC|ALG_OP_AS_INIT|ALG_OP_DIR_DEC;
|
||||
|
||||
switch (hashAlg)
|
||||
{
|
||||
case e_SPLIT_KEY_HASH_ALG_MD5 : cmdFlags |= ALG_OP_ID_MD5 ; break;
|
||||
case e_SPLIT_KEY_HASH_ALG_SHA1 : cmdFlags |= ALG_OP_ID_SHA1 ; break;
|
||||
case e_SPLIT_KEY_HASH_ALG_SHA2_224: cmdFlags |= ALG_OP_ID_SHA2_224; break;
|
||||
case e_SPLIT_KEY_HASH_ALG_SHA2_256: cmdFlags |= ALG_OP_ID_SHA2_256; break;
|
||||
case e_SPLIT_KEY_HASH_ALG_SHA2_384: cmdFlags |= ALG_OP_ID_SHA2_384; break;
|
||||
case e_SPLIT_KEY_HASH_ALG_SHA2_512: cmdFlags |= ALG_OP_ID_SHA2_512; break;
|
||||
}
|
||||
|
||||
return cmdFlags;
|
||||
}
|
||||
|
||||
|
||||
static inline uint32_t CalcIpsecCmdFlags(uint32_t initFlags,
|
||||
e_IpsecCryptoAlg cryptoAlg,
|
||||
e_IpsecAuthenAlg authenAlg)
|
||||
{
|
||||
uint32_t cmdFlags = initFlags;
|
||||
|
||||
switch (cryptoAlg)
|
||||
{
|
||||
case e_IPSEC_CRYPTO_ALG_DES : cmdFlags |= PCL_OP_INFO_IPSEC_DES ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_3DES : cmdFlags |= PCL_OP_INFO_IPSEC_3DES ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_NULL_ENC : cmdFlags |= PCL_OP_INFO_IPSEC_NULL_ENC ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_CBC : cmdFlags |= PCL_OP_INFO_IPSEC_AES_CBC ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_CTR : cmdFlags |= PCL_OP_INFO_IPSEC_AES_CTR ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_CCM8 : cmdFlags |= PCL_OP_INFO_IPSEC_AES_CCM8 ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_CCM12: cmdFlags |= PCL_OP_INFO_IPSEC_AES_CCM12; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_CCM16: cmdFlags |= PCL_OP_INFO_IPSEC_AES_CCM16; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_GCM8 : cmdFlags |= PCL_OP_INFO_IPSEC_AES_GCM8 ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_GCM12: cmdFlags |= PCL_OP_INFO_IPSEC_AES_GCM12; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_GCM16: cmdFlags |= PCL_OP_INFO_IPSEC_AES_GCM16; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_GMAC : cmdFlags |= PCL_OP_INFO_IPSEC_AES_GMAC ; break;
|
||||
case e_IPSEC_CRYPTO_ALG_AES_XTS : cmdFlags |= PCL_OP_INFO_IPSEC_AES_XTS ; break;
|
||||
}
|
||||
|
||||
switch (authenAlg)
|
||||
{
|
||||
case e_IPSEC_AUTHEN_ALG_AES_CCM_GCM : cmdFlags |= PCL_OP_INFO_IPSEC_AES_CCM_GCM ; break;
|
||||
case e_IPSEC_AUTHEN_ALG_HMAC_MD5_96 : cmdFlags |= PCL_OP_INFO_IPSEC_HMAC_MD5_96 ; break;
|
||||
case e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96 : cmdFlags |= PCL_OP_INFO_IPSEC_HMAC_SHA1_96 ; break;
|
||||
case e_IPSEC_AUTHEN_ALG_AES_XCBC_MAC_96 : cmdFlags |= PCL_OP_INFO_IPSEC_AES_XCBC_MAC_96 ; break;
|
||||
case e_IPSEC_AUTHEN_ALG_HMAC_MD5_128 : cmdFlags |= PCL_OP_INFO_IPSEC_HMAC_MD5_128 ; break;
|
||||
case e_IPSEC_AUTHEN_ALG_HMAC_SHA1_160 : cmdFlags |= PCL_OP_INFO_IPSEC_HMAC_SHA1_160 ; break;
|
||||
case e_IPSEC_AUTHEN_ALG_AES_CMAC_96 : cmdFlags |= PCL_OP_INFO_IPSEC_AES_CMAC_96 ; break;
|
||||
case e_IPSEC_AUTHEN_ALG_HMAC_SHA2_256_128: cmdFlags |= PCL_OP_INFO_IPSEC_HMAC_SHA2_256_128; break;
|
||||
case e_IPSEC_AUTHEN_ALG_HMAC_SHA2_384_192: cmdFlags |= PCL_OP_INFO_IPSEC_HMAC_SHA2_384_192; break;
|
||||
case e_IPSEC_AUTHEN_ALG_HMAC_SHA2_512_256: cmdFlags |= PCL_OP_INFO_IPSEC_HMAC_SHA2_512_256; break;
|
||||
}
|
||||
|
||||
return cmdFlags;
|
||||
}
|
||||
|
||||
|
||||
static inline uint32_t CalcDtlsCmdFlags(uint32_t initFlags,
|
||||
e_DtlsCipherAlg cipherAlg)
|
||||
{
|
||||
uint32_t cmdFlags = initFlags;
|
||||
|
||||
switch (cipherAlg)
|
||||
{
|
||||
case e_DTLS_CIPHER_ALG_RC4_40_MD5 : cmdFlags |= PCL_OP_INFO_DTLS_RC4_40_MD5 ; break;
|
||||
case e_DTLS_CIPHER_ALG_RC4_128_MD5 : cmdFlags |= PCL_OP_INFO_DTLS_RC4_128_MD5 ; break;
|
||||
case e_DTLS_CIPHER_ALG_RC4_128_SHA : cmdFlags |= PCL_OP_INFO_DTLS_RC4_128_SHA ; break;
|
||||
case e_DTLS_CIPHER_ALG_DES40_CBC_SHA : cmdFlags |= PCL_OP_INFO_DTLS_DES40_CBC_SHA ; break;
|
||||
case e_DTLS_CIPHER_ALG_DES_CBC_SHA : cmdFlags |= PCL_OP_INFO_DTLS_DES_CBC_SHA ; break;
|
||||
case e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA : cmdFlags |= PCL_OP_INFO_DTLS_3DES_EDE_CBC_SHA ; break;
|
||||
case e_DTLS_CIPHER_ALG_DES_CBC_MD5 : cmdFlags |= PCL_OP_INFO_DTLS_DES_CBC_MD5 ; break;
|
||||
case e_DTLS_CIPHER_ALG_3DES_EDE_CBC_MD5 : cmdFlags |= PCL_OP_INFO_DTLS_3DES_EDE_CBC_MD5 ; break;
|
||||
case e_DTLS_CIPHER_ALG_RC4_40_SHA : cmdFlags |= PCL_OP_INFO_DTLS_RC4_40_SHA ; break;
|
||||
case e_DTLS_CIPHER_ALG_DES40_CBC_MD5 : cmdFlags |= PCL_OP_INFO_DTLS_DES40_CBC_MD5 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_128_CBC_SHA : cmdFlags |= PCL_OP_INFO_DTLS_AES_128_CBC_SHA ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_256_CBC_SHA : cmdFlags |= PCL_OP_INFO_DTLS_AES_256_CBC_SHA ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_256 : cmdFlags |= PCL_OP_INFO_DTLS_AES_128_CBC_SHA_256 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_256 : cmdFlags |= PCL_OP_INFO_DTLS_AES_256_CBC_SHA_256 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_160 : cmdFlags |= PCL_OP_INFO_DTLS_AES_192_CBC_SHA_160 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_384 : cmdFlags |= PCL_OP_INFO_DTLS_AES_192_CBC_SHA_384 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_224 : cmdFlags |= PCL_OP_INFO_DTLS_AES_192_CBC_SHA_224 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_512 : cmdFlags |= PCL_OP_INFO_DTLS_AES_192_CBC_SHA_512 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_256 : cmdFlags |= PCL_OP_INFO_DTLS_AES_192_CBC_SHA_256 ; break;
|
||||
case e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_160: cmdFlags |= PCL_OP_INFO_DTLS_3DES_EDE_CBC_SHA_160; break;
|
||||
case e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_384: cmdFlags |= PCL_OP_INFO_DTLS_3DES_EDE_CBC_SHA_384; break;
|
||||
case e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_224: cmdFlags |= PCL_OP_INFO_DTLS_3DES_EDE_CBC_SHA_224; break;
|
||||
case e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_512: cmdFlags |= PCL_OP_INFO_DTLS_3DES_EDE_CBC_SHA_512; break;
|
||||
case e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_256: cmdFlags |= PCL_OP_INFO_DTLS_3DES_EDE_CBC_SHA_256; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_160 : cmdFlags |= PCL_OP_INFO_DTLS_AES_256_CBC_SHA_160 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_384 : cmdFlags |= PCL_OP_INFO_DTLS_AES_256_CBC_SHA_384 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_224 : cmdFlags |= PCL_OP_INFO_DTLS_AES_256_CBC_SHA_224 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_512 : cmdFlags |= PCL_OP_INFO_DTLS_AES_256_CBC_SHA_512 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_160 : cmdFlags |= PCL_OP_INFO_DTLS_AES_128_CBC_SHA_160 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_384 : cmdFlags |= PCL_OP_INFO_DTLS_AES_128_CBC_SHA_384 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_224 : cmdFlags |= PCL_OP_INFO_DTLS_AES_128_CBC_SHA_224 ; break;
|
||||
case e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_512 : cmdFlags |= PCL_OP_INFO_DTLS_AES_128_CBC_SHA_512 ; break;
|
||||
}
|
||||
|
||||
return cmdFlags;
|
||||
}
|
||||
|
||||
|
||||
static inline uint32_t CalcMacsecCmdFlags(uint32_t initFlags,
|
||||
e_MacsecCipherAlg cipherAlg)
|
||||
{
|
||||
uint32_t cmdFlags = initFlags;
|
||||
|
||||
switch (cipherAlg)
|
||||
{
|
||||
case e_MACSEC_CIPHER_ALG_AES_GCM_16: cmdFlags |= PCL_OP_INFO_MACSEC_AES_GCM_16; break;
|
||||
}
|
||||
|
||||
return cmdFlags;
|
||||
}
|
||||
|
||||
|
||||
static inline void InsertDataMoveCommands(t_DescHandle* p_DescHandle,
|
||||
uint32_t dataMoveSize)
|
||||
{
|
||||
uint32_t cmdFlags;
|
||||
|
||||
cmdFlags = DCTRL_LOAD_AUTO_IFIFO_DISABLED;
|
||||
CmdInsertDctrlLoad(p_DescHandle,cmdFlags);
|
||||
|
||||
cmdFlags = FIFO_LOAD_CLASS_BOTH_TYPE_MSG_L2_L1_F1;
|
||||
CmdInsertFifoLoad(p_DescHandle,cmdFlags,dataMoveSize,NULL);
|
||||
|
||||
cmdFlags = DCTRL_LOAD_AUTO_IFIFO_ENABLED;
|
||||
CmdInsertDctrlLoad(p_DescHandle,cmdFlags);
|
||||
|
||||
cmdFlags = MOVE_AUX_FLSH_SRC_IFIFO1_DST_OFIFO;
|
||||
CmdInsertMove(p_DescHandle,cmdFlags,0,dataMoveSize);
|
||||
|
||||
cmdFlags = FIFO_STORE_CLASS_UNUSED_TYPE_MSG;
|
||||
CmdInsertFifoStore(p_DescHandle,cmdFlags,dataMoveSize,NULL);
|
||||
}
|
||||
|
||||
|
||||
static inline void InsertNopCommands(t_DescHandle* p_DescHandle,
|
||||
uint32_t numOfCommands)
|
||||
{
|
||||
uint32_t i;
|
||||
uint32_t jumpCmdIndex;
|
||||
|
||||
for (i=0; i<numOfCommands; i++)
|
||||
{
|
||||
jumpCmdIndex = p_DescHandle->nextIndex;
|
||||
CmdInsertLocalJump(p_DescHandle,0);
|
||||
CmdUpdateLocalJump(p_DescHandle,jumpCmdIndex);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,156 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __SEC_DCL_API_H
|
||||
#define __SEC_DCL_API_H
|
||||
|
||||
|
||||
/************************************************************************/
|
||||
/* */
|
||||
/* Description */
|
||||
/* ----------- */
|
||||
/* */
|
||||
/* A set of complex routines, for creating: */
|
||||
/* A protocol-specific Shared-Descriptor */
|
||||
/* A Job-Descriptor referencing a Shared-Descriptor */
|
||||
/* */
|
||||
/* Calling Sequence: */
|
||||
/* 1 * descLength = Init<TYPE>ShrDesc(p_ShrDesc,...) */
|
||||
/* N * descLength = InitSeqJobDesc(p_Desc,p_ShrDesc,...) */
|
||||
/* */
|
||||
/* Notes: */
|
||||
/* MaxJobDescLen returns the maximum length of a Job-Descriptor */
|
||||
/* MaxShrDescLen returns the maximum length of a Shared-Descriptor */
|
||||
/* All other routines create a Descriptor and return its length */
|
||||
/* The Descriptor buffer should be allocated outside the routine */
|
||||
/* The returned length indicates the number of 32-bit words used */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
|
||||
#include "sec_dcl_ext.h"
|
||||
|
||||
|
||||
uint32_t MaxJobDescLen();
|
||||
|
||||
|
||||
uint32_t MaxShrDescLen(uint32_t ptrSize);
|
||||
|
||||
|
||||
/************************************************/
|
||||
/* Job-Descriptor Construction Routines (below) */
|
||||
|
||||
|
||||
uint32_t InitSeqJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t* p_ShrDesc,
|
||||
bool inputSeqSgt,
|
||||
uint32_t inputSeqSize,
|
||||
uint8_t* p_InputSeqData,
|
||||
bool outputSeqSgt,
|
||||
uint32_t outputSeqSize,
|
||||
uint8_t* p_OutputSeqData);
|
||||
|
||||
|
||||
uint32_t InitSplitKeyJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint8_t* p_InputKey,
|
||||
uint8_t* p_OutputKey,
|
||||
e_SplitKeyHashAlg hashAlg);
|
||||
|
||||
|
||||
/* Job-Descriptor Construction Routines (above) */
|
||||
/************************************************/
|
||||
|
||||
|
||||
/***************************************************/
|
||||
/* Shared-Descriptor Construction Routines (below) */
|
||||
|
||||
|
||||
uint32_t InitIpsecEncapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_IpsecCryptoAlg cryptoAlg,
|
||||
e_IpsecAuthenAlg authenAlg,
|
||||
t_IpsecEncapParam* p_Param);
|
||||
|
||||
|
||||
uint32_t InitIpsecDecapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_IpsecCryptoAlg cryptoAlg,
|
||||
e_IpsecAuthenAlg authenAlg,
|
||||
t_IpsecDecapParam* p_Param);
|
||||
|
||||
|
||||
uint32_t InitDtlsEncapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_DtlsCipherAlg cipherAlg,
|
||||
t_DtlsEncapParam* p_Param);
|
||||
|
||||
|
||||
uint32_t InitDtlsDecapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cryptoKeyImm,
|
||||
uint32_t cryptoKeySize,
|
||||
uint8_t* p_CryptoKeyData,
|
||||
bool authenKeyImm,
|
||||
uint32_t authenKeySize,
|
||||
uint8_t* p_AuthenKeyData,
|
||||
e_DtlsCipherAlg cipherAlg,
|
||||
t_DtlsDecapParam* p_Param);
|
||||
|
||||
|
||||
uint32_t InitMacsecEncapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cipherKeyImm,
|
||||
uint32_t cipherKeySize,
|
||||
uint8_t* p_CipherKeyData,
|
||||
e_MacsecCipherAlg cipherAlg,
|
||||
t_MacsecEncapParam* p_Param);
|
||||
|
||||
|
||||
uint32_t InitMacsecDecapShrDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataMoveSize,
|
||||
bool cipherKeyImm,
|
||||
uint32_t cipherKeySize,
|
||||
uint8_t* p_CipherKeyData,
|
||||
e_MacsecCipherAlg cipherAlg,
|
||||
t_MacsecDecapParam* p_Param);
|
||||
|
||||
|
||||
/* Shared-Descriptor Construction Routines (above) */
|
||||
/***************************************************/
|
||||
|
||||
|
||||
#endif /* __SEC_DCL_API_H */
|
||||
@@ -0,0 +1,945 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/* Include the internal definitions of this module */
|
||||
#include "sec_dcl_cmd.h"
|
||||
|
||||
|
||||
/* Include the external interfaces of other modules */
|
||||
#include "error_ext.h"
|
||||
|
||||
|
||||
#define FLAGS_MATCH(word,mask,flags) (((word)&(mask))==(flags))
|
||||
|
||||
|
||||
static inline void WriteWord(t_DescHandle* p_DescHandle,uint32_t word);
|
||||
static inline void WriteAddr(t_DescHandle* p_DescHandle,void* p_Addr);
|
||||
static inline void WriteData(t_DescHandle* p_DescHandle,void* p_Data,uint32_t size);
|
||||
|
||||
|
||||
t_DescHandle NewDescHandle(uint32_t* p_Buffer,uint32_t ptrSize)
|
||||
{
|
||||
t_DescHandle descHandle;
|
||||
descHandle.p_Buffer = p_Buffer;
|
||||
descHandle.nextIndex = 0;
|
||||
descHandle.ptrLength = ptrSize/sizeof(uint32_t);
|
||||
return descHandle;
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertShrDescHdr(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) SHR_DESC_HDR_CTYPE;
|
||||
cmdFlags |= SHR_DESC_HDR_ONE;
|
||||
cmdFlags &= ~SHR_DESC_HDR_ZRO;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertJobDescHdr(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) JOB_DESC_HDR_CTYPE;
|
||||
cmdFlags |= JOB_DESC_HDR_ONE;
|
||||
cmdFlags &= ~JOB_DESC_HDR_ZRO;
|
||||
cmdFlags &= ~JOB_DESC_HDR_SHR;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertJobDescRefShrHdr(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t* p_ShrDesc)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(p_ShrDesc != NULL);
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) JOB_DESC_HDR_CTYPE;
|
||||
cmdFlags |= JOB_DESC_HDR_ONE;
|
||||
cmdFlags &= ~JOB_DESC_HDR_ZRO;
|
||||
cmdFlags |= JOB_DESC_HDR_SHR;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
WriteAddr(p_DescHandle,p_ShrDesc);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertKey(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
if (FLAGS_MATCH(cmdFlags,KEY_IMM,KEY_IMM))
|
||||
{
|
||||
ASSERT_COND(p_Data != NULL);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,KEY_SGT,KEY_SGT));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,KEY_CLASS_DST_MASK,KEY_CLASS_1_DST_AFHA_SBOX))
|
||||
{
|
||||
ASSERT_COND(length == KEY_DST_AFHA_SBOX_LENGTH);
|
||||
}
|
||||
ASSERT_COND(IN_RANGE(MIN_KEY_LENGTH,length,MAX_KEY_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= KEY_CTYPE;
|
||||
cmdFlags |= KEY_SEQ(p_Data==NULL);
|
||||
cmdFlags |= KEY_LENGTH(length);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,KEY_IMM,KEY_IMM))
|
||||
WriteData(p_DescHandle,p_Data,length);
|
||||
else
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertLoad(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t offset,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
bool length_in_words=FALSE; /* Interpeak. Bug correction */
|
||||
|
||||
/* Assert input arguments */
|
||||
if (FLAGS_MATCH(cmdFlags,LOAD_IMM,LOAD_IMM))
|
||||
{
|
||||
ASSERT_COND(p_Data != NULL);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,LOAD_SGT,LOAD_SGT));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_KEYSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_2_DST_KEYSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_DATASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_2_DST_DATASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_ICVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_2_DST_ICVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DLIODN ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_CCTRL ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_ICTRL ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DPOVRD ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_CLRW ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DMATH0 ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DMATH1 ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DMATH2 ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DMATH3 ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_AADSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_IVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_ALTDSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKBSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKNSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKESZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DESCBUF) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_IFIFO ))
|
||||
{
|
||||
ASSERT_COND((length%4) == 0); /*length /= 4;*/ /*Interpeak. Bug correction*/
|
||||
length_in_words = TRUE;
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_KEYSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_2_DST_KEYSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_DATASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_2_DST_DATASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_ICVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_2_DST_ICVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DLIODN) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_CCTRL ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_ICTRL ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_DECO_DST_DPOVRD) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_CLRW ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_AADSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_IVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_ALTDSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKBSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKNSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_PKESZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_IDFNS ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_ODFNS ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_IFALT ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_IFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_DFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_OFIFO ))
|
||||
{
|
||||
ASSERT_COND(FLAGS_MATCH(cmdFlags,LOAD_IMM,LOAD_IMM));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,LOAD_IMM,LOAD_IMM))
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_1_DST_CTX) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_2_DST_CTX))
|
||||
{
|
||||
ASSERT_COND((offset%8) == 0);
|
||||
}
|
||||
else
|
||||
{
|
||||
ASSERT_COND(offset == 0);
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_DFIFO) ||
|
||||
FLAGS_MATCH(cmdFlags,LOAD_CLASS_DST_MASK,LOAD_CLASS_NONE_DST_OFIFO))
|
||||
{
|
||||
ASSERT_COND(length>=1 && length<=8);
|
||||
}
|
||||
else
|
||||
{
|
||||
ASSERT_COND(length==4 || length==8);
|
||||
}
|
||||
}
|
||||
ASSERT_COND(IN_RANGE(MIN_LOAD_OFFSET,offset,MAX_LOAD_OFFSET));
|
||||
ASSERT_COND(IN_RANGE(MIN_LOAD_LENGTH,length,MAX_LOAD_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= LOAD_CTYPE;
|
||||
cmdFlags |= LOAD_SEQ(p_Data==NULL);
|
||||
cmdFlags |= LOAD_OFFSET(offset);
|
||||
if(length_in_words==TRUE) /* Interpeak. Bug correction*/
|
||||
cmdFlags |= LOAD_LENGTH(length/4);
|
||||
else
|
||||
cmdFlags |= LOAD_LENGTH(length);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,LOAD_IMM,LOAD_IMM))
|
||||
WriteData(p_DescHandle,p_Data,length);
|
||||
else
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertDctrlLoad(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= DCTRL_LOAD_CTYPE;
|
||||
cmdFlags |= DCTRL_LOAD_CLASS_DECO_IMM_DST_REG;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertFifoLoad(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
if (FLAGS_MATCH(cmdFlags,FIFO_LOAD_IMM,FIFO_LOAD_IMM))
|
||||
{
|
||||
ASSERT_COND(p_Data != NULL);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,FIFO_LOAD_SGT,FIFO_LOAD_SGT));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,FIFO_LOAD_CLASS_TYPE_MASK,FIFO_LOAD_CLASS_SKIP_TYPE_UNUSED))
|
||||
{
|
||||
ASSERT_COND(p_Data == NULL);
|
||||
}
|
||||
if (!(FLAGS_MATCH(cmdFlags,FIFO_LOAD_VLF, FIFO_LOAD_VLF))) /* wind river added */
|
||||
{
|
||||
ASSERT_COND(IN_RANGE(MIN_FIFO_LOAD_LENGTH,length,MAX_FIFO_LOAD_LENGTH));
|
||||
}
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= FIFO_LOAD_CTYPE;
|
||||
cmdFlags |= FIFO_LOAD_SEQ(p_Data==NULL);
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
{
|
||||
cmdFlags |= FIFO_LOAD_EXT;
|
||||
cmdFlags &= ~FIFO_LOAD_LENGTH(~0);
|
||||
}
|
||||
else
|
||||
{
|
||||
cmdFlags &= ~FIFO_LOAD_EXT;
|
||||
cmdFlags |= FIFO_LOAD_LENGTH(length);
|
||||
}
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,FIFO_LOAD_IMM,FIFO_LOAD_IMM))
|
||||
WriteData(p_DescHandle,p_Data,length);
|
||||
else
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
}
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
WriteWord(p_DescHandle,length);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertBitFifoLoad(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
if (FLAGS_MATCH(cmdFlags,BIT_FIFO_LOAD_IMM,BIT_FIFO_LOAD_IMM))
|
||||
{
|
||||
ASSERT_COND(p_Data != NULL);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,BIT_FIFO_LOAD_SGT,BIT_FIFO_LOAD_SGT));
|
||||
}
|
||||
ASSERT_COND(IN_RANGE(MIN_BIT_FIFO_LOAD_LENGTH,length,MAX_BIT_FIFO_LOAD_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= BIT_FIFO_LOAD_CTYPE;
|
||||
cmdFlags |= BIT_FIFO_LOAD_SEQ(p_Data==NULL);
|
||||
cmdFlags |= BIT_FIFO_LOAD_BIT_LENGTH(length);
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
{
|
||||
cmdFlags |= BIT_FIFO_LOAD_EXT;
|
||||
cmdFlags &= ~BIT_FIFO_LOAD_BYTE_LENGTH(~0);
|
||||
}
|
||||
else
|
||||
{
|
||||
cmdFlags &= ~BIT_FIFO_LOAD_EXT;
|
||||
cmdFlags |= BIT_FIFO_LOAD_BYTE_LENGTH(length);
|
||||
}
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,BIT_FIFO_LOAD_IMM,BIT_FIFO_LOAD_IMM))
|
||||
WriteData(p_DescHandle,p_Data,DIV_CEIL(length,8));
|
||||
else
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
}
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
WriteWord(p_DescHandle,length/8);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertStore(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t offset,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
if (FLAGS_MATCH(cmdFlags,STORE_IMM,STORE_IMM))
|
||||
{
|
||||
ASSERT_COND(offset == 0);
|
||||
ASSERT_COND(p_Data != NULL);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,STORE_SGT,STORE_SGT));
|
||||
ASSERT_COND(FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_UNUSED_SRC_UNUSED));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_1_SRC_MODE ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_2_SRC_MODE ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_DECO_SRC_DJQCR ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_1_SRC_KEYSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_2_SRC_KEYSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_DECO_SRC_DDAR ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_1_SRC_DATASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_2_SRC_DATASZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_DECO_SRC_DSTAT ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_1_SRC_ICVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_2_SRC_ICVSZ ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_NONE_SRC_CCTRL ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_NONE_SRC_ICTRL ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_NONE_SRC_CLRW ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_DECO_SRC_DMATH0) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_NONE_SRC_STAT ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_DECO_SRC_DMATH1) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_DECO_SRC_DMATH2) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_1_SRC_AADSZR ) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_DECO_SRC_DMATH3) ||
|
||||
FLAGS_MATCH(cmdFlags,STORE_CLASS_SRC_MASK,STORE_CLASS_1_SRC_IVSZ ))
|
||||
{
|
||||
ASSERT_COND((length%4) == 0); length /= 4;
|
||||
}
|
||||
ASSERT_COND(IN_RANGE(MIN_STORE_OFFSET,offset,MAX_STORE_OFFSET));
|
||||
ASSERT_COND(IN_RANGE(MIN_STORE_LENGTH,length,MAX_STORE_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= STORE_CTYPE;
|
||||
cmdFlags |= STORE_SEQ(p_Data==NULL);
|
||||
cmdFlags |= STORE_OFFSET(offset);
|
||||
cmdFlags |= STORE_LENGTH(length);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,STORE_IMM,STORE_IMM))
|
||||
WriteData(p_DescHandle,p_Data,length);
|
||||
else
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertDescbufStore(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t offset,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
if (FLAGS_MATCH(cmdFlags,DESCBUF_STORE_CLASS_SRC_MASK,DESCBUF_STORE_CLASS_DECO_SRC_0))
|
||||
{
|
||||
ASSERT_COND(offset == 0);
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,DESCBUF_STORE_CLASS_SRC_MASK,DESCBUF_STORE_CLASS_DECO_SRC_1) ||
|
||||
FLAGS_MATCH(cmdFlags,DESCBUF_STORE_CLASS_SRC_MASK,DESCBUF_STORE_CLASS_DECO_SRC_2))
|
||||
{
|
||||
ASSERT_COND(p_Data == NULL);
|
||||
}
|
||||
ASSERT_COND((length%4) == 0); length /= 4;
|
||||
ASSERT_COND((offset%4) == 0); offset /= 4;
|
||||
ASSERT_COND(IN_RANGE(MIN_DESCBUF_STORE_OFFSET,offset,MAX_DESCBUF_STORE_OFFSET));
|
||||
ASSERT_COND(IN_RANGE(MIN_DESCBUF_STORE_LENGTH,length,MAX_DESCBUF_STORE_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= DESCBUF_STORE_CTYPE;
|
||||
cmdFlags |= DESCBUF_STORE_SEQ(p_Data!=NULL && FLAGS_MATCH(cmdFlags,DESCBUF_STORE_CLASS_SRC_MASK,DESCBUF_STORE_CLASS_DECO_SRC_0));
|
||||
cmdFlags |= DESCBUF_STORE_OFFSET(offset);
|
||||
cmdFlags |= DESCBUF_STORE_LENGTH(length);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertFifoStore(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,FIFO_STORE_CLASS_TYPE_MASK,FIFO_STORE_CLASS_UNUSED_TYPE_SKIP))
|
||||
{
|
||||
ASSERT_COND(p_Data == NULL);
|
||||
}
|
||||
ASSERT_COND(IN_RANGE(MIN_FIFO_STORE_LENGTH,length,MAX_FIFO_STORE_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= FIFO_STORE_CTYPE;
|
||||
cmdFlags |= FIFO_STORE_SEQ(p_Data==NULL);
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
{
|
||||
cmdFlags |= FIFO_STORE_EXT;
|
||||
cmdFlags &= ~FIFO_STORE_LENGTH(~0);
|
||||
}
|
||||
else
|
||||
{
|
||||
cmdFlags &= ~FIFO_STORE_EXT;
|
||||
cmdFlags |= FIFO_STORE_LENGTH(length);
|
||||
}
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
WriteWord(p_DescHandle,length);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertRngFifoStore(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
if (FLAGS_MATCH(cmdFlags,RNG_FIFO_STORE_TYPE_MASK,RNG_FIFO_STORE_TYPE_OFIFO))
|
||||
{
|
||||
ASSERT_COND(p_Data == NULL);
|
||||
}
|
||||
ASSERT_COND(IN_RANGE(MIN_RNG_FIFO_STORE_LENGTH,length,MAX_RNG_FIFO_STORE_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= RNG_FIFO_STORE_CTYPE;
|
||||
cmdFlags |= RNG_FIFO_STORE_SEQ(p_Data!=NULL && FLAGS_MATCH(cmdFlags,RNG_FIFO_STORE_TYPE_MASK,RNG_FIFO_STORE_TYPE_OFIFO));
|
||||
cmdFlags |= RNG_FIFO_STORE_LENGTH(length);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertMove(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t offset,
|
||||
uint32_t length)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
if (FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_NONE_SRC_OFIFO_DST_IFIFO1 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_LAST_SRC_OFIFO_DST_IFIFO1 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_FLSH_SRC_OFIFO_DST_IFIFO1 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_BOTH_SRC_OFIFO_DST_IFIFO1 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_NONE_SRC_OFIFO_DST_IFIFO2 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_LAST_SRC_OFIFO_DST_IFIFO2 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_FLSH_SRC_OFIFO_DST_IFIFO2 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_BOTH_SRC_OFIFO_DST_IFIFO2 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_OFIFO_DST_PKHA_A))
|
||||
{
|
||||
ASSERT_COND(offset == 0);
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_CTX1_DST_OFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_CTX2_DST_OFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_OFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG0_DST_OFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG1_DST_OFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG2_DST_OFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG3_DST_OFIFO ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_CTX1 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_CTX2 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_DESCBUF ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_MATHREG0) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_MATHREG1) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_MATHREG2) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_MATHREG3) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_KEY1 ) ||
|
||||
FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_KEY2 ))
|
||||
{
|
||||
ASSERT_COND((offset%4) == 0);
|
||||
}
|
||||
if (!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_00B_SRC_CTX1_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_16B_SRC_CTX1_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_32B_SRC_CTX1_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_48B_SRC_CTX1_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_00B_SRC_CTX2_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_16B_SRC_CTX2_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_32B_SRC_CTX2_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_48B_SRC_CTX2_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_OFIFO_DST_DESCBUF ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_00B_SRC_DESCBUF_DST_CTX1) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_16B_SRC_DESCBUF_DST_CTX1) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_32B_SRC_DESCBUF_DST_CTX1) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_48B_SRC_DESCBUF_DST_CTX1) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_00B_SRC_DESCBUF_DST_CTX2) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_16B_SRC_DESCBUF_DST_CTX2) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_32B_SRC_DESCBUF_DST_CTX2) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_OFFSET_48B_SRC_DESCBUF_DST_CTX2) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_OFIFO ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_MATHREG0) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_MATHREG1) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_MATHREG2) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_MATHREG3) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_NONE_SRC_DESCBUF_DST_IFIFO1 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_LAST_SRC_DESCBUF_DST_IFIFO1 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_FLSH_SRC_DESCBUF_DST_IFIFO1 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_BOTH_SRC_DESCBUF_DST_IFIFO1 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_NONE_SRC_DESCBUF_DST_IFIFO2 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_LAST_SRC_DESCBUF_DST_IFIFO2 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_FLSH_SRC_DESCBUF_DST_IFIFO2 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_BOTH_SRC_DESCBUF_DST_IFIFO2 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_PKHA_A ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_KEY1 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_DESCBUF_DST_KEY2 ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG0_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG1_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG2_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_MATHREG3_DST_DESCBUF) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_SRC_DST_MASK,MOVE_AUX_UNUSED_SRC_IFIFO1_DST_DESCBUF ) &&
|
||||
/* Wind River fix start */
|
||||
/* offset is treated as additional 8 length bits in case of src=IFIFO and dst=OFIFO */
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_FLSH_C2A_SRC_IFIFO2_DST_OFIFO,MOVE_AUX_FLSH_C2A_SRC_IFIFO2_DST_OFIFO ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_FLSH_C1A_SRC_IFIFO2_DST_OFIFO,MOVE_AUX_FLSH_C1A_SRC_IFIFO2_DST_OFIFO ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_NONE_SRC_IFIFO1_DST_OFIFO,MOVE_AUX_NONE_SRC_IFIFO1_DST_OFIFO ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_FLSH_SRC_IFIFO1_DST_OFIFO,MOVE_AUX_FLSH_SRC_IFIFO1_DST_OFIFO ))
|
||||
/* Wind River fix end */
|
||||
{
|
||||
ASSERT_COND(offset <= 128);
|
||||
}
|
||||
/* Wind River fix start */
|
||||
if(!FLAGS_MATCH(cmdFlags,MOVE_AUX_FLSH_C2A_SRC_IFIFO2_DST_OFIFO,MOVE_AUX_FLSH_C2A_SRC_IFIFO2_DST_OFIFO) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_FLSH_C1A_SRC_IFIFO2_DST_OFIFO,MOVE_AUX_FLSH_C1A_SRC_IFIFO2_DST_OFIFO) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_NONE_SRC_IFIFO1_DST_OFIFO,MOVE_AUX_NONE_SRC_IFIFO1_DST_OFIFO ) &&
|
||||
!FLAGS_MATCH(cmdFlags,MOVE_AUX_FLSH_SRC_IFIFO1_DST_OFIFO,MOVE_AUX_FLSH_SRC_IFIFO1_DST_OFIFO ))
|
||||
{
|
||||
/* These assert is not applicable when offset is treated as 8 additional length bits */
|
||||
ASSERT_COND(IN_RANGE(MIN_MOVE_OFFSET,offset,MAX_MOVE_OFFSET));
|
||||
ASSERT_COND(IN_RANGE(MIN_MOVE_LENGTH,length,MAX_MOVE_LENGTH));
|
||||
}
|
||||
else
|
||||
{
|
||||
ASSERT_COND(IN_RANGE(MIN_MOVE_LENGTH, (length | MOVE_OFFSET(offset)), UINT16_MAX));
|
||||
}
|
||||
/* Wind River fix end */
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= MOVE_CTYPE;
|
||||
cmdFlags |= MOVE_OFFSET(offset);
|
||||
cmdFlags |= MOVE_LENGTH(length);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertAlgOperation(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) ALG_OP_CTYPE;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertPclOperation(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) PCL_OP_CTYPE;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertPkhaOperation(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) PKHA_OP_CTYPE;
|
||||
cmdFlags |= PKHA_OP_TYPE;
|
||||
cmdFlags |= PKHA_OP_ID;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertLocalJump(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) JUMP_CTYPE;
|
||||
cmdFlags |= JUMP_TYPE_LOCAL;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdUpdateLocalJump(t_DescHandle* p_DescHandle,
|
||||
uint32_t jumpCmdIndex)
|
||||
{
|
||||
/* Read the Jump command */
|
||||
uint32_t cmdFlags = GET_UINT32(p_DescHandle->p_Buffer[jumpCmdIndex]);
|
||||
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(p_DescHandle->nextIndex > jumpCmdIndex);
|
||||
|
||||
/* Update the Jump command */
|
||||
cmdFlags |= JUMP_LOCAL_OFFSET(p_DescHandle->nextIndex-jumpCmdIndex);
|
||||
|
||||
/* Reinsert the Jump command */
|
||||
WRITE_UINT32(p_DescHandle->p_Buffer[jumpCmdIndex],cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertNonLocalJump(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t* p_JumpAddr)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(p_JumpAddr != NULL);
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) JUMP_CTYPE;
|
||||
cmdFlags |= JUMP_TYPE_NON_LOCAL;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
WriteAddr(p_DescHandle,p_JumpAddr);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertHaltWithTestStatus(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(FLAGS_MATCH(cmdFlags,JUMP_SL_MASK,JUMP_SL_0));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) JUMP_CTYPE;
|
||||
cmdFlags |= JUMP_TYPE_HALT_TEST_STATUS;
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertHaltWithUserStatus(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t status)
|
||||
{
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) JUMP_CTYPE;
|
||||
cmdFlags |= JUMP_TYPE_HALT_USER_STATUS;
|
||||
cmdFlags |= JUMP_HALT_USER_STATUS(status);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertMath(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length0,
|
||||
uint32_t length1,
|
||||
uint8_t* p_Data0,
|
||||
uint8_t* p_Data1)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
if (length0 > 0)
|
||||
{
|
||||
ASSERT_COND(p_Data0 != NULL);
|
||||
ASSERT_COND(FLAGS_MATCH(cmdFlags,MATH_SRC0_MASK,MATH_SRC0_IMM));
|
||||
}
|
||||
else
|
||||
{
|
||||
ASSERT_COND(p_Data0 == NULL);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_SRC0_MASK,MATH_SRC0_IMM));
|
||||
}
|
||||
if (length1 > 0)
|
||||
{
|
||||
ASSERT_COND(p_Data1 != NULL);
|
||||
ASSERT_COND(FLAGS_MATCH(cmdFlags,MATH_SRC1_MASK,MATH_SRC1_IMM));
|
||||
}
|
||||
else
|
||||
{
|
||||
ASSERT_COND(p_Data1 == NULL);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_SRC1_MASK,MATH_SRC1_IMM));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,MATH_FUNC_MASK,MATH_FUNC_SHIFT_L))
|
||||
{
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_NONE));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,MATH_FUNC_MASK,MATH_FUNC_SHIFT_R))
|
||||
{
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_NONE));
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,MATH_FUNC_MASK,MATH_FUNC_SHLD))
|
||||
{
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_IMM ));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_SIL ));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_SOL ));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_VSIL));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_VSOL));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_NONE));
|
||||
|
||||
}
|
||||
if (FLAGS_MATCH(cmdFlags,MATH_LEN_MASK,MATH_LEN_8_BYTE))
|
||||
{
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_SIL ));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_SOL ));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_VSIL));
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_DST_MASK,MATH_DST_VSOL));
|
||||
}
|
||||
if (length0>0 && length1>0)
|
||||
{
|
||||
ASSERT_COND(length0 <= 4);
|
||||
ASSERT_COND(length1 <= 4);
|
||||
ASSERT_COND(!FLAGS_MATCH(cmdFlags,MATH_LEN_MASK,MATH_LEN_8_BYTE));
|
||||
}
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) MATH_CTYPE;
|
||||
cmdFlags |= MATH_IFB(FLAGS_MATCH(cmdFlags,MATH_LEN_MASK,MATH_LEN_8_BYTE) && length0>0 && length0<=4 && length1==0);
|
||||
cmdFlags |= MATH_IFB(FLAGS_MATCH(cmdFlags,MATH_LEN_MASK,MATH_LEN_8_BYTE) && length1>0 && length1<=4 && length0==0);
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data0)
|
||||
WriteData(p_DescHandle,p_Data0,length0);
|
||||
if (p_Data1)
|
||||
WriteData(p_DescHandle,p_Data1,length1);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertSeqInPtr(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(IN_RANGE(MIN_SEQ_IN_PTR_LENGTH,length,MAX_SEQ_IN_PTR_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) SEQ_IN_PTR_CTYPE;
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
{
|
||||
cmdFlags |= SEQ_IN_PTR_EXT;
|
||||
cmdFlags &= ~SEQ_IN_PTR_LENGTH(~0);
|
||||
}
|
||||
else
|
||||
{
|
||||
cmdFlags &= ~SEQ_IN_PTR_EXT;
|
||||
cmdFlags |= SEQ_IN_PTR_LENGTH(length);
|
||||
}
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
WriteWord(p_DescHandle,length);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertSeqOutPtr(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(IN_RANGE(MIN_SEQ_OUT_PTR_LENGTH,length,MAX_SEQ_OUT_PTR_LENGTH));
|
||||
|
||||
/* Calculate additional flags */
|
||||
cmdFlags |= (uint32_t) SEQ_OUT_PTR_CTYPE;
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
{
|
||||
cmdFlags |= SEQ_OUT_PTR_EXT;
|
||||
cmdFlags &= ~SEQ_OUT_PTR_LENGTH(~0);
|
||||
}
|
||||
else
|
||||
{
|
||||
cmdFlags &= ~SEQ_OUT_PTR_EXT;
|
||||
cmdFlags |= SEQ_OUT_PTR_LENGTH(length);
|
||||
}
|
||||
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
if (p_Data)
|
||||
WriteAddr(p_DescHandle,p_Data);
|
||||
if (length > MAX_NOT_EXT_LENGTH)
|
||||
WriteWord(p_DescHandle,length);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertAnything(t_DescHandle* p_DescHandle,
|
||||
uint32_t cmdFlags)
|
||||
{
|
||||
/* Insert the command */
|
||||
WriteWord(p_DescHandle,cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CmdInsertDataBlock(t_DescHandle* p_DescHandle,
|
||||
uint32_t length,
|
||||
uint8_t* p_Data)
|
||||
{
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(length != 0);
|
||||
ASSERT_COND(p_Data != NULL);
|
||||
|
||||
/* Insert the command */
|
||||
WriteData(p_DescHandle,p_Data,length);
|
||||
}
|
||||
|
||||
|
||||
void CloseShrDesc(t_DescHandle* p_DescHandle,uint32_t startIndex)
|
||||
{
|
||||
/* Read the Header command */
|
||||
uint32_t cmdFlags = GET_UINT32(p_DescHandle->p_Buffer[0]);
|
||||
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(p_DescHandle->nextIndex >= startIndex+1);
|
||||
ASSERT_COND(p_DescHandle->nextIndex <= MAX_DESC_LENGTH-1-p_DescHandle->ptrLength);
|
||||
|
||||
/* Update the Header command */
|
||||
cmdFlags |= SHR_DESC_HDR_START_INDEX(startIndex);
|
||||
cmdFlags |= SHR_DESC_HDR_LENGTH_SET(p_DescHandle->nextIndex);
|
||||
|
||||
/* Reinsert the Header command */
|
||||
WRITE_UINT32(p_DescHandle->p_Buffer[0],cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CloseJobDesc(t_DescHandle* p_DescHandle,uint32_t startIndex)
|
||||
{
|
||||
/* Read the Header command */
|
||||
uint32_t cmdFlags = GET_UINT32(p_DescHandle->p_Buffer[0]);
|
||||
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(p_DescHandle->nextIndex >= startIndex+1);
|
||||
ASSERT_COND(p_DescHandle->nextIndex <= MAX_DESC_LENGTH);
|
||||
|
||||
/* Update the Header command */
|
||||
cmdFlags |= JOB_DESC_HDR_START_INDEX(startIndex);
|
||||
cmdFlags |= JOB_DESC_HDR_LENGTH_SET(p_DescHandle->nextIndex);
|
||||
|
||||
/* Reinsert the Header command */
|
||||
WRITE_UINT32(p_DescHandle->p_Buffer[0],cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
void CloseJobDescRefShr(t_DescHandle* p_DescHandle,uint32_t* p_ShrDesc)
|
||||
{
|
||||
/* Read the Header command */
|
||||
uint32_t cmdFlags = GET_UINT32(p_DescHandle->p_Buffer[0]);
|
||||
|
||||
/* Read the Shared-Descriptor Header command */
|
||||
uint32_t shrDescCmdFlags = GET_UINT32(p_ShrDesc[0]);
|
||||
|
||||
/* Assert input arguments */
|
||||
ASSERT_COND(p_DescHandle->nextIndex >= MIN_DESC_LENGTH);
|
||||
ASSERT_COND(p_DescHandle->nextIndex <= MAX_DESC_LENGTH);
|
||||
|
||||
/* Update the Header command */
|
||||
cmdFlags |= JOB_DESC_HDR_SHR_DESC_LENGTH(SHR_DESC_HDR_LENGTH_GET(shrDescCmdFlags));
|
||||
cmdFlags |= JOB_DESC_HDR_LENGTH_SET(p_DescHandle->nextIndex);
|
||||
|
||||
/* Reinsert the Header command */
|
||||
WRITE_UINT32(p_DescHandle->p_Buffer[0],cmdFlags);
|
||||
}
|
||||
|
||||
|
||||
static inline void WriteWord(t_DescHandle* p_DescHandle,uint32_t word)
|
||||
{
|
||||
ASSERT_COND(p_DescHandle->nextIndex+1 <= MAX_DESC_LENGTH);
|
||||
WRITE_UINT32(p_DescHandle->p_Buffer[p_DescHandle->nextIndex],word);
|
||||
p_DescHandle->nextIndex += 1;
|
||||
}
|
||||
|
||||
|
||||
static inline void WriteAddr(t_DescHandle* p_DescHandle,void* p_Addr)
|
||||
{
|
||||
uint32_t i,j;
|
||||
ASSERT_COND(p_DescHandle->nextIndex+p_DescHandle->ptrLength <= MAX_DESC_LENGTH);
|
||||
/* Interpeak start */
|
||||
p_Addr = XX_VirtToPhys(p_Addr);
|
||||
/* Interpeak end */
|
||||
for (i=0; i<p_DescHandle->ptrLength-sizeof(void*)/sizeof(uint32_t); i++)
|
||||
WRITE_UINT32(p_DescHandle->p_Buffer[p_DescHandle->nextIndex+i],0);
|
||||
for (j=i; j<p_DescHandle->ptrLength; j++)
|
||||
WRITE_UINT32(p_DescHandle->p_Buffer[p_DescHandle->nextIndex+j],((uint32_t*)&p_Addr)[j-i]);
|
||||
p_DescHandle->nextIndex += p_DescHandle->ptrLength;
|
||||
}
|
||||
|
||||
|
||||
static inline void WriteData(t_DescHandle* p_DescHandle,void* p_Data,uint32_t size)
|
||||
{
|
||||
ASSERT_COND(p_DescHandle->nextIndex+DIV_CEIL(size,sizeof(uint32_t)) <= MAX_DESC_LENGTH);
|
||||
COPY_BLOCK(p_DescHandle->p_Buffer+p_DescHandle->nextIndex,p_Data,size);
|
||||
p_DescHandle->nextIndex += DIV_CEIL(size,sizeof(uint32_t));
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,800 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/* Include the internal definitions of this module */
|
||||
#include "sec.h"
|
||||
|
||||
|
||||
/* Include the external interfaces of other modules */
|
||||
#include "xx_ext.h"
|
||||
#include "part_ext.h"
|
||||
#include "error_ext.h"
|
||||
#include "string_ext.h"
|
||||
|
||||
|
||||
#define __ERR_MODULE__ MODULE_SEC
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_Sec* p_Sec);
|
||||
|
||||
|
||||
static void InitRegs(t_Sec* p_Sec);
|
||||
|
||||
|
||||
static void PrintCcbJobStatus (t_SecJobStatus* p_JobStatus);
|
||||
static void PrintJhuJobStatus (t_SecJobStatus* p_JobStatus);
|
||||
static void PrintDecoJobStatus(t_SecJobStatus* p_JobStatus);
|
||||
static void PrintJqJobStatus (t_SecJobStatus* p_JobStatus);
|
||||
static void PrintJhtJobStatus (t_SecJobStatus* p_JobStatus);
|
||||
|
||||
|
||||
static void DumpGenRegs (t_SecGenRegs * p_Regs,char* p_Title);
|
||||
static void DumpStatRegs(t_SecStatRegs* p_Regs,char* p_Title);
|
||||
|
||||
|
||||
/*******************************/
|
||||
/* Initialization Unit (below) */
|
||||
|
||||
|
||||
t_Handle SEC_Config(t_SecParam* p_Param)
|
||||
{
|
||||
t_Sec* p_Sec;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Param,E_NULL_POINTER);
|
||||
|
||||
/* Allocate the driver structure */
|
||||
p_Sec = (t_Sec*)XX_Malloc(sizeof(t_Sec));
|
||||
if (p_Sec == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Driver"));
|
||||
return (t_Handle)p_Sec;
|
||||
}
|
||||
memset(p_Sec,0,sizeof(t_Sec));
|
||||
|
||||
/* Allocate the driver parameters structure */
|
||||
p_Sec->p_DriverParam = (t_SecDriverParam*)XX_Malloc(sizeof(t_SecDriverParam));
|
||||
if (p_Sec->p_DriverParam == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Driver parameters"));
|
||||
return (t_Handle)p_Sec;
|
||||
}
|
||||
memset(p_Sec->p_DriverParam,0,sizeof(t_SecDriverParam));
|
||||
|
||||
/* Configure the driver parameters */
|
||||
p_Sec->p_DriverParam->guestId = p_Param->guestId ;
|
||||
p_Sec->p_DriverParam->baseAddr = p_Param->baseAddr;
|
||||
p_Sec->p_DriverParam->softReset = DEFAULT_softReset;
|
||||
p_Sec->p_DriverParam->addrSpace = DEFAULT_addrSpace;
|
||||
|
||||
return (t_Handle)p_Sec;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_Init(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam,E_INVALID_STATE);
|
||||
CHECK_INIT_PARAMETERS(p_Sec,CheckInitParameters);
|
||||
|
||||
p_Sec->p_MemMap = CAST_UINT64_TO_POINTER(p_Sec->p_DriverParam->baseAddr);
|
||||
|
||||
if (p_Sec->p_DriverParam->guestId == NCSW_MASTER_ID)
|
||||
InitRegs(p_Sec);
|
||||
|
||||
XX_Free(p_Sec->p_DriverParam);
|
||||
p_Sec->p_DriverParam = NULL;
|
||||
|
||||
if (SEC_GetPtrSize(h_Sec) < sizeof(void*))
|
||||
RETURN_ERROR(MAJOR,E_CONFLICT,("SEC address space is smaller than this core's address space"));
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_Free(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
|
||||
if (p_Sec->p_DriverParam)
|
||||
XX_Free(p_Sec->p_DriverParam);
|
||||
XX_Free(p_Sec);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Initialization Unit (above) */
|
||||
/*******************************/
|
||||
|
||||
|
||||
/***************************************/
|
||||
/* Advanced Configuration Unit (below) */
|
||||
|
||||
|
||||
t_Error SEC_ConfigSoftReset(t_Handle h_Sec,
|
||||
e_SecSoftReset softReset)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam,E_INVALID_STATE);
|
||||
|
||||
if (p_Sec->p_DriverParam->guestId != NCSW_MASTER_ID)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_OPERATION,("Only the Master user can configure the Soft-Reset mode"));
|
||||
|
||||
p_Sec->p_DriverParam->softReset = softReset;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_ConfigAddrSpace(t_Handle h_Sec,
|
||||
e_SecAddrSpace addrSpace)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam,E_INVALID_STATE);
|
||||
|
||||
if (p_Sec->p_DriverParam->guestId != NCSW_MASTER_ID)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_OPERATION,("Only the Master user can configure the Address-Space mode"));
|
||||
|
||||
p_Sec->p_DriverParam->addrSpace = addrSpace;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Advanced Configuration Unit (above) */
|
||||
/***************************************/
|
||||
|
||||
|
||||
/********************************/
|
||||
/* Runtime Control Unit (below) */
|
||||
|
||||
|
||||
uint32_t SEC_GetPtrSize(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
uint32_t mcfgr;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
mcfgr = GET_UINT32(p_Sec->p_MemMap->gen.mcfgr);
|
||||
|
||||
if ((mcfgr & MCFGR_PS) == MCFGR_PS)
|
||||
return sizeof(uint64_t);
|
||||
else
|
||||
return sizeof(uint32_t);
|
||||
}
|
||||
|
||||
|
||||
uint32_t SEC_GetBurstSize(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
uint32_t mcfgr;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
mcfgr = GET_UINT32(p_Sec->p_MemMap->gen.mcfgr);
|
||||
|
||||
if ((mcfgr & MCFGR_BURST) == MCFGR_BURST)
|
||||
return 64;
|
||||
else
|
||||
return 32;
|
||||
}
|
||||
|
||||
uint16_t SEC_GetIpIdNum(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
uint64_t secvidr;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
secvidr = SEC_GET_UINT64_HI_LO(p_Sec->p_MemMap->stat.secvidr);
|
||||
|
||||
return (uint16_t)SECVIDR_IP_ID(secvidr);
|
||||
}
|
||||
|
||||
|
||||
uint8_t SEC_GetMajRevNum(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
uint64_t secvidr;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
secvidr = SEC_GET_UINT64_HI_LO(p_Sec->p_MemMap->stat.secvidr);
|
||||
|
||||
return (uint8_t)SECVIDR_MAJ_REV(secvidr);
|
||||
}
|
||||
|
||||
|
||||
uint8_t SEC_GetMinRevNum(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
uint64_t secvidr;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
secvidr = SEC_GET_UINT64_HI_LO(p_Sec->p_MemMap->stat.secvidr);
|
||||
|
||||
return (uint8_t)SECVIDR_MIN_REV(secvidr);
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_InitJqLiodnReg(t_Handle h_Sec,
|
||||
uint8_t jobQueueId,
|
||||
uint16_t seqLiodnVal,
|
||||
uint16_t nonSeqLiodnVal,
|
||||
bool allowMtdJobs)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
uint64_t jqliodnr = 0;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(jobQueueId<SEC_TOTAL_NUM_OF_JQS,E_INVALID_ID);
|
||||
|
||||
jqliodnr |= JQLIODNR_LCK;
|
||||
jqliodnr |= allowMtdJobs? JQLIODNR_AMTD:0;
|
||||
jqliodnr |= JQLIODNR_NSLIODN(nonSeqLiodnVal);
|
||||
jqliodnr |= JQLIODNR_SLIODN (seqLiodnVal );
|
||||
|
||||
switch (jobQueueId)
|
||||
{
|
||||
case 0:
|
||||
SEC_WRITE_UINT64_LO_HI(p_Sec->p_MemMap->gen.jq0liodnr,jqliodnr);
|
||||
break;
|
||||
case 1:
|
||||
SEC_WRITE_UINT64_LO_HI(p_Sec->p_MemMap->gen.jq1liodnr,jqliodnr);
|
||||
break;
|
||||
case 2:
|
||||
SEC_WRITE_UINT64_LO_HI(p_Sec->p_MemMap->gen.jq2liodnr,jqliodnr);
|
||||
break;
|
||||
case 3:
|
||||
SEC_WRITE_UINT64_LO_HI(p_Sec->p_MemMap->gen.jq3liodnr,jqliodnr);
|
||||
break;
|
||||
}
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
uint64_t SEC_CalcByteSwapFlags(e_SecByteSwap byteSwap,
|
||||
uint64_t swap1In4,
|
||||
uint64_t swap2In4,
|
||||
uint64_t swap4In8,
|
||||
uint64_t swap8In16)
|
||||
{
|
||||
switch (byteSwap)
|
||||
{
|
||||
case e_SEC_BYTE_SWAP_NONE : break ;
|
||||
case e_SEC_BYTE_SWAP_1_IN_2 : return swap1In4|swap2In4 ;
|
||||
case e_SEC_BYTE_SWAP_1_IN_4 : return swap1In4 ;
|
||||
case e_SEC_BYTE_SWAP_1_IN_8 : return swap1In4| swap4In8 ;
|
||||
case e_SEC_BYTE_SWAP_1_IN_16: return swap1In4| swap4In8|swap8In16;
|
||||
case e_SEC_BYTE_SWAP_2_IN_4 : return swap2In4 ;
|
||||
case e_SEC_BYTE_SWAP_2_IN_8 : return swap2In4|swap4In8 ;
|
||||
case e_SEC_BYTE_SWAP_2_IN_16: return swap2In4|swap4In8|swap8In16;
|
||||
case e_SEC_BYTE_SWAP_4_IN_8 : return swap4In8 ;
|
||||
case e_SEC_BYTE_SWAP_4_IN_16: return swap4In8|swap8In16;
|
||||
case e_SEC_BYTE_SWAP_8_IN_16: return swap8In16;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
t_SecJobStatus SEC_DecodeJobStatus(uint32_t jobStatus)
|
||||
{
|
||||
t_SecJobStatus decodedJobStatus;
|
||||
|
||||
decodedJobStatus.sourceId = (uint8_t)OSTAR_SSRC(jobStatus);
|
||||
|
||||
switch (decodedJobStatus.sourceId)
|
||||
{
|
||||
case SEC_JOB_STATUS_SOURCE_NONE:
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_CCB:
|
||||
decodedJobStatus.details.ccbDetails.jump = (bool )OSTAR_CCB_JMP (jobStatus);
|
||||
decodedJobStatus.details.ccbDetails.descIndex = (uint8_t)OSTAR_CCB_DESC_INDEX(jobStatus);
|
||||
decodedJobStatus.details.ccbDetails.algorithm = (uint8_t)OSTAR_CCB_ALGORITHM (jobStatus);
|
||||
decodedJobStatus.details.ccbDetails.descError = (uint8_t)OSTAR_CCB_DESC_ERROR(jobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_JHU:
|
||||
decodedJobStatus.details.jhuDetails.jump = (bool )OSTAR_JHU_JMP (jobStatus);
|
||||
decodedJobStatus.details.jhuDetails.descIndex = (uint8_t)OSTAR_JHU_DESC_INDEX(jobStatus);
|
||||
decodedJobStatus.details.jhuDetails.status = (uint8_t)OSTAR_JHU_STATUS (jobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_DECO:
|
||||
decodedJobStatus.details.decoDetails.jump = (bool )OSTAR_DECO_JMP (jobStatus);
|
||||
decodedJobStatus.details.decoDetails.descIndex = (uint8_t)OSTAR_DECO_DESC_INDEX(jobStatus);
|
||||
decodedJobStatus.details.decoDetails.descError = (uint8_t)OSTAR_DECO_DESC_ERROR(jobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_JQ:
|
||||
decodedJobStatus.details.jqDetails.numOfDars = (uint8_t)OSTAR_JQ_NADDR (jobStatus);
|
||||
decodedJobStatus.details.jqDetails.descError = (uint8_t)OSTAR_JQ_DESC_ERROR(jobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_JHT:
|
||||
decodedJobStatus.details.jhtDetails.jump = (bool )OSTAR_JHT_JMP (jobStatus);
|
||||
decodedJobStatus.details.jhtDetails.descIndex = (uint8_t)OSTAR_JHT_DESC_INDEX(jobStatus);
|
||||
decodedJobStatus.details.jhtDetails.condCodes = (uint8_t)OSTAR_JHT_COND_CODES(jobStatus);
|
||||
break;
|
||||
}
|
||||
|
||||
return decodedJobStatus;
|
||||
}
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
void SEC_PrintJobStatus(uint32_t jobStatus)
|
||||
{
|
||||
t_SecJobStatus decodedJobStatus = SEC_DecodeJobStatus(jobStatus);
|
||||
|
||||
switch (decodedJobStatus.sourceId)
|
||||
{
|
||||
case SEC_JOB_STATUS_SOURCE_NONE:
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_CCB:
|
||||
PrintCcbJobStatus(&decodedJobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_JHU:
|
||||
PrintJhuJobStatus(&decodedJobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_DECO:
|
||||
PrintDecoJobStatus(&decodedJobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_JQ:
|
||||
PrintJqJobStatus(&decodedJobStatus);
|
||||
break;
|
||||
case SEC_JOB_STATUS_SOURCE_JHT:
|
||||
PrintJhtJobStatus(&decodedJobStatus);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SEC_DumpRegisters(t_Handle h_Sec)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Sec,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_Sec->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
DumpGenRegs (&p_Sec->p_MemMap->gen ,"General Registers");
|
||||
DumpStatRegs(&p_Sec->p_MemMap->stat,"Status Registers" );
|
||||
}
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/* Runtime Control Unit (above) */
|
||||
/********************************/
|
||||
|
||||
|
||||
/*****************************/
|
||||
/* Internal Routines (below) */
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_Sec* p_Sec)
|
||||
{
|
||||
if (p_Sec->p_DriverParam->baseAddr == 0)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_VALUE,("Base address"));
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
static void InitRegs(t_Sec* p_Sec)
|
||||
{
|
||||
uint32_t mcfgr = GET_UINT32(p_Sec->p_MemMap->gen.mcfgr);
|
||||
|
||||
if (p_Sec->p_DriverParam->softReset == e_SEC_SOFT_RESET_ON_INIT)
|
||||
{
|
||||
mcfgr |= MCFGR_SWRST;
|
||||
WRITE_UINT32(p_Sec->p_MemMap->gen.mcfgr,mcfgr);
|
||||
mcfgr |= MCFGR_DMA_RST;
|
||||
WRITE_UINT32(p_Sec->p_MemMap->gen.mcfgr,mcfgr);
|
||||
do mcfgr = GET_UINT32(p_Sec->p_MemMap->gen.mcfgr);
|
||||
while ((p_Sec->p_MemMap->gen.mcfgr & MCFGR_DMA_RST) == MCFGR_DMA_RST);
|
||||
do mcfgr = GET_UINT32(p_Sec->p_MemMap->gen.mcfgr);
|
||||
while ((p_Sec->p_MemMap->gen.mcfgr & MCFGR_SWRST) == MCFGR_SWRST);
|
||||
}
|
||||
|
||||
if (p_Sec->p_DriverParam->addrSpace == e_SEC_ADDR_SPACE_64_BIT)
|
||||
mcfgr |= MCFGR_PS;
|
||||
|
||||
WRITE_UINT32(p_Sec->p_MemMap->gen.mcfgr,mcfgr);
|
||||
}
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
#include "debug_ext.h"
|
||||
|
||||
|
||||
static void PrintCcbJobStatus(t_SecJobStatus* p_JobStatus)
|
||||
{
|
||||
XX_Print("Source = Cryptographic Control Block\n");
|
||||
if (p_JobStatus->details.ccbDetails.jump)
|
||||
XX_Print("The descriptor made a jump to another descriptor\n");
|
||||
XX_Print("Index into the failing descriptor = %u\n",p_JobStatus->details.ccbDetails.descIndex);
|
||||
|
||||
switch (p_JobStatus->details.ccbDetails.algorithm)
|
||||
{
|
||||
case SEC_CCB_ALGORITHM_AES:
|
||||
XX_Print("Algorithm that generated the error = AES\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_DES_3DES:
|
||||
XX_Print("Algorithm that generated the error = DES or 3DES\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_ARC4:
|
||||
XX_Print("Algorithm that generated the error = ARC4\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_MD5_SHA:
|
||||
XX_Print("Algorithm that generated the error = MD5 or SHA\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_RNG:
|
||||
XX_Print("Algorithm that generated the error = RNG\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_SNOW_F8:
|
||||
XX_Print("Algorithm that generated the error = SNOW f8\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_KASUMI_F8_F9:
|
||||
XX_Print("Algorithm that generated the error = Kasumi f8 / f9\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_PUBLIC_KEY:
|
||||
XX_Print("Algorithm that generated the error = Public Key\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_CRC:
|
||||
XX_Print("Algorithm that generated the error = CRC\n");
|
||||
break;
|
||||
case SEC_CCB_ALGORITHM_SNOW_F9:
|
||||
XX_Print("Algorithm that generated the error = SNOW f9\n");
|
||||
break;
|
||||
}
|
||||
|
||||
switch (p_JobStatus->details.ccbDetails.descError)
|
||||
{
|
||||
case SEC_CCB_DESC_ERROR_NONE:
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_MODE:
|
||||
XX_Print("Descriptor error = Mode error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_DATA_SIZE:
|
||||
XX_Print("Descriptor error = Data size error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_KEY_SIZE:
|
||||
XX_Print("Descriptor error = Key size error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_PKHA_A_MEM_SIZE:
|
||||
XX_Print("Descriptor error = PKHA A memory size error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_PKHA_B_MEM_SIZE:
|
||||
XX_Print("Descriptor error = PKHA B memory size error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_DATA_OUT_OF_SEQ:
|
||||
XX_Print("Descriptor error = Data arrived out of sequence error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_PKHA_DIV_BY_ZERO:
|
||||
XX_Print("Descriptor error = PKHA divide-by-zero error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_PKHA_MODULES_EVEN:
|
||||
XX_Print("Descriptor error = PKHA modulus even error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_DES_KEY_PARITY:
|
||||
XX_Print("Descriptor error = DES key parity error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_ICV_CHECK:
|
||||
XX_Print("Descriptor error = ICV check failed\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_HARDWARE:
|
||||
XX_Print("Descriptor error = Hardware error\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_CCM_AAD_SIZE:
|
||||
XX_Print("Descriptor error = Unsupported CCM AAD size\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_CHA_NOT_RESET:
|
||||
XX_Print("Descriptor error = Class 1 CHA not reset\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_CHA_COMB_SELECTED:
|
||||
XX_Print("Descriptor error = Invalid CHA combination selected\n");
|
||||
break;
|
||||
case SEC_CCB_DESC_ERROR_CHA_SELECTED:
|
||||
XX_Print("Descriptor error = Invalid CHA selected\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void PrintJhuJobStatus(t_SecJobStatus* p_JobStatus)
|
||||
{
|
||||
XX_Print("Source = Jump Halt User\n");
|
||||
if (p_JobStatus->details.jhuDetails.jump)
|
||||
XX_Print("The descriptor made a jump to another descriptor\n");
|
||||
XX_Print("Index into the failing descriptor = %u\n",p_JobStatus->details.jhuDetails.descIndex);
|
||||
XX_Print("User status field from Jump command = %u\n",p_JobStatus->details.jhuDetails.status);
|
||||
}
|
||||
|
||||
|
||||
static void PrintDecoJobStatus(t_SecJobStatus* p_JobStatus)
|
||||
{
|
||||
XX_Print("Source = Descriptor Controller\n");
|
||||
if (p_JobStatus->details.decoDetails.jump)
|
||||
XX_Print("The descriptor made a jump to another descriptor\n");
|
||||
XX_Print("Index into the failing descriptor = %u\n",p_JobStatus->details.decoDetails.descIndex);
|
||||
|
||||
switch (p_JobStatus->details.decoDetails.descError)
|
||||
{
|
||||
case SEC_DECO_DESC_ERROR_NONE:
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_SGT_LENGTH:
|
||||
XX_Print("Descriptor error = SGT length error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_JQ_CONTROL:
|
||||
XX_Print("Descriptor error = JQ control error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_CMD:
|
||||
XX_Print("Descriptor error = Invalid command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_KEY_CMD:
|
||||
XX_Print("Descriptor error = Invalid Key command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_LOAD_CMD:
|
||||
XX_Print("Descriptor error = Invalid Load command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_STORE_CMD:
|
||||
XX_Print("Descriptor error = Invalid Store command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_OPERATION_CMD:
|
||||
XX_Print("Descriptor error = Invalid Operation command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_FIFO_LOAD_CMD:
|
||||
XX_Print("Descriptor error = Invalid Fifo-Load command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_FIFO_STORE_CMD:
|
||||
XX_Print("Descriptor error = Invalid Fifo-Store command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_MOVE_CMD:
|
||||
XX_Print("Descriptor error = Invalid Move command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_JUMP_CMD:
|
||||
XX_Print("Descriptor error = Invalid Jump command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_MATH_CMD:
|
||||
XX_Print("Descriptor error = Invalid Math command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_SIGNED_HASH_CMD:
|
||||
XX_Print("Descriptor error = Invalid Signed-Hash command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_SEQUENCE_CMD:
|
||||
XX_Print("Descriptor error = Invalid Sequence command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_SKIP_DATA_TYPE:
|
||||
XX_Print("Descriptor error = Skip data type invalid\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_SHARED_HEADER:
|
||||
XX_Print("Descriptor error = Shared header error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_HEADER:
|
||||
XX_Print("Descriptor error = Header error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_BURSTER:
|
||||
XX_Print("Descriptor error = Burster error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_CONTEXT_REG_LEN:
|
||||
XX_Print("Descriptor error = Context register length error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_DMA:
|
||||
XX_Print("Descriptor error = DMA error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_JQ_RESET:
|
||||
XX_Print("Descriptor error = Job failed due to job queue reset\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_FAIL_MODE:
|
||||
XX_Print("Descriptor error = Job failed due to fail mode\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_WATCHDOG_TIMEOUT:
|
||||
XX_Print("Descriptor error = Watchdog timer timeout error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_KEY_COPY:
|
||||
XX_Print("Descriptor error = Key copy failure\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_DATA_COPY:
|
||||
XX_Print("Descriptor error = Data copy failure\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_LIODN:
|
||||
XX_Print("Descriptor error = LIODN error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_RESET:
|
||||
XX_Print("Descriptor error = Reset initiated via the DRR\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_NONCE:
|
||||
XX_Print("Descriptor error = Nonce error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_META_DATA_SIZE:
|
||||
XX_Print("Descriptor error = Meta data too large\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_DNR:
|
||||
XX_Print("Descriptor error = DNR (do not run) error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_PROTOCOL_CMD:
|
||||
XX_Print("Descriptor error = Undefined protocol command\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_PDB_SETTIGS:
|
||||
XX_Print("Descriptor error = Invalid setting in PDB\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_LATE:
|
||||
XX_Print("Descriptor error = Anti-replay late error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_REPLAY:
|
||||
XX_Print("Descriptor error = Anti-replay replay error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_SEQ_NUM_OVERFLOW:
|
||||
XX_Print("Descriptor error = Sequence number overflow\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_SIGVER_SIGNATURE:
|
||||
XX_Print("Descriptor error = Sigver invalid signature\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_DSA_SIGN:
|
||||
XX_Print("Descriptor error = DSA sign illegal test descriptor\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_PROTOCOL_FORMAT:
|
||||
XX_Print("Descriptor error = Protocol format error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_PROTOCOL_SIZE:
|
||||
XX_Print("Descriptor error = Protocol size error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_BLOB_MODE:
|
||||
XX_Print("Descriptor error = Undefined blob mode\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_BLOB_SEC_MEM_MODE:
|
||||
XX_Print("Descriptor error = Secure memory blob mode error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_BLOB_KEY_SIZE:
|
||||
XX_Print("Descriptor error = Black blob key or input size error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_BLOB_KEY_DEST:
|
||||
XX_Print("Descriptor error = Invalid key destination\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_BLOB_TRST_SEC_MODE:
|
||||
XX_Print("Descriptor error = Trusted/Secure mode error\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_TTL_OR_HOP_LIMIT:
|
||||
XX_Print("Descriptor error = IPsec TTL or hop limit field 0\n");
|
||||
break;
|
||||
case SEC_DECO_DESC_ERROR_3GPP_HFN:
|
||||
XX_Print("Descriptor error = 3GPP HFN matches or exceeds threshold\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void PrintJqJobStatus(t_SecJobStatus* p_JobStatus)
|
||||
{
|
||||
XX_Print("Source = Job Queue\n");
|
||||
XX_Print("Number of descriptor addresses requested = %u\n",p_JobStatus->details.jqDetails.numOfDars);
|
||||
|
||||
switch (p_JobStatus->details.jqDetails.descError)
|
||||
{
|
||||
case SEC_JQ_DESC_ERROR_NONE:
|
||||
break;
|
||||
case SEC_JQ_DESC_ERROR_READ_DESC_ADDR:
|
||||
XX_Print("Descriptor error = Error reading the descriptor address\n");
|
||||
break;
|
||||
case SEC_JQ_DESC_ERROR_READ_DESC:
|
||||
XX_Print("Descriptor error = Error reading the descriptor\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void PrintJhtJobStatus(t_SecJobStatus* p_JobStatus)
|
||||
{
|
||||
XX_Print("Source = Jump Halt Test\n");
|
||||
if (p_JobStatus->details.jhtDetails.jump)
|
||||
XX_Print("The descriptor made a jump to another descriptor\n");
|
||||
XX_Print("Index into the failing descriptor = %u\n",p_JobStatus->details.jhtDetails.descIndex);
|
||||
|
||||
if (p_JobStatus->details.jhtDetails.condCodes & SEC_JHT_ERROR_PKHA_IS_ZERO)
|
||||
XX_Print("The result of a PKHA operation is zero\n");
|
||||
if (p_JobStatus->details.jhtDetails.condCodes & SEC_JHT_ERROR_PKHA_GCD_ONE)
|
||||
XX_Print("The greatest common divisor of two numbers is one\n");
|
||||
if (p_JobStatus->details.jhtDetails.condCodes & SEC_JHT_ERROR_PKHA_IS_PRIME)
|
||||
XX_Print("The given number is probably prime\n");
|
||||
if (p_JobStatus->details.jhtDetails.condCodes & SEC_JHT_ERROR_MATH_N)
|
||||
XX_Print("The result is negative\n");
|
||||
if (p_JobStatus->details.jhtDetails.condCodes & SEC_JHT_ERROR_MATH_Z)
|
||||
XX_Print("The result of a math operation is zero\n");
|
||||
if (p_JobStatus->details.jhtDetails.condCodes & SEC_JHT_ERROR_MATH_C)
|
||||
XX_Print("The math operation resulted in a carry or borrow\n");
|
||||
if (p_JobStatus->details.jhtDetails.condCodes & SEC_JHT_ERROR_MATH_NV)
|
||||
XX_Print("A combination of the sign bit and overflow\n");
|
||||
}
|
||||
|
||||
|
||||
static void DumpGenRegs(t_SecGenRegs* p_Regs,char* p_Title)
|
||||
{
|
||||
DECLARE_DUMP;
|
||||
DUMP_TITLE(p_Regs,(p_Title));
|
||||
DUMP_VAR(p_Regs,mcfgr );
|
||||
DUMP_VAR(p_Regs,jq0liodnr );
|
||||
DUMP_VAR(p_Regs,jq1liodnr );
|
||||
DUMP_VAR(p_Regs,jq2liodnr );
|
||||
DUMP_VAR(p_Regs,jq3liodnr );
|
||||
DUMP_VAR(p_Regs,rticaliodnr);
|
||||
DUMP_VAR(p_Regs,rticbliodnr);
|
||||
DUMP_VAR(p_Regs,rticcliodnr);
|
||||
DUMP_VAR(p_Regs,rticdliodnr);
|
||||
DUMP_VAR(p_Regs,decoreqr );
|
||||
DUMP_VAR(p_Regs,deco0liodnr);
|
||||
DUMP_VAR(p_Regs,deco1liodnr);
|
||||
DUMP_VAR(p_Regs,deco2liodnr);
|
||||
DUMP_VAR(p_Regs,deco3liodnr);
|
||||
DUMP_VAR(p_Regs,deco4liodnr);
|
||||
DUMP_VAR(p_Regs,decoavlr );
|
||||
DUMP_VAR(p_Regs,decorstr );
|
||||
DUMP_ARR(p_Regs,jdkekr );
|
||||
DUMP_ARR(p_Regs,tdkekr );
|
||||
DUMP_ARR(p_Regs,tdskr );
|
||||
DUMP_VAR(p_Regs,sknr );
|
||||
}
|
||||
|
||||
|
||||
static void DumpStatRegs(t_SecStatRegs* p_Regs,char* p_Title)
|
||||
{
|
||||
DECLARE_DUMP;
|
||||
DUMP_TITLE(p_Regs,(p_Title));
|
||||
DUMP_VAR(p_Regs,req_deq );
|
||||
DUMP_VAR(p_Regs,ob_enc_req );
|
||||
DUMP_VAR(p_Regs,ib_dec_req );
|
||||
DUMP_VAR(p_Regs,ob_encrypt );
|
||||
DUMP_VAR(p_Regs,ob_protect );
|
||||
DUMP_VAR(p_Regs,ib_decrypt );
|
||||
DUMP_VAR(p_Regs,ib_validated);
|
||||
DUMP_VAR(p_Regs,crnr );
|
||||
DUMP_VAR(p_Regs,ctpr );
|
||||
DUMP_VAR(p_Regs,far );
|
||||
DUMP_VAR(p_Regs,falr );
|
||||
DUMP_VAR(p_Regs,fadr );
|
||||
DUMP_VAR(p_Regs,sstar );
|
||||
DUMP_VAR(p_Regs,rvidr );
|
||||
DUMP_VAR(p_Regs,ccbvidr );
|
||||
DUMP_VAR(p_Regs,chavidr );
|
||||
DUMP_VAR(p_Regs,chanumr );
|
||||
DUMP_VAR(p_Regs,secvidr );
|
||||
}
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/* Internal Routines (above) */
|
||||
/*****************************/
|
||||
@@ -0,0 +1,42 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __SEC_H
|
||||
#define __SEC_H
|
||||
|
||||
|
||||
#include "sec_ext.h"
|
||||
#include "sec_regs.h"
|
||||
|
||||
|
||||
typedef struct t_SecDriverParam
|
||||
{
|
||||
uint32_t guestId ; /* Guest ID */
|
||||
uint64_t baseAddr ; /* Base address */
|
||||
e_SecSoftReset softReset; /* Soft reset */
|
||||
e_SecAddrSpace addrSpace; /* Address space */
|
||||
}
|
||||
t_SecDriverParam;
|
||||
|
||||
|
||||
typedef struct t_Sec
|
||||
{
|
||||
t_SecDriverParam* p_DriverParam; /* Driver parameters */
|
||||
t_SecGenMemMap* p_MemMap ; /* Memory-mapped registers */
|
||||
}
|
||||
t_Sec;
|
||||
|
||||
|
||||
#define DEFAULT_softReset e_SEC_SOFT_RESET_ON_INIT
|
||||
#define DEFAULT_addrSpace e_SEC_ADDR_SPACE_64_BIT
|
||||
|
||||
|
||||
#endif /* __SEC_H */
|
||||
@@ -0,0 +1,612 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/* Include the internal definitions of this module */
|
||||
#include "sec_jq.h"
|
||||
|
||||
|
||||
/* Include the external interfaces of other modules */
|
||||
#include "xx_ext.h"
|
||||
#include "part_ext.h"
|
||||
#include "error_ext.h"
|
||||
#include "string_ext.h"
|
||||
|
||||
/* wind river start */
|
||||
/* Needed for memory barrier during job dequeueing */
|
||||
#include <vxAtomicLib.h>
|
||||
/* wind river end */
|
||||
|
||||
#define __ERR_MODULE__ MODULE_SEC
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_SecJq* p_SecJq);
|
||||
|
||||
|
||||
static t_Error InitRings(t_SecJq* p_SecJq);
|
||||
static t_Error InitIntrs(t_SecJq* p_SecJq);
|
||||
static t_Error InitLiodn(t_SecJq* p_SecJq);
|
||||
|
||||
|
||||
static void InitRegs(t_SecJq* p_SecJq);
|
||||
|
||||
|
||||
static void Isr(t_Handle h_SecJq);
|
||||
|
||||
|
||||
static void DumpJqRegs (t_SecJqRegs * p_Regs,char* p_Title);
|
||||
static void DumpStatRegs(t_SecStatRegs* p_Regs,char* p_Title);
|
||||
|
||||
|
||||
/*******************************/
|
||||
/* Initialization Unit (below) */
|
||||
|
||||
|
||||
t_Handle SEC_JQ_Config(t_SecJqParam* p_Param)
|
||||
{
|
||||
t_SecJq* p_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Param,E_NULL_POINTER);
|
||||
|
||||
/* Allocate the driver structure */
|
||||
/* windriver start */
|
||||
/* p_SecJq = (t_SecJq*)XX_Malloc(sizeof(t_SecJq)); */
|
||||
p_SecJq = (t_SecJq*)XX_MallocSmart(sizeof(t_SecJq), p_Param->memId, 1);
|
||||
/* windriver end */
|
||||
if (p_SecJq == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Driver"));
|
||||
return (t_Handle)p_SecJq;
|
||||
}
|
||||
memset(p_SecJq,0,sizeof(t_SecJq));
|
||||
|
||||
/* Allocate the driver parameters structure */
|
||||
p_SecJq->p_DriverParam = (t_SecJqDriverParam*)XX_Malloc(sizeof(t_SecJqDriverParam));
|
||||
if (p_SecJq->p_DriverParam == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Driver parameters"));
|
||||
return (t_Handle)p_SecJq;
|
||||
}
|
||||
memset(p_SecJq->p_DriverParam,0,sizeof(t_SecJqDriverParam));
|
||||
|
||||
/* Configure the driver parameters */
|
||||
p_SecJq->p_DriverParam->h_Sec = p_Param->h_Sec ;
|
||||
p_SecJq->p_DriverParam->baseAddr = p_Param->baseAddr ;
|
||||
p_SecJq->p_DriverParam->jobQueueId = p_Param->jobQueueId ;
|
||||
p_SecJq->p_DriverParam->seqLiodnVal = p_Param->seqLiodnVal ;
|
||||
p_SecJq->p_DriverParam->nonSeqLiodnVal = p_Param->nonSeqLiodnVal;
|
||||
p_SecJq->p_DriverParam->allowMtdJobs = DEFAULT_allowMtdJobs ;
|
||||
p_SecJq->p_DriverParam->inputRingLen = DEFAULT_inputRingLen ;
|
||||
p_SecJq->p_DriverParam->inputRingMemId = DEFAULT_inputRingMemId ;
|
||||
p_SecJq->p_DriverParam->outputRingLen = DEFAULT_outputRingLen ;
|
||||
p_SecJq->p_DriverParam->outputRingMemId = DEFAULT_outputRingMemId;
|
||||
p_SecJq->p_DriverParam->intrJobCountThr = DEFAULT_intrJobCountThr;
|
||||
p_SecJq->p_DriverParam->intrTicCountThr = DEFAULT_intrTicCountThr;
|
||||
p_SecJq->p_DriverParam->icdByteSwap = DEFAULT_icdByteSwap ;
|
||||
p_SecJq->p_DriverParam->ocdByteSwap = DEFAULT_ocdByteSwap ;
|
||||
p_SecJq->p_DriverParam->imdByteSwap = DEFAULT_imdByteSwap ;
|
||||
p_SecJq->p_DriverParam->omdByteSwap = DEFAULT_omdByteSwap ;
|
||||
p_SecJq->p_DriverParam->f_Cbr = p_Param->f_Cbr ;
|
||||
p_SecJq->p_DriverParam->h_App = p_Param->h_App ;
|
||||
p_SecJq->p_DriverParam->irq = p_Param->irq ;
|
||||
|
||||
return (t_Handle)p_SecJq;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_JQ_Init(t_Handle h_SecJq)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
t_Error errCode;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam,E_INVALID_STATE);
|
||||
CHECK_INIT_PARAMETERS(p_SecJq,CheckInitParameters);
|
||||
|
||||
p_SecJq->p_MemMap = CAST_UINT64_TO_POINTER(p_SecJq->p_DriverParam->baseAddr);
|
||||
p_SecJq->secPtrLength = SEC_GetPtrSize(p_SecJq->p_DriverParam->h_Sec)/sizeof(uint32_t);
|
||||
p_SecJq->corePtrLength = sizeof(void*)/sizeof(uint32_t);
|
||||
p_SecJq->f_Cbr = p_SecJq->p_DriverParam->f_Cbr;
|
||||
p_SecJq->h_App = p_SecJq->p_DriverParam->h_App;
|
||||
|
||||
errCode = InitRings(p_SecJq);
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR,errCode,NO_MSG);
|
||||
errCode = InitIntrs(p_SecJq);
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR,errCode,NO_MSG);
|
||||
errCode = InitLiodn(p_SecJq);
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR,errCode,NO_MSG);
|
||||
|
||||
InitRegs(p_SecJq);
|
||||
|
||||
XX_Free(p_SecJq->p_DriverParam);
|
||||
p_SecJq->p_DriverParam = NULL;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_JQ_Free(t_Handle h_SecJq)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
|
||||
if (p_SecJq->p_DriverParam)
|
||||
XX_Free(p_SecJq->p_DriverParam);
|
||||
if (p_SecJq->inputRing.p_BaseAddr)
|
||||
XX_FreeSmart(p_SecJq->inputRing.p_BaseAddr);
|
||||
if (p_SecJq->outputRing.p_BaseAddr)
|
||||
XX_FreeSmart(p_SecJq->outputRing.p_BaseAddr);
|
||||
XX_Free(p_SecJq);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Initialization Unit (above) */
|
||||
/*******************************/
|
||||
|
||||
|
||||
/***************************************/
|
||||
/* Advanced Configuration Unit (below) */
|
||||
|
||||
|
||||
t_Error SEC_JQ_ConfigAllowMtdJobs(t_Handle h_SecJq,
|
||||
bool allowMtdJobs)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam,E_INVALID_STATE);
|
||||
|
||||
p_SecJq->p_DriverParam->allowMtdJobs = allowMtdJobs;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_JQ_ConfigInputRing(t_Handle h_SecJq,
|
||||
t_SecJqRingParam* p_RingParam)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_RingParam,E_NULL_POINTER);
|
||||
|
||||
p_SecJq->p_DriverParam->inputRingLen = p_RingParam->len ;
|
||||
p_SecJq->p_DriverParam->inputRingMemId = p_RingParam->memId;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_JQ_ConfigOutputRing(t_Handle h_SecJq,
|
||||
t_SecJqRingParam* p_RingParam)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_RingParam,E_NULL_POINTER);
|
||||
|
||||
p_SecJq->p_DriverParam->outputRingLen = p_RingParam->len ;
|
||||
p_SecJq->p_DriverParam->outputRingMemId = p_RingParam->memId;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_JQ_ConfigInterrupts(t_Handle h_SecJq,
|
||||
t_SecJqIntrParam* p_IntrParam)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_IntrParam,E_NULL_POINTER);
|
||||
|
||||
p_SecJq->p_DriverParam->intrJobCountThr = p_IntrParam->jobCountThr;
|
||||
p_SecJq->p_DriverParam->intrTicCountThr = p_IntrParam->ticCountThr;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_JQ_ConfigByteSwap(t_Handle h_SecJq,
|
||||
t_SecJqByteSwapParam* p_ByteSwapParam)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_ByteSwapParam,E_NULL_POINTER);
|
||||
|
||||
p_SecJq->p_DriverParam->icdByteSwap = p_ByteSwapParam->icd;
|
||||
p_SecJq->p_DriverParam->ocdByteSwap = p_ByteSwapParam->ocd;
|
||||
p_SecJq->p_DriverParam->imdByteSwap = p_ByteSwapParam->imd;
|
||||
p_SecJq->p_DriverParam->omdByteSwap = p_ByteSwapParam->omd;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Advanced Configuration Unit (above) */
|
||||
/***************************************/
|
||||
|
||||
|
||||
/********************************/
|
||||
/* Runtime Control Unit (below) */
|
||||
|
||||
|
||||
t_Error SEC_JQ_Enqueue(t_Handle h_SecJq,
|
||||
void* p_JobDesc,
|
||||
t_Handle h_Context)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
uint32_t secPtrLength;
|
||||
uint32_t corePtrLength;
|
||||
|
||||
uint32_t* p_BaseAddr;
|
||||
uint32_t numOfEntries;
|
||||
uint32_t nextEntryIndex;
|
||||
|
||||
uint32_t* p_JobDescAddr;
|
||||
uint32_t* p_JobDescRing;
|
||||
|
||||
uint32_t i,j;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_JobDesc,E_NULL_POINTER);
|
||||
|
||||
secPtrLength = p_SecJq->secPtrLength;
|
||||
corePtrLength = p_SecJq->corePtrLength;
|
||||
|
||||
p_BaseAddr = p_SecJq->inputRing.p_BaseAddr;
|
||||
numOfEntries = p_SecJq->inputRing.numOfEntries;
|
||||
nextEntryIndex = p_SecJq->inputRing.nextEntryIndex;
|
||||
|
||||
p_JobDescAddr = (uint32_t*)&p_JobDesc;
|
||||
|
||||
if (GET_UINT32(p_SecJq->p_MemMap->jq.irsar) != 0)
|
||||
{
|
||||
p_JobDescRing = p_BaseAddr+nextEntryIndex;
|
||||
for (i=0; i<secPtrLength-corePtrLength; i++)
|
||||
WRITE_UINT32(p_JobDescRing[i],0);
|
||||
for (j=i; j<secPtrLength; j++)
|
||||
WRITE_UINT32(p_JobDescRing[j],XX_VirtToPhys(p_JobDescAddr[j-i])); /* Interpeak: TODO: Make it generic for all ptr sizes */
|
||||
/* This is ok for secPtrLength=2, corePtrLength=1 */
|
||||
((t_Handle*)p_JobDesc)[-1] = h_Context;
|
||||
WRITE_UINT32(p_SecJq->p_MemMap->jq.irjar,1);
|
||||
nextEntryIndex = (nextEntryIndex+secPtrLength)%numOfEntries;
|
||||
}
|
||||
else
|
||||
RETURN_ERROR(MAJOR,E_FULL,("Input ring"));
|
||||
|
||||
p_SecJq->inputRing.nextEntryIndex = nextEntryIndex;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_JQ_Dequeue(t_Handle h_SecJq)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
void* p_JobDesc;
|
||||
t_Handle h_Context;
|
||||
|
||||
uint32_t secPtrLength;
|
||||
uint32_t corePtrLength;
|
||||
|
||||
uint32_t* p_BaseAddr;
|
||||
uint32_t numOfEntries;
|
||||
uint32_t nextEntryIndex;
|
||||
|
||||
uint32_t* p_JobDescAddr;
|
||||
uint32_t* p_JobDescRing;
|
||||
|
||||
uint32_t i,j;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
secPtrLength = p_SecJq->secPtrLength;
|
||||
corePtrLength = p_SecJq->corePtrLength;
|
||||
|
||||
p_BaseAddr = p_SecJq->outputRing.p_BaseAddr;
|
||||
numOfEntries = p_SecJq->outputRing.numOfEntries;
|
||||
nextEntryIndex = p_SecJq->outputRing.nextEntryIndex;
|
||||
|
||||
p_JobDescAddr = (uint32_t*)&p_JobDesc;
|
||||
|
||||
/* wind river start */
|
||||
/* Memory barrier due to errors for optimized code */
|
||||
VX_MEM_BARRIER_RW();
|
||||
/* wind river end */
|
||||
|
||||
while (GET_UINT32(p_SecJq->p_MemMap->jq.orsfr) != 0)
|
||||
{
|
||||
p_JobDescRing = p_BaseAddr+nextEntryIndex;
|
||||
for (i=0; i<secPtrLength-corePtrLength; i++)
|
||||
ASSERT_COND(GET_UINT32(p_JobDescRing[i])==0);
|
||||
#if 1 /* wind river start*/
|
||||
/* corePtrLength = 1, secPtrLength = 2 TODO: Make it work for all cases */
|
||||
*p_JobDescAddr = CAST_POINTER_TO_UINT32(XX_PhysToVirt(GET_UINT64(*p_JobDescRing)));
|
||||
#else
|
||||
for (j=i; j<secPtrLength; j++)
|
||||
p_JobDescAddr[j-i] = GET_UINT32(p_JobDescRing[j]);
|
||||
#endif /* wind river end*/
|
||||
h_Context = ((t_Handle*)p_JobDesc)[-1];
|
||||
p_SecJq->f_Cbr(p_SecJq->h_App,p_JobDesc,h_Context,GET_UINT32(p_JobDescRing[secPtrLength]));
|
||||
WRITE_UINT32(p_SecJq->p_MemMap->jq.orjrr,1);
|
||||
/* wind river start */
|
||||
/* Optimized code might not let the write to ORJRR complete before reading ORSFR */
|
||||
VX_MEM_BARRIER_RW();
|
||||
/* wind river end */
|
||||
nextEntryIndex = (nextEntryIndex+secPtrLength+1)%numOfEntries;
|
||||
}
|
||||
|
||||
p_SecJq->outputRing.nextEntryIndex = nextEntryIndex;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
void SEC_JQ_DumpRegisters(t_Handle h_SecJq)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecJq,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecJq->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
DumpJqRegs (&p_SecJq->p_MemMap->jq ,"JQ Registers" );
|
||||
DumpStatRegs(&p_SecJq->p_MemMap->stat,"Status Registers");
|
||||
}
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/* Runtime Control Unit (above) */
|
||||
/********************************/
|
||||
|
||||
|
||||
/*****************************/
|
||||
/* Internal Routines (below) */
|
||||
|
||||
|
||||
#define CHECK_RANGE(par,msg) if (!IN_RANGE(MIN_VAL_##par,p_SecJq->p_DriverParam->par,MAX_VAL_##par)) \
|
||||
RETURN_ERROR(MAJOR,E_NOT_IN_RANGE,("%s must be between %d-%d",msg,MIN_VAL_##par,MAX_VAL_##par))
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_SecJq* p_SecJq)
|
||||
{
|
||||
if (p_SecJq->p_DriverParam->h_Sec == NULL)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_HANDLE,("SEC object"));
|
||||
if (p_SecJq->p_DriverParam->baseAddr == 0)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_VALUE,("Base address"));
|
||||
|
||||
CHECK_RANGE(seqLiodnVal ,"Sequential LIODN value" );
|
||||
CHECK_RANGE(nonSeqLiodnVal,"Non-sequential LIODN value" );
|
||||
CHECK_RANGE(inputRingLen ,"Input ring number of entries" );
|
||||
CHECK_RANGE(outputRingLen ,"Output ring number of entries");
|
||||
|
||||
if (p_SecJq->p_DriverParam->irq != NO_IRQ)
|
||||
{
|
||||
if ((p_SecJq->p_DriverParam->intrJobCountThr==1) ^
|
||||
(p_SecJq->p_DriverParam->intrTicCountThr==0))
|
||||
RETURN_ERROR(MAJOR,E_CONFLICT,("Interrupt thresholds"));
|
||||
CHECK_RANGE(intrJobCountThr,"Interrupt job-count threshold");
|
||||
#ifndef __GNUC__ /* TODO: Why doesn't this compile with Gnu??? */
|
||||
CHECK_RANGE(intrTicCountThr,"Interrupt tic-count threshold");
|
||||
#endif
|
||||
}
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
static t_Error InitRings(t_SecJq* p_SecJq)
|
||||
{
|
||||
uint32_t inputRingLen = p_SecJq->p_DriverParam->inputRingLen ;
|
||||
int inputRingMemId = p_SecJq->p_DriverParam->inputRingMemId ;
|
||||
uint32_t outputRingLen = p_SecJq->p_DriverParam->outputRingLen ;
|
||||
int outputRingMemId = p_SecJq->p_DriverParam->outputRingMemId;
|
||||
|
||||
uint32_t sizeOfRing;
|
||||
|
||||
sizeOfRing = inputRingLen*(p_SecJq->secPtrLength+0)*sizeof(uint32_t);
|
||||
p_SecJq->inputRing.p_BaseAddr = (uint32_t*)XX_MallocSmart(sizeOfRing,inputRingMemId,sizeof(uint32_t));
|
||||
if (p_SecJq->inputRing.p_BaseAddr == NULL)
|
||||
RETURN_ERROR(MAJOR,E_NO_MEMORY,("Input ring"));
|
||||
p_SecJq->inputRing.numOfEntries = sizeOfRing/sizeof(uint32_t);
|
||||
|
||||
sizeOfRing = outputRingLen*(p_SecJq->secPtrLength+1)*sizeof(uint32_t);
|
||||
p_SecJq->outputRing.p_BaseAddr = (uint32_t*)XX_MallocSmart(sizeOfRing,outputRingMemId,sizeof(uint32_t));
|
||||
if (p_SecJq->outputRing.p_BaseAddr == NULL)
|
||||
RETURN_ERROR(MAJOR,E_NO_MEMORY,("Output ring"));
|
||||
p_SecJq->outputRing.numOfEntries = sizeOfRing/sizeof(uint32_t);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
static t_Error InitIntrs(t_SecJq* p_SecJq)
|
||||
{
|
||||
t_Error errCode;
|
||||
|
||||
int irq = p_SecJq->p_DriverParam->irq;
|
||||
|
||||
if (irq != NO_IRQ)
|
||||
{
|
||||
errCode = XX_SetIntr(irq,Isr,p_SecJq);
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR,errCode,NO_MSG);
|
||||
errCode = XX_EnableIntr(irq);
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR,errCode,NO_MSG);
|
||||
}
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
static t_Error InitLiodn(t_SecJq* p_SecJq)
|
||||
{
|
||||
t_Error errCode;
|
||||
|
||||
t_Handle h_Sec = p_SecJq->p_DriverParam->h_Sec ;
|
||||
uint8_t jobQueueId = p_SecJq->p_DriverParam->jobQueueId ;
|
||||
uint16_t seqLiodnVal = p_SecJq->p_DriverParam->seqLiodnVal ;
|
||||
uint16_t nonSeqLiodnVal = p_SecJq->p_DriverParam->nonSeqLiodnVal;
|
||||
bool allowMtdJobs = p_SecJq->p_DriverParam->allowMtdJobs ;
|
||||
|
||||
errCode = SEC_InitJqLiodnReg(h_Sec,jobQueueId,seqLiodnVal,nonSeqLiodnVal,allowMtdJobs);
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR,errCode,NO_MSG);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
static void InitRegs(t_SecJq* p_SecJq)
|
||||
{
|
||||
uint64_t irbar = 0;
|
||||
uint32_t irsr = 0;
|
||||
uint64_t orbar = 0;
|
||||
uint32_t orsr = 0;
|
||||
uint64_t cfgr = 0;
|
||||
|
||||
uint32_t intrJobCountThr = p_SecJq->p_DriverParam->intrJobCountThr;
|
||||
uint32_t intrTicCountThr = p_SecJq->p_DriverParam->intrTicCountThr;
|
||||
e_SecByteSwap icdByteSwap = p_SecJq->p_DriverParam->icdByteSwap ;
|
||||
e_SecByteSwap ocdByteSwap = p_SecJq->p_DriverParam->ocdByteSwap ;
|
||||
e_SecByteSwap imdByteSwap = p_SecJq->p_DriverParam->imdByteSwap ;
|
||||
e_SecByteSwap omdByteSwap = p_SecJq->p_DriverParam->omdByteSwap ;
|
||||
|
||||
irbar = CAST_POINTER_TO_UINT64(p_SecJq->inputRing.p_BaseAddr);
|
||||
irbar = XX_VirtToPhys(CAST_UINT64_TO_POINTER(irbar)); /* Interpeak */
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecJq->p_MemMap->jq.irbar,irbar);
|
||||
|
||||
irsr = p_SecJq->p_DriverParam->inputRingLen;
|
||||
WRITE_UINT32(p_SecJq->p_MemMap->jq.irsr,irsr);
|
||||
|
||||
orbar = CAST_POINTER_TO_UINT64(p_SecJq->outputRing.p_BaseAddr);
|
||||
orbar = XX_VirtToPhys(CAST_UINT64_TO_POINTER(orbar)); /* Interpeak */
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecJq->p_MemMap->jq.orbar,orbar);
|
||||
|
||||
orsr = p_SecJq->p_DriverParam->outputRingLen;
|
||||
WRITE_UINT32(p_SecJq->p_MemMap->jq.orsr,orsr);
|
||||
|
||||
cfgr |= SEC_CalcByteSwapFlags(icdByteSwap,CFGR_CBSI,CFGR_CHWSI,CFGR_CWSI,CFGR_CDWSI);
|
||||
cfgr |= SEC_CalcByteSwapFlags(ocdByteSwap,CFGR_CBSO,CFGR_CHWSO,CFGR_CWSO,CFGR_CDWSO);
|
||||
cfgr |= SEC_CalcByteSwapFlags(imdByteSwap,CFGR_MBSI,CFGR_MHWSI,CFGR_MWSI,CFGR_MDWSI);
|
||||
cfgr |= SEC_CalcByteSwapFlags(omdByteSwap,CFGR_MBSO,CFGR_MHWSO,CFGR_MWSO,CFGR_MDWSO);
|
||||
if (p_SecJq->p_DriverParam->irq == NO_IRQ)
|
||||
{
|
||||
/* Disable interrupts */
|
||||
cfgr |= CFGR_IMSK;
|
||||
}
|
||||
else if (intrJobCountThr==1 || intrTicCountThr==0)
|
||||
{
|
||||
/* Enable interrupts */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Enable interrupt-coalescing */
|
||||
cfgr |= CFGR_ICEN;
|
||||
cfgr |= CFGR_ICDCT(intrJobCountThr );
|
||||
cfgr |= CFGR_ICTT (intrTicCountThr/SEC_JQ_INTR_TIC_COUNT_THR_UNITS);
|
||||
}
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecJq->p_MemMap->jq.cfgr,cfgr);
|
||||
}
|
||||
|
||||
|
||||
static void Isr(t_Handle h_SecJq)
|
||||
{
|
||||
t_SecJq* p_SecJq = (t_SecJq*)h_SecJq;
|
||||
|
||||
uint32_t istar;
|
||||
|
||||
istar = GET_UINT32(p_SecJq->p_MemMap->jq.istar);
|
||||
ASSERT_COND(ISTAR_ERR_TYPE(istar)==0);
|
||||
WRITE_UINT32(p_SecJq->p_MemMap->jq.istar,istar);
|
||||
|
||||
SEC_JQ_Dequeue(p_SecJq);
|
||||
}
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
#include "debug_ext.h"
|
||||
|
||||
|
||||
static void DumpJqRegs(t_SecJqRegs* p_Regs,char* p_Title)
|
||||
{
|
||||
DECLARE_DUMP;
|
||||
DUMP_TITLE(p_Regs,(p_Title));
|
||||
DUMP_VAR(p_Regs,irbar);
|
||||
DUMP_VAR(p_Regs,irsr );
|
||||
DUMP_VAR(p_Regs,irsar);
|
||||
DUMP_VAR(p_Regs,irjar);
|
||||
DUMP_VAR(p_Regs,orbar);
|
||||
DUMP_VAR(p_Regs,orsr );
|
||||
DUMP_VAR(p_Regs,orjrr);
|
||||
DUMP_VAR(p_Regs,orsfr);
|
||||
DUMP_VAR(p_Regs,ostar);
|
||||
DUMP_VAR(p_Regs,istar);
|
||||
DUMP_VAR(p_Regs,cfgr );
|
||||
DUMP_VAR(p_Regs,irrir);
|
||||
DUMP_VAR(p_Regs,orwir);
|
||||
DUMP_VAR(p_Regs,cmdr );
|
||||
}
|
||||
|
||||
|
||||
static void DumpStatRegs(t_SecStatRegs* p_Regs,char* p_Title)
|
||||
{
|
||||
DECLARE_DUMP;
|
||||
DUMP_TITLE(p_Regs,(p_Title));
|
||||
DUMP_VAR(p_Regs,req_deq );
|
||||
DUMP_VAR(p_Regs,ob_enc_req );
|
||||
DUMP_VAR(p_Regs,ib_dec_req );
|
||||
DUMP_VAR(p_Regs,ob_encrypt );
|
||||
DUMP_VAR(p_Regs,ob_protect );
|
||||
DUMP_VAR(p_Regs,ib_decrypt );
|
||||
DUMP_VAR(p_Regs,ib_validated);
|
||||
DUMP_VAR(p_Regs,crnr );
|
||||
DUMP_VAR(p_Regs,ctpr );
|
||||
DUMP_VAR(p_Regs,far );
|
||||
DUMP_VAR(p_Regs,falr );
|
||||
DUMP_VAR(p_Regs,fadr );
|
||||
DUMP_VAR(p_Regs,sstar );
|
||||
DUMP_VAR(p_Regs,rvidr );
|
||||
DUMP_VAR(p_Regs,ccbvidr );
|
||||
DUMP_VAR(p_Regs,chavidr );
|
||||
DUMP_VAR(p_Regs,chanumr );
|
||||
DUMP_VAR(p_Regs,secvidr );
|
||||
}
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/* Internal Routines (above) */
|
||||
/*****************************/
|
||||
@@ -0,0 +1,98 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __SEC_JQ_H
|
||||
#define __SEC_JQ_H
|
||||
|
||||
|
||||
#include "sec_jq_ext.h"
|
||||
#include "sec_regs.h"
|
||||
|
||||
|
||||
typedef struct t_SecJqDriverParam
|
||||
{
|
||||
t_Handle h_Sec ; /* SEC object */
|
||||
uint64_t baseAddr ; /* Base address */
|
||||
uint8_t jobQueueId ; /* Job queue ID */
|
||||
uint16_t seqLiodnVal ; /* Sequential LIODN value */
|
||||
uint16_t nonSeqLiodnVal ; /* Non-sequential LIODN value */
|
||||
bool allowMtdJobs ; /* Allow MTD jobs */
|
||||
uint32_t inputRingLen ; /* Input ring number of entries */
|
||||
int inputRingMemId ; /* Input ring memory partition ID */
|
||||
uint32_t outputRingLen ; /* Output ring number of entries */
|
||||
int outputRingMemId; /* Output ring memory partition ID */
|
||||
uint32_t intrJobCountThr; /* Interrupt job-count threshold */
|
||||
uint32_t intrTicCountThr; /* Interrupt tic-count threshold */
|
||||
e_SecByteSwap icdByteSwap ; /* Input control data byte swap */
|
||||
e_SecByteSwap ocdByteSwap ; /* Output control data byte swap */
|
||||
e_SecByteSwap imdByteSwap ; /* Input message data byte swap */
|
||||
e_SecByteSwap omdByteSwap ; /* Output message data byte swap */
|
||||
t_SecJqCbr* f_Cbr ; /* Callback routine */
|
||||
t_Handle h_App ; /* Application */
|
||||
int irq ; /* IRQ */
|
||||
}
|
||||
t_SecJqDriverParam;
|
||||
|
||||
|
||||
typedef struct t_SecJqRing
|
||||
{
|
||||
uint32_t* p_BaseAddr ; /* Base address */
|
||||
uint32_t numOfEntries ; /* Number of 32-bit entries */
|
||||
uint32_t nextEntryIndex; /* Next 32-bit entry index */
|
||||
}
|
||||
t_SecJqRing;
|
||||
|
||||
|
||||
typedef struct t_SecJq
|
||||
{
|
||||
t_SecJqDriverParam* p_DriverParam; /* Driver parameters */
|
||||
t_SecJqMemMap* p_MemMap ; /* Memory-mapped registers */
|
||||
|
||||
uint32_t secPtrLength ; /* SEC pointer length in 32-bit units */
|
||||
uint32_t corePtrLength; /* Core pointer length in 32-bit units */
|
||||
|
||||
t_SecJqRing inputRing ; /* Input ring parameters */
|
||||
t_SecJqRing outputRing; /* Output ring parameters */
|
||||
|
||||
t_SecJqCbr* f_Cbr; /* Callback routine */
|
||||
t_Handle h_App; /* Application */
|
||||
}
|
||||
t_SecJq;
|
||||
|
||||
|
||||
#define DEFAULT_allowMtdJobs FALSE
|
||||
#define DEFAULT_inputRingLen 256
|
||||
#define DEFAULT_inputRingMemId 0
|
||||
#define DEFAULT_outputRingLen 256
|
||||
#define DEFAULT_outputRingMemId 0
|
||||
#define DEFAULT_intrJobCountThr 1
|
||||
#define DEFAULT_intrTicCountThr 0
|
||||
#define DEFAULT_icdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
#define DEFAULT_ocdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
#define DEFAULT_imdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
#define DEFAULT_omdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
|
||||
|
||||
#define MIN_VAL_seqLiodnVal 0x0000
|
||||
#define MAX_VAL_seqLiodnVal 0x0FFF
|
||||
#define MIN_VAL_nonSeqLiodnVal 0x0000
|
||||
#define MAX_VAL_nonSeqLiodnVal 0x0FFF
|
||||
#define MIN_VAL_inputRingLen 1
|
||||
#define MAX_VAL_inputRingLen 1023
|
||||
#define MIN_VAL_outputRingLen 1
|
||||
#define MAX_VAL_outputRingLen 1023
|
||||
#define MIN_VAL_intrJobCountThr 1
|
||||
#define MAX_VAL_intrJobCountThr 255
|
||||
#define MIN_VAL_intrTicCountThr 0
|
||||
#define MAX_VAL_intrTicCountThr 4194240 //(65535*SEC_JQ_INTR_TIC_COUNT_THR_UNITS)
|
||||
|
||||
|
||||
#endif /* __SEC_JQ_H */
|
||||
@@ -0,0 +1,414 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/* Include the internal definitions of this module */
|
||||
#include "sec_qi.h"
|
||||
|
||||
|
||||
/* Include the external interfaces of other modules */
|
||||
#include "xx_ext.h"
|
||||
#include "part_ext.h"
|
||||
#include "error_ext.h"
|
||||
#include "string_ext.h"
|
||||
|
||||
|
||||
#define __ERR_MODULE__ MODULE_SEC
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_SecQi* p_SecQi);
|
||||
|
||||
|
||||
static void InitRegs(t_SecQi* p_SecQi);
|
||||
|
||||
|
||||
static void DumpQiRegs (t_SecQiRegs * p_Regs,char* p_Title);
|
||||
static void DumpStatRegs(t_SecStatRegs* p_Regs,char* p_Title);
|
||||
|
||||
|
||||
/*******************************/
|
||||
/* Initialization Unit (below) */
|
||||
|
||||
|
||||
t_Handle SEC_QI_Config(t_SecQiParam* p_Param)
|
||||
{
|
||||
t_SecQi* p_SecQi;
|
||||
|
||||
SANITY_CHECK_EXIT(p_Param,E_NULL_POINTER);
|
||||
|
||||
/* Allocate the driver structure */
|
||||
p_SecQi = (t_SecQi*)XX_Malloc(sizeof(t_SecQi));
|
||||
if (p_SecQi == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Driver"));
|
||||
return (t_Handle)p_SecQi;
|
||||
}
|
||||
memset(p_SecQi,0,sizeof(t_SecQi));
|
||||
|
||||
/* Allocate the driver parameters structure */
|
||||
p_SecQi->p_DriverParam = (t_SecQiDriverParam*)XX_Malloc(sizeof(t_SecQiDriverParam));
|
||||
if (p_SecQi->p_DriverParam == NULL)
|
||||
{
|
||||
REPORT_ERROR(MAJOR,E_NO_MEMORY,("Driver parameters"));
|
||||
return (t_Handle)p_SecQi;
|
||||
}
|
||||
memset(p_SecQi->p_DriverParam,0,sizeof(t_SecQiDriverParam));
|
||||
|
||||
/* Configure the driver parameters */
|
||||
p_SecQi->p_DriverParam->h_Sec = p_Param->h_Sec ;
|
||||
p_SecQi->p_DriverParam->baseAddr = p_Param->baseAddr ;
|
||||
p_SecQi->p_DriverParam->seqLiodnBase = p_Param->seqLiodnBase ;
|
||||
p_SecQi->p_DriverParam->nonSeqLiodnBase = p_Param->nonSeqLiodnBase;
|
||||
p_SecQi->p_DriverParam->nonSeqLiodnMask = p_Param->nonSeqLiodnMask;
|
||||
p_SecQi->p_DriverParam->stopOnError = DEFAULT_stopOnError ;
|
||||
p_SecQi->p_DriverParam->enqFrameColor = DEFAULT_enqFrameColor ;
|
||||
p_SecQi->p_DriverParam->deqFrameCount = DEFAULT_deqFrameCount ;
|
||||
p_SecQi->p_DriverParam->deqScheduling = DEFAULT_deqScheduling ;
|
||||
p_SecQi->p_DriverParam->deqByteCountThr = DEFAULT_deqByteCountThr ;
|
||||
p_SecQi->p_DriverParam->deqSpfCountThr = DEFAULT_deqSpfCountThr ;
|
||||
p_SecQi->p_DriverParam->icdByteSwap = DEFAULT_icdByteSwap ;
|
||||
p_SecQi->p_DriverParam->ocdByteSwap = DEFAULT_ocdByteSwap ;
|
||||
p_SecQi->p_DriverParam->imdByteSwap = DEFAULT_imdByteSwap ;
|
||||
p_SecQi->p_DriverParam->omdByteSwap = DEFAULT_omdByteSwap ;
|
||||
|
||||
return (t_Handle)p_SecQi;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_QI_Init(t_Handle h_SecQi)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam,E_INVALID_STATE);
|
||||
CHECK_INIT_PARAMETERS(p_SecQi,CheckInitParameters);
|
||||
|
||||
p_SecQi->p_MemMap = CAST_UINT64_TO_POINTER(p_SecQi->p_DriverParam->baseAddr);
|
||||
|
||||
InitRegs(p_SecQi);
|
||||
|
||||
XX_Free(p_SecQi->p_DriverParam);
|
||||
p_SecQi->p_DriverParam = NULL;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_QI_Free(t_Handle h_SecQi)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
|
||||
if (p_SecQi->p_DriverParam)
|
||||
XX_Free(p_SecQi->p_DriverParam);
|
||||
XX_Free(p_SecQi);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Initialization Unit (above) */
|
||||
/*******************************/
|
||||
|
||||
|
||||
/***************************************/
|
||||
/* Advanced Configuration Unit (below) */
|
||||
|
||||
|
||||
t_Error SEC_QI_ConfigStopOnError(t_Handle h_SecQi,
|
||||
bool stopOnError)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam,E_INVALID_STATE);
|
||||
|
||||
p_SecQi->p_DriverParam->stopOnError = stopOnError;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_QI_ConfigCommands(t_Handle h_SecQi,
|
||||
t_SecQiCmdParam* p_CmdParam)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_CmdParam,E_NULL_POINTER);
|
||||
|
||||
p_SecQi->p_DriverParam->enqFrameColor = p_CmdParam->enqFrameColor ;
|
||||
p_SecQi->p_DriverParam->deqFrameCount = p_CmdParam->deqFrameCount ;
|
||||
p_SecQi->p_DriverParam->deqScheduling = p_CmdParam->deqScheduling ;
|
||||
p_SecQi->p_DriverParam->deqByteCountThr = p_CmdParam->deqByteCountThr;
|
||||
p_SecQi->p_DriverParam->deqSpfCountThr = p_CmdParam->deqSpfCountThr ;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_QI_ConfigByteSwap(t_Handle h_SecQi,
|
||||
t_SecQiByteSwapParam* p_ByteSwapParam)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_ByteSwapParam,E_NULL_POINTER);
|
||||
|
||||
p_SecQi->p_DriverParam->icdByteSwap = p_ByteSwapParam->icd;
|
||||
p_SecQi->p_DriverParam->ocdByteSwap = p_ByteSwapParam->ocd;
|
||||
p_SecQi->p_DriverParam->imdByteSwap = p_ByteSwapParam->imd;
|
||||
p_SecQi->p_DriverParam->omdByteSwap = p_ByteSwapParam->omd;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Advanced Configuration Unit (above) */
|
||||
/***************************************/
|
||||
|
||||
|
||||
/********************************/
|
||||
/* Runtime Control Unit (below) */
|
||||
|
||||
|
||||
t_Error SEC_QI_Enable(t_Handle h_SecQi)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
uint64_t ctlr;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
ctlr = SEC_GET_UINT64_HI_LO(p_SecQi->p_MemMap->qi.ctlr);
|
||||
ctlr |= CTLR_DQEN;
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecQi->p_MemMap->qi.ctlr,ctlr);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_QI_Disable(t_Handle h_SecQi)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
uint64_t ctlr;
|
||||
uint32_t star;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
ctlr = SEC_GET_UINT64_HI_LO(p_SecQi->p_MemMap->qi.ctlr);
|
||||
ctlr |= CTLR_STOP;
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecQi->p_MemMap->qi.ctlr,ctlr);
|
||||
|
||||
do star = GET_UINT32(p_SecQi->p_MemMap->qi.star);
|
||||
while (!STAR_STOPPED(star));
|
||||
|
||||
ctlr = SEC_GET_UINT64_HI_LO(p_SecQi->p_MemMap->qi.ctlr);
|
||||
ctlr |= CTLR_STOP;
|
||||
ctlr &= ~CTLR_DQEN;
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecQi->p_MemMap->qi.ctlr,ctlr);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_QI_RetrieveErrors(t_Handle h_SecQi,
|
||||
uint8_t* p_ErrorFlags)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
uint32_t star;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_ErrorFlags,E_NULL_POINTER);
|
||||
|
||||
star = GET_UINT32(p_SecQi->p_MemMap->qi.star); /* Read error indication bits */
|
||||
WRITE_UINT32(p_SecQi->p_MemMap->qi.star,star); /* Clear error indication bits */
|
||||
|
||||
*p_ErrorFlags = (uint8_t)STAR_ERRORS(star);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
t_Error SEC_QI_RetrieveJobStatus(t_Handle h_SecQi,
|
||||
t_SecQiJobStatus* p_JobStatus)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
uint64_t jbsstar;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
SANITY_CHECK_EXIT(p_JobStatus,E_NULL_POINTER);
|
||||
|
||||
jbsstar = SEC_GET_UINT64_HI_LO(p_SecQi->p_MemMap->qi.jbsstar);
|
||||
|
||||
p_JobStatus->done = (uint16_t)JBSSTAR_DONE (jbsstar);
|
||||
p_JobStatus->exec = (uint16_t)JBSSTAR_EXEC (jbsstar);
|
||||
p_JobStatus->inUse = (uint16_t)JBSSTAR_IN_USE(jbsstar);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
void SEC_QI_DumpRegisters(t_Handle h_SecQi)
|
||||
{
|
||||
t_SecQi* p_SecQi = (t_SecQi*)h_SecQi;
|
||||
|
||||
SANITY_CHECK_EXIT(p_SecQi,E_INVALID_HANDLE);
|
||||
SANITY_CHECK_EXIT(p_SecQi->p_DriverParam==NULL,E_INVALID_STATE);
|
||||
|
||||
DumpQiRegs (&p_SecQi->p_MemMap->qi ,"QI Registers" );
|
||||
DumpStatRegs(&p_SecQi->p_MemMap->stat,"Status Registers");
|
||||
}
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/* Runtime Control Unit (above) */
|
||||
/********************************/
|
||||
|
||||
|
||||
/*****************************/
|
||||
/* Internal Routines (below) */
|
||||
|
||||
|
||||
#define CHECK_RANGE(par,msg) if (!IN_RANGE(MIN_VAL_##par,p_SecQi->p_DriverParam->par,MAX_VAL_##par)) \
|
||||
RETURN_ERROR(MAJOR,E_NOT_IN_RANGE,("%s must be between %d-%d",msg,MIN_VAL_##par,MAX_VAL_##par))
|
||||
|
||||
|
||||
static t_Error CheckInitParameters(t_SecQi* p_SecQi)
|
||||
{
|
||||
if (p_SecQi->p_DriverParam->h_Sec == NULL)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_HANDLE,("SEC object"));
|
||||
if (p_SecQi->p_DriverParam->baseAddr == 0)
|
||||
RETURN_ERROR(MAJOR,E_INVALID_VALUE,("Base address"));
|
||||
|
||||
CHECK_RANGE(seqLiodnBase ,"Sequential LIODN base" );
|
||||
CHECK_RANGE(nonSeqLiodnBase,"Non-sequential LIODN base" );
|
||||
CHECK_RANGE(nonSeqLiodnMask,"Non-sequential LIODN offset mask" );
|
||||
CHECK_RANGE(deqByteCountThr,"Dequeue byte-count threshold" );
|
||||
CHECK_RANGE(deqSpfCountThr ,"Dequeue subportal-frame-count threshold");
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
static void InitRegs(t_SecQi* p_SecQi)
|
||||
{
|
||||
uint64_t ctlr = 0;
|
||||
uint64_t eqcr = 0;
|
||||
uint64_t dqcr = 0;
|
||||
uint64_t lcr = 0;
|
||||
|
||||
uint16_t seqLiodnBase = p_SecQi->p_DriverParam->seqLiodnBase ;
|
||||
uint16_t nonSeqLiodnBase = p_SecQi->p_DriverParam->nonSeqLiodnBase;
|
||||
uint16_t nonSeqLiodnMask = p_SecQi->p_DriverParam->nonSeqLiodnMask;
|
||||
bool stopOnError = p_SecQi->p_DriverParam->stopOnError ;
|
||||
e_SecQiFrameColor enqFrameColor = p_SecQi->p_DriverParam->enqFrameColor ;
|
||||
e_SecQiFrameCount deqFrameCount = p_SecQi->p_DriverParam->deqFrameCount ;
|
||||
e_SecQiScheduling deqScheduling = p_SecQi->p_DriverParam->deqScheduling ;
|
||||
uint32_t deqByteCountThr = p_SecQi->p_DriverParam->deqByteCountThr;
|
||||
uint32_t deqSpfCountThr = p_SecQi->p_DriverParam->deqSpfCountThr ;
|
||||
e_SecByteSwap icdByteSwap = p_SecQi->p_DriverParam->icdByteSwap ;
|
||||
e_SecByteSwap ocdByteSwap = p_SecQi->p_DriverParam->ocdByteSwap ;
|
||||
e_SecByteSwap imdByteSwap = p_SecQi->p_DriverParam->imdByteSwap ;
|
||||
e_SecByteSwap omdByteSwap = p_SecQi->p_DriverParam->omdByteSwap ;
|
||||
|
||||
ctlr |= SEC_CalcByteSwapFlags(icdByteSwap,CTLR_CBSI,CTLR_CHWSI,CTLR_CWSI,CTLR_CDWSI);
|
||||
ctlr |= SEC_CalcByteSwapFlags(ocdByteSwap,CTLR_CBSO,CTLR_CHWSO,CTLR_CWSO,CTLR_CDWSO);
|
||||
ctlr |= SEC_CalcByteSwapFlags(imdByteSwap,CTLR_MBSI,CTLR_MHWSI,CTLR_MWSI,CTLR_MDWSI);
|
||||
ctlr |= SEC_CalcByteSwapFlags(omdByteSwap,CTLR_MBSO,CTLR_MHWSO,CTLR_MWSO,CTLR_MDWSO);
|
||||
ctlr |= stopOnError? CTLR_SOE:0;
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecQi->p_MemMap->qi.ctlr,ctlr);
|
||||
|
||||
eqcr |= EQCR_CFCOLOR(enqFrameColor);
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecQi->p_MemMap->qi.eqcr,eqcr);
|
||||
|
||||
dqcr |= DQCR_SPFCNT(deqSpfCountThr );
|
||||
dqcr |= DQCR_CBCNT (deqByteCountThr);
|
||||
dqcr |= DQCR_FCNT (deqFrameCount );
|
||||
dqcr |= DQCR_CVERB (deqScheduling );
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecQi->p_MemMap->qi.dqcr,dqcr);
|
||||
|
||||
lcr |= LCR_NSLOM (nonSeqLiodnMask);
|
||||
lcr |= LCR_NSLIODNB(nonSeqLiodnBase);
|
||||
lcr |= LCR_SLIODNB (seqLiodnBase );
|
||||
SEC_WRITE_UINT64_HI_LO(p_SecQi->p_MemMap->qi.lcr,lcr);
|
||||
}
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
#include "debug_ext.h"
|
||||
|
||||
|
||||
static void DumpQiRegs(t_SecQiRegs* p_Regs,char* p_Title)
|
||||
{
|
||||
DECLARE_DUMP;
|
||||
DUMP_TITLE(p_Regs,(p_Title));
|
||||
DUMP_VAR(p_Regs,ctlr );
|
||||
DUMP_VAR(p_Regs,star );
|
||||
DUMP_VAR(p_Regs,dqcr );
|
||||
DUMP_VAR(p_Regs,eqcr );
|
||||
DUMP_VAR(p_Regs,lcr );
|
||||
DUMP_ARR(p_Regs,idpr_phr );
|
||||
DUMP_ARR(p_Regs,lr_isr );
|
||||
DUMP_ARR(p_Regs,ifdhr_ifdlr);
|
||||
DUMP_ARR(p_Regs,ofdhr_ofdlr);
|
||||
DUMP_ARR(p_Regs,cfdhr_cfdlr);
|
||||
DUMP_VAR(p_Regs,jbsstar );
|
||||
DUMP_VAR(p_Regs,spstar );
|
||||
}
|
||||
|
||||
|
||||
static void DumpStatRegs(t_SecStatRegs* p_Regs,char* p_Title)
|
||||
{
|
||||
DECLARE_DUMP;
|
||||
DUMP_TITLE(p_Regs,(p_Title));
|
||||
DUMP_VAR(p_Regs,req_deq );
|
||||
DUMP_VAR(p_Regs,ob_enc_req );
|
||||
DUMP_VAR(p_Regs,ib_dec_req );
|
||||
DUMP_VAR(p_Regs,ob_encrypt );
|
||||
DUMP_VAR(p_Regs,ob_protect );
|
||||
DUMP_VAR(p_Regs,ib_decrypt );
|
||||
DUMP_VAR(p_Regs,ib_validated);
|
||||
DUMP_VAR(p_Regs,crnr );
|
||||
DUMP_VAR(p_Regs,ctpr );
|
||||
DUMP_VAR(p_Regs,far );
|
||||
DUMP_VAR(p_Regs,falr );
|
||||
DUMP_VAR(p_Regs,fadr );
|
||||
DUMP_VAR(p_Regs,sstar );
|
||||
DUMP_VAR(p_Regs,rvidr );
|
||||
DUMP_VAR(p_Regs,ccbvidr );
|
||||
DUMP_VAR(p_Regs,chavidr );
|
||||
DUMP_VAR(p_Regs,chanumr );
|
||||
DUMP_VAR(p_Regs,secvidr );
|
||||
}
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/* Internal Routines (above) */
|
||||
/*****************************/
|
||||
@@ -0,0 +1,73 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __SEC_QI_H
|
||||
#define __SEC_QI_H
|
||||
|
||||
|
||||
#include "sec_qi_ext.h"
|
||||
#include "sec_regs.h"
|
||||
|
||||
|
||||
typedef struct t_SecQiDriverParam
|
||||
{
|
||||
t_Handle h_Sec ; /* SEC object */
|
||||
uint64_t baseAddr ; /* Base address */
|
||||
uint16_t seqLiodnBase ; /* Sequential LIODN base */
|
||||
uint16_t nonSeqLiodnBase; /* Non-sequential LIODN base */
|
||||
uint16_t nonSeqLiodnMask; /* Non-sequential LIODN offset mask */
|
||||
bool stopOnError ; /* Stop on error */
|
||||
e_SecQiFrameColor enqFrameColor ; /* Enqueue frame color */
|
||||
e_SecQiFrameCount deqFrameCount ; /* Dequeue frame count */
|
||||
e_SecQiScheduling deqScheduling ; /* Dequeue scheduling */
|
||||
uint32_t deqByteCountThr; /* Dequeue byte-count threshold */
|
||||
uint32_t deqSpfCountThr ; /* Dequeue subportal-frame-count threshold */
|
||||
e_SecByteSwap icdByteSwap ; /* Input control data byte swap */
|
||||
e_SecByteSwap ocdByteSwap ; /* Output control data byte swap */
|
||||
e_SecByteSwap imdByteSwap ; /* Input message data byte swap */
|
||||
e_SecByteSwap omdByteSwap ; /* Output message data byte swap */
|
||||
}
|
||||
t_SecQiDriverParam;
|
||||
|
||||
|
||||
typedef struct t_SecQi
|
||||
{
|
||||
t_SecQiDriverParam* p_DriverParam; /* Driver parameters */
|
||||
t_SecQiMemMap* p_MemMap ; /* Memory-mapped registers */
|
||||
}
|
||||
t_SecQi;
|
||||
|
||||
|
||||
#define DEFAULT_stopOnError FALSE
|
||||
#define DEFAULT_enqFrameColor e_SEC_QI_FRAME_COLOR_OVERRIDE
|
||||
#define DEFAULT_deqFrameCount e_SEC_QI_FRAME_COUNT_MAXIMUM_3
|
||||
#define DEFAULT_deqScheduling e_SEC_QI_SCHEDULING_PRI_WITH_IC
|
||||
#define DEFAULT_deqByteCountThr 65535
|
||||
#define DEFAULT_deqSpfCountThr 4
|
||||
#define DEFAULT_icdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
#define DEFAULT_ocdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
#define DEFAULT_imdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
#define DEFAULT_omdByteSwap e_SEC_BYTE_SWAP_NONE
|
||||
|
||||
|
||||
#define MIN_VAL_seqLiodnBase 0x0000
|
||||
#define MAX_VAL_seqLiodnBase 0x0FFF
|
||||
#define MIN_VAL_nonSeqLiodnBase 0x0000
|
||||
#define MAX_VAL_nonSeqLiodnBase 0x0FFF
|
||||
#define MIN_VAL_nonSeqLiodnMask 0x0000
|
||||
#define MAX_VAL_nonSeqLiodnMask 0x03FF
|
||||
#define MIN_VAL_deqByteCountThr 1
|
||||
#define MAX_VAL_deqByteCountThr 65535
|
||||
#define MIN_VAL_deqSpfCountThr 1
|
||||
#define MAX_VAL_deqSpfCountThr 7
|
||||
|
||||
|
||||
#endif /* __SEC_QI_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,97 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/*
|
||||
|
||||
@File error.c
|
||||
|
||||
@Description General errors and events reporting utilities.
|
||||
*//***************************************************************************/
|
||||
|
||||
#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
|
||||
|
||||
const char *dbgLevelStrings[] =
|
||||
{
|
||||
"CRITICAL"
|
||||
,"MAJOR"
|
||||
,"MINOR"
|
||||
,"WARNING"
|
||||
,"INFO"
|
||||
,"TRACE"
|
||||
};
|
||||
|
||||
const char *errTypeStrings[] =
|
||||
{
|
||||
"Invalid State" /* E_INVALID_STATE */
|
||||
,"Invalid Operation" /* E_INVALID_OPERATION */
|
||||
,"Unsupported Operation" /* E_NOT_SUPPORTED */
|
||||
,"No Device" /* E_NO_DEVICE */
|
||||
,"Invalid Handle" /* E_INVALID_HANDLE */
|
||||
,"Invalid ID" /* E_INVALID_ID */
|
||||
,"Unexpected NULL Pointer" /* E_NULL_POINTER */
|
||||
,"Invalid Value" /* E_INVALID_VALUE */
|
||||
,"Invalid Selection" /* E_INVALID_SELECTION */
|
||||
,"Invalid Communication Mode" /* E_INVALID_COMM_MODE */
|
||||
,"Invalid Byte Order" /* E_INVALID_BYTE_ORDER */
|
||||
,"Invalid Memory Type" /* E_INVALID_MEMORY_TYPE */
|
||||
,"Invalid Interrupt Queue" /* E_INVALID_INTR_QUEUE */
|
||||
,"Invalid Priority" /* E_INVALID_PRIORITY */
|
||||
,"Invalid Clock" /* E_INVALID_CLOCK */
|
||||
,"Invalid Rate" /* E_INVALID_RATE */
|
||||
,"Invalid Address" /* E_INVALID_ADDRESS */
|
||||
,"Invalid Bus" /* E_INVALID_BUS */
|
||||
,"Conflict In Bus Selection" /* E_BUS_CONFLICT */
|
||||
,"Conflict In Settings" /* E_CONFLICT */
|
||||
,"Incorrect Alignment" /* E_NOT_ALIGNED */
|
||||
,"Value Out Of Range" /* E_NOT_IN_RANGE */
|
||||
,"Invalid Frame" /* E_INVALID_FRAME */
|
||||
,"Frame Is Empty" /* E_EMPTY_FRAME */
|
||||
,"Buffer Is Empty" /* E_EMPTY_BUFFER */
|
||||
,"Memory Allocation Failed" /* E_NO_MEMORY */
|
||||
,"Resource Not Found" /* E_NOT_FOUND */
|
||||
,"Resource Is Unavailable" /* E_NOT_AVAILABLE */
|
||||
,"Resource Already Exists" /* E_ALREADY_EXISTS */
|
||||
,"Resource Is Full" /* E_FULL */
|
||||
,"Resource Is Empty" /* E_EMPTY */
|
||||
,"Resource Is Busy" /* E_BUSY */
|
||||
,"Resource Already Free" /* E_ALREADY_FREE */
|
||||
,"Read Access Failed" /* E_READ_FAILED */
|
||||
,"Write Access Failed" /* E_WRITE_FAILED */
|
||||
,"Send Operation Failed" /* E_SEND_FAILED */
|
||||
,"Receive Operation Failed" /* E_RECEIVE_FAILED */
|
||||
,"Operation Timed Out" /* E_TIMEOUT */
|
||||
};
|
||||
|
||||
|
||||
#if (defined(REPORT_EVENTS) && (REPORT_EVENTS > 0))
|
||||
|
||||
const char *eventStrings[] =
|
||||
{
|
||||
"Rx Discard" /* EV_RX_DISCARD */
|
||||
,"Rx Error" /* EV_RX_ERROR */
|
||||
,"Tx Error" /* EV_TX_ERROR */
|
||||
,"No Buffer Objects" /* EV_NO_BUFFERS */
|
||||
,"No MB-Frame Objects" /* EV_NO_MB_FRAMES */
|
||||
,"No SB-Frame Objects" /* EV_NO_SB_FRAMES */
|
||||
,"Tx Queue Is Full" /* EV_TX_QUEUE_FULL */
|
||||
,"Rx Queue Is Full" /* EV_RX_QUEUE_FULL */
|
||||
,"Interrupts Queue Is Full" /* EV_INTR_QUEUE_FULL */
|
||||
,"Data Buffer Is Unavailable" /* EV_NO_DATA_BUFFER */
|
||||
,"Objects Pool Is Empty" /* EV_OBJ_POOL_EMPTY */
|
||||
,"Illegal bus access" /* EV_BUS_ERROR */
|
||||
,"PTP Tx Timestamps Queue Is Full" /* EV_PTP_TXTS_QUEUE_FULL */
|
||||
,"PTP Rx Timestamps Queue Is Full" /* EV_PTP_RXTS_QUEUE_FULL */
|
||||
};
|
||||
|
||||
#endif /* (defined(REPORT_EVENTS) && (REPORT_EVENTS > 0)) */
|
||||
|
||||
#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
|
||||
|
||||
@@ -0,0 +1,739 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#include "error_ext.h"
|
||||
#include "part_ext.h"
|
||||
#include "std_ext.h"
|
||||
#include "string_ext.h"
|
||||
#include "mem_ext.h"
|
||||
#include "hash_ext.h"
|
||||
#include "mem.h"
|
||||
#include "xx_ext.h"
|
||||
|
||||
#define PAD_ALIGNMENT(align, x) (((x)%(align)) ? ((align)-((x)%(align))) : 0)
|
||||
|
||||
#define ALIGN_BLOCK(p_Block, prefixSize, alignment) \
|
||||
do { \
|
||||
p_Block += (prefixSize); \
|
||||
p_Block += PAD_ALIGNMENT((alignment), (uint32_t)(p_Block)); \
|
||||
} while (0)
|
||||
|
||||
#if defined(__GNUC__)
|
||||
#define GET_CALLER_ADDR \
|
||||
__asm__ ("mflr %0" : "=r" (callerAddr))
|
||||
#elif defined(__MWERKS__)
|
||||
/* NOTE: This implementation is only valid for CodeWarrior for PowerPC */
|
||||
#define GET_CALLER_ADDR \
|
||||
__asm__("add %0, 0, %0" : : "r" (callerAddr))
|
||||
#endif /* defined(__GNUC__) */
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
static __inline__ void * MemGet(t_MemorySegment *p_Mem)
|
||||
{
|
||||
uint8_t *p_Block;
|
||||
|
||||
/* check if there is an available block */
|
||||
if (p_Mem->current == p_Mem->num)
|
||||
{
|
||||
p_Mem->getFailures++;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* get the block */
|
||||
p_Block = p_Mem->p_BlocksStack[p_Mem->current];
|
||||
#ifdef DEBUG
|
||||
p_Mem->p_BlocksStack[p_Mem->current] = NULL;
|
||||
#endif /* DEBUG */
|
||||
/* advance current index */
|
||||
p_Mem->current++;
|
||||
|
||||
return (void *)p_Block;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
static __inline__ t_Error MemPut(t_MemorySegment *p_Mem, void *p_Block)
|
||||
{
|
||||
/* check if blocks stack is full */
|
||||
if (p_Mem->current > 0)
|
||||
{
|
||||
/* decrease current index */
|
||||
p_Mem->current--;
|
||||
/* put the block */
|
||||
p_Mem->p_BlocksStack[p_Mem->current] = (uint8_t *)p_Block;
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
|
||||
}
|
||||
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
|
||||
/*****************************************************************************/
|
||||
static t_Error InitMemDebugDatabase(t_MemorySegment *p_Mem)
|
||||
{
|
||||
p_Mem->p_MemDbg = (void *)XX_Malloc(sizeof(t_MemDbg) * p_Mem->num);
|
||||
if (!p_Mem->p_MemDbg)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory debug object"));
|
||||
}
|
||||
|
||||
memset(p_Mem->p_MemDbg, ILLEGAL_BASE, sizeof(t_MemDbg) * p_Mem->num);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
static t_Error DebugMemGet(t_Handle h_Mem, void *p_Block, uint32_t ownerAddress)
|
||||
{
|
||||
t_MemorySegment *p_Mem = (t_MemorySegment *)h_Mem;
|
||||
t_MemDbg *p_MemDbg = (t_MemDbg *)p_Mem->p_MemDbg;
|
||||
uint32_t blockIndex;
|
||||
|
||||
ASSERT_COND(ownerAddress != ILLEGAL_BASE);
|
||||
|
||||
/* Find block num */
|
||||
if (p_Mem->consecutiveMem)
|
||||
{
|
||||
blockIndex =
|
||||
(((uint8_t *)p_Block - (p_Mem->p_Bases[0] + p_Mem->blockOffset)) / p_Mem->blockSize);
|
||||
}
|
||||
else
|
||||
{
|
||||
blockIndex = *(uint32_t *)((uint8_t *)p_Block - 4);
|
||||
}
|
||||
|
||||
ASSERT_COND(blockIndex < p_Mem->num);
|
||||
ASSERT_COND(p_MemDbg[blockIndex].ownerAddress == ILLEGAL_BASE);
|
||||
|
||||
p_MemDbg[blockIndex].ownerAddress = ownerAddress;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
static t_Error DebugMemPut(t_Handle h_Mem, void *p_Block)
|
||||
{
|
||||
t_MemorySegment *p_Mem = (t_MemorySegment *)h_Mem;
|
||||
t_MemDbg *p_MemDbg = (t_MemDbg *)p_Mem->p_MemDbg;
|
||||
uint32_t blockIndex;
|
||||
uint8_t *p_Temp;
|
||||
|
||||
/* Find block num */
|
||||
if (p_Mem->consecutiveMem)
|
||||
{
|
||||
blockIndex =
|
||||
(((uint8_t *)p_Block - (p_Mem->p_Bases[0] + p_Mem->blockOffset)) / p_Mem->blockSize);
|
||||
|
||||
if (blockIndex >= p_Mem->num)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_INVALID_ADDRESS,
|
||||
("Freed address (0x%08x) does not belong to this pool", p_Block));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
blockIndex = *(uint32_t *)((uint8_t *)p_Block - 4);
|
||||
|
||||
if (blockIndex >= p_Mem->num)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_INVALID_ADDRESS,
|
||||
("Freed address (0x%08x) does not belong to this pool", p_Block));
|
||||
}
|
||||
|
||||
/* Verify that the block matches the corresponding base */
|
||||
p_Temp = p_Mem->p_Bases[blockIndex];
|
||||
|
||||
ALIGN_BLOCK(p_Temp, p_Mem->prefixSize, p_Mem->alignment);
|
||||
|
||||
if (p_Temp == p_Mem->p_Bases[blockIndex])
|
||||
p_Temp += p_Mem->alignment;
|
||||
|
||||
if (p_Temp != p_Block)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_INVALID_ADDRESS,
|
||||
("Freed address (0x%08x) does not belong to this pool", p_Block));
|
||||
}
|
||||
}
|
||||
|
||||
if (p_MemDbg[blockIndex].ownerAddress == ILLEGAL_BASE)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_ALREADY_FREE,
|
||||
("Attempt to free unallocated address (0x%08x)", p_Block));
|
||||
}
|
||||
|
||||
p_MemDbg[blockIndex].ownerAddress = (uint32_t)ILLEGAL_BASE;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
uint32_t MEM_ComputePartitionSize(uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment)
|
||||
{
|
||||
uint32_t blockSize = 0, pad1 = 0, pad2 = 0;
|
||||
|
||||
/* Make sure that the alignment is at least 4 */
|
||||
if (alignment < 4)
|
||||
{
|
||||
alignment = 4;
|
||||
}
|
||||
|
||||
pad1 = (uint32_t)PAD_ALIGNMENT(4, prefixSize);
|
||||
/* Block size not including 2nd padding */
|
||||
blockSize = pad1 + prefixSize + dataSize + postfixSize;
|
||||
pad2 = PAD_ALIGNMENT(alignment, blockSize);
|
||||
/* Block size including 2nd padding */
|
||||
blockSize += pad2;
|
||||
|
||||
return ((num * blockSize) + alignment);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
t_Error MEM_Init(char name[],
|
||||
t_Handle *p_Handle,
|
||||
uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment)
|
||||
{
|
||||
uint8_t *p_Memory;
|
||||
uint32_t allocSize;
|
||||
t_Error errCode;
|
||||
|
||||
allocSize = MEM_ComputePartitionSize(num,
|
||||
dataSize,
|
||||
prefixSize,
|
||||
postfixSize,
|
||||
alignment);
|
||||
|
||||
p_Memory = (uint8_t *)XX_Malloc(allocSize);
|
||||
if (!p_Memory)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment"));
|
||||
}
|
||||
|
||||
errCode = MEM_InitByAddress(name,
|
||||
p_Handle,
|
||||
num,
|
||||
dataSize,
|
||||
prefixSize,
|
||||
postfixSize,
|
||||
alignment,
|
||||
p_Memory);
|
||||
if (errCode != E_OK)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, errCode, NO_MSG);
|
||||
}
|
||||
|
||||
((t_MemorySegment *)(*p_Handle))->allocOwner = e_MEM_ALLOC_OWNER_LOCAL;
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
t_Error MEM_InitByAddress(char name[],
|
||||
t_Handle *p_Handle,
|
||||
uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment,
|
||||
uint8_t *p_Memory)
|
||||
{
|
||||
t_MemorySegment *p_Mem;
|
||||
uint32_t i, blockSize;
|
||||
uint16_t alignPad, endPad;
|
||||
uint8_t *p_Blocks;
|
||||
|
||||
/* prepare in case of error */
|
||||
*p_Handle = NULL;
|
||||
|
||||
if (!p_Memory)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_NULL_POINTER, ("Memory blocks"));
|
||||
}
|
||||
|
||||
p_Blocks = p_Memory;
|
||||
|
||||
/* make sure that the alignment is at least 4 and power of 2 */
|
||||
if (alignment < 4)
|
||||
{
|
||||
alignment = 4;
|
||||
}
|
||||
else if (!POWER_OF_2(alignment))
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Alignment (should be power of 2)"));
|
||||
}
|
||||
|
||||
/* first allocate the segment descriptor */
|
||||
p_Mem = (t_MemorySegment *)XX_Malloc(sizeof(t_MemorySegment));
|
||||
if (!p_Mem)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment structure"));
|
||||
}
|
||||
|
||||
/* allocate the blocks stack */
|
||||
p_Mem->p_BlocksStack = (uint8_t **)XX_Malloc(num * sizeof(uint8_t*));
|
||||
if (!p_Mem->p_BlocksStack)
|
||||
{
|
||||
XX_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment block pointers stack"));
|
||||
}
|
||||
|
||||
/* allocate the blocks bases array */
|
||||
p_Mem->p_Bases = (uint8_t **)XX_Malloc(sizeof(uint8_t*));
|
||||
if (!p_Mem->p_Bases)
|
||||
{
|
||||
MEM_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment base pointers array"));
|
||||
}
|
||||
memset(p_Mem->p_Bases, 0, sizeof(uint8_t*));
|
||||
|
||||
/* store info about this segment */
|
||||
p_Mem->num = num;
|
||||
p_Mem->current = 0;
|
||||
p_Mem->dataSize = dataSize;
|
||||
p_Mem->p_Bases[0] = p_Blocks;
|
||||
p_Mem->getFailures = 0;
|
||||
p_Mem->allocOwner = e_MEM_ALLOC_OWNER_EXTERNAL;
|
||||
p_Mem->consecutiveMem = TRUE;
|
||||
p_Mem->prefixSize = prefixSize;
|
||||
p_Mem->postfixSize = postfixSize;
|
||||
p_Mem->alignment = alignment;
|
||||
/* store name */
|
||||
strncpy(p_Mem->name, name, MEM_MAX_NAME_LENGTH);
|
||||
|
||||
p_Mem->h_Spinlock = XX_InitSpinlock();
|
||||
if (!p_Mem->h_Spinlock)
|
||||
{
|
||||
MEM_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Can't create spinlock!"));
|
||||
}
|
||||
|
||||
alignPad = (uint16_t)PAD_ALIGNMENT(4, prefixSize);
|
||||
/* Make sure the entire size is a multiple of alignment */
|
||||
endPad = (uint16_t)PAD_ALIGNMENT(alignment, (alignPad + prefixSize + dataSize + postfixSize));
|
||||
|
||||
/* The following manipulation places the data of block[0] in an aligned address,
|
||||
since block size is aligned the following block datas will all be aligned */
|
||||
ALIGN_BLOCK(p_Blocks, prefixSize, alignment);
|
||||
|
||||
blockSize = (uint32_t)(alignPad + prefixSize + dataSize + postfixSize + endPad);
|
||||
|
||||
/* initialize the blocks */
|
||||
for (i=0; i < num; i++)
|
||||
{
|
||||
p_Mem->p_BlocksStack[i] = p_Blocks;
|
||||
p_Blocks += blockSize;
|
||||
}
|
||||
|
||||
/* return handle to caller */
|
||||
*p_Handle = (t_Handle)p_Mem;
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
{
|
||||
t_Error errCode = InitMemDebugDatabase(p_Mem);
|
||||
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR, errCode, NO_MSG);
|
||||
|
||||
p_Mem->blockOffset = (uint32_t)(p_Mem->p_BlocksStack[0] - p_Mem->p_Bases[0]);
|
||||
p_Mem->blockSize = blockSize;
|
||||
}
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
t_Error MEM_InitSmart(char name[],
|
||||
t_Handle *p_Handle,
|
||||
uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment,
|
||||
uint8_t memPartitionId,
|
||||
bool consecutiveMem)
|
||||
{
|
||||
t_MemorySegment *p_Mem;
|
||||
uint32_t i, blockSize;
|
||||
uint16_t alignPad, endPad;
|
||||
|
||||
/* prepare in case of error */
|
||||
*p_Handle = NULL;
|
||||
|
||||
/* make sure that size is always a multiple of 4 */
|
||||
if (dataSize & 3)
|
||||
{
|
||||
dataSize &= ~3;
|
||||
dataSize += 4;
|
||||
}
|
||||
|
||||
/* make sure that the alignment is at least 4 and power of 2 */
|
||||
if (alignment < 4)
|
||||
{
|
||||
alignment = 4;
|
||||
}
|
||||
else if (!POWER_OF_2(alignment))
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Alignment (should be power of 2)"));
|
||||
}
|
||||
|
||||
/* first allocate the segment descriptor */
|
||||
p_Mem = (t_MemorySegment *)XX_Malloc(sizeof(t_MemorySegment));
|
||||
if (!p_Mem)
|
||||
{
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment structure"));
|
||||
}
|
||||
|
||||
/* allocate the blocks stack */
|
||||
p_Mem->p_BlocksStack = (uint8_t **)XX_Malloc(num * sizeof(uint8_t*));
|
||||
if (!p_Mem->p_BlocksStack)
|
||||
{
|
||||
MEM_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment block pointers stack"));
|
||||
}
|
||||
|
||||
/* allocate the blocks bases array */
|
||||
p_Mem->p_Bases = (uint8_t **)XX_Malloc((consecutiveMem ? 1 : num) * sizeof(uint8_t*));
|
||||
if (!p_Mem->p_Bases)
|
||||
{
|
||||
MEM_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment base pointers array"));
|
||||
}
|
||||
memset(p_Mem->p_Bases, 0, (consecutiveMem ? 1 : num) * sizeof(uint8_t*));
|
||||
|
||||
/* store info about this segment */
|
||||
p_Mem->num = num;
|
||||
p_Mem->current = 0;
|
||||
p_Mem->dataSize = dataSize;
|
||||
p_Mem->getFailures = 0;
|
||||
p_Mem->allocOwner = e_MEM_ALLOC_OWNER_LOCAL_SMART;
|
||||
p_Mem->consecutiveMem = consecutiveMem;
|
||||
p_Mem->prefixSize = prefixSize;
|
||||
p_Mem->postfixSize = postfixSize;
|
||||
p_Mem->alignment = alignment;
|
||||
|
||||
p_Mem->h_Spinlock = XX_InitSpinlock();
|
||||
if (!p_Mem->h_Spinlock)
|
||||
{
|
||||
MEM_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Can't create spinlock!"));
|
||||
}
|
||||
|
||||
alignPad = (uint16_t)PAD_ALIGNMENT(4, prefixSize);
|
||||
/* Make sure the entire size is a multiple of alignment */
|
||||
endPad = (uint16_t)PAD_ALIGNMENT(alignment, alignPad + prefixSize + dataSize + postfixSize);
|
||||
|
||||
/* Calculate blockSize */
|
||||
blockSize = (uint32_t)(alignPad + prefixSize + dataSize + postfixSize + endPad);
|
||||
|
||||
/* Now allocate the blocks */
|
||||
if (p_Mem->consecutiveMem)
|
||||
{
|
||||
/* |alignment - 1| bytes at most will be discarded in the beginning of the
|
||||
received segment for alignment reasons, therefore the allocation is of:
|
||||
(alignment + (num * block size)). */
|
||||
uint8_t *p_Blocks = (uint8_t *)
|
||||
XX_MallocSmart((uint32_t)((num * blockSize) + alignment), memPartitionId, 1);
|
||||
if (!p_Blocks)
|
||||
{
|
||||
MEM_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment blocks"));
|
||||
}
|
||||
|
||||
/* Store the memory segment address */
|
||||
p_Mem->p_Bases[0] = p_Blocks;
|
||||
|
||||
/* The following manipulation places the data of block[0] in an aligned address,
|
||||
since block size is aligned the following block datas will all be aligned.*/
|
||||
ALIGN_BLOCK(p_Blocks, prefixSize, alignment);
|
||||
|
||||
/* initialize the blocks */
|
||||
for (i = 0; i < num; i++)
|
||||
{
|
||||
p_Mem->p_BlocksStack[i] = p_Blocks;
|
||||
p_Blocks += blockSize;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
p_Mem->blockOffset = (uint32_t)(p_Mem->p_BlocksStack[0] - p_Mem->p_Bases[0]);
|
||||
p_Mem->blockSize = blockSize;
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* |alignment - 1| bytes at most will be discarded in the beginning of the
|
||||
received segment for alignment reasons, therefore the allocation is of:
|
||||
(alignment + block size). */
|
||||
for (i = 0; i < num; i++)
|
||||
{
|
||||
uint8_t *p_Block = (uint8_t *)
|
||||
XX_MallocSmart((uint32_t)(blockSize + alignment), memPartitionId, 1);
|
||||
if (!p_Block)
|
||||
{
|
||||
MEM_Free(p_Mem);
|
||||
RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory segment blocks"));
|
||||
}
|
||||
|
||||
/* Store the memory segment address */
|
||||
p_Mem->p_Bases[i] = p_Block;
|
||||
|
||||
/* The following places the data of each block in an aligned address */
|
||||
ALIGN_BLOCK(p_Block, prefixSize, alignment);
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
/* Need 4 bytes before the meaningful bytes to store the block index.
|
||||
We know we have them because alignment is at least 4 bytes. */
|
||||
if (p_Block == p_Mem->p_Bases[i])
|
||||
p_Block += alignment;
|
||||
|
||||
*(uint32_t *)(p_Block - 4) = i;
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
p_Mem->p_BlocksStack[i] = p_Block;
|
||||
}
|
||||
}
|
||||
|
||||
/* store name */
|
||||
strncpy(p_Mem->name, name, MEM_MAX_NAME_LENGTH);
|
||||
|
||||
/* return handle to caller */
|
||||
*p_Handle = (t_Handle)p_Mem;
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
{
|
||||
t_Error errCode = InitMemDebugDatabase(p_Mem);
|
||||
|
||||
if (errCode != E_OK)
|
||||
RETURN_ERROR(MAJOR, errCode, NO_MSG);
|
||||
}
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
void MEM_Free(t_Handle h_Mem)
|
||||
{
|
||||
t_MemorySegment *p_Mem = (t_MemorySegment*)h_Mem;
|
||||
uint32_t num, i;
|
||||
|
||||
/* Check MEM leaks */
|
||||
MEM_CheckLeaks(h_Mem);
|
||||
|
||||
if (p_Mem)
|
||||
{
|
||||
num = p_Mem->consecutiveMem ? 1 : p_Mem->num;
|
||||
|
||||
if (p_Mem->allocOwner == e_MEM_ALLOC_OWNER_LOCAL_SMART)
|
||||
{
|
||||
for (i=0; i < num; i++)
|
||||
{
|
||||
if (p_Mem->p_Bases[i])
|
||||
{
|
||||
XX_FreeSmart(p_Mem->p_Bases[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (p_Mem->allocOwner == e_MEM_ALLOC_OWNER_LOCAL)
|
||||
{
|
||||
for (i=0; i < num; i++)
|
||||
{
|
||||
if (p_Mem->p_Bases[i])
|
||||
{
|
||||
XX_Free(p_Mem->p_Bases[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (p_Mem->h_Spinlock)
|
||||
XX_FreeSpinlock(p_Mem->h_Spinlock);
|
||||
|
||||
if (p_Mem->p_Bases)
|
||||
XX_Free(p_Mem->p_Bases);
|
||||
|
||||
if (p_Mem->p_BlocksStack)
|
||||
XX_Free(p_Mem->p_BlocksStack);
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
if (p_Mem->p_MemDbg)
|
||||
XX_Free(p_Mem->p_MemDbg);
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
XX_Free(p_Mem);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
void * MEM_Get(t_Handle h_Mem)
|
||||
{
|
||||
t_MemorySegment *p_Mem = (t_MemorySegment *)h_Mem;
|
||||
uint8_t *p_Block;
|
||||
uint32_t intFlags;
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
uint32_t callerAddr = 0;
|
||||
|
||||
GET_CALLER_ADDR;
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
ASSERT_COND(h_Mem);
|
||||
|
||||
intFlags = XX_LockIntrSpinlock(p_Mem->h_Spinlock);
|
||||
/* check if there is an available block */
|
||||
if ((p_Block = (uint8_t *)MemGet(p_Mem)) == NULL)
|
||||
{
|
||||
XX_UnlockIntrSpinlock(p_Mem->h_Spinlock, intFlags);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
DebugMemGet(p_Mem, p_Block, callerAddr);
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
XX_UnlockIntrSpinlock(p_Mem->h_Spinlock, intFlags);
|
||||
|
||||
return (void *)p_Block;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
uint16_t MEM_GetN(t_Handle h_Mem, uint32_t num, void *array[])
|
||||
{
|
||||
t_MemorySegment *p_Mem = (t_MemorySegment *)h_Mem;
|
||||
uint32_t availableBlocks;
|
||||
register uint32_t i;
|
||||
uint32_t intFlags;
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
uint32_t callerAddr = 0;
|
||||
|
||||
GET_CALLER_ADDR;
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
ASSERT_COND(h_Mem);
|
||||
|
||||
intFlags = XX_LockIntrSpinlock(p_Mem->h_Spinlock);
|
||||
/* check how many blocks are available */
|
||||
availableBlocks = (uint32_t)(p_Mem->num - p_Mem->current);
|
||||
if (num > availableBlocks)
|
||||
{
|
||||
num = availableBlocks;
|
||||
}
|
||||
|
||||
for (i=0; i < num; i++)
|
||||
{
|
||||
/* get pointer to block */
|
||||
if ((array[i] = MemGet(p_Mem)) == NULL)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
DebugMemGet(p_Mem, array[i], callerAddr);
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
}
|
||||
XX_UnlockIntrSpinlock(p_Mem->h_Spinlock, intFlags);
|
||||
|
||||
return (uint16_t)i;
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
t_Error MEM_Put(t_Handle h_Mem, void *p_Block)
|
||||
{
|
||||
t_MemorySegment *p_Mem = (t_MemorySegment *)h_Mem;
|
||||
t_Error rc;
|
||||
uint32_t intFlags;
|
||||
|
||||
ASSERT_COND(h_Mem);
|
||||
|
||||
intFlags = XX_LockIntrSpinlock(p_Mem->h_Spinlock);
|
||||
/* check if blocks stack is full */
|
||||
if ((rc = MemPut(p_Mem, p_Block)) != E_OK)
|
||||
{
|
||||
XX_UnlockIntrSpinlock(p_Mem->h_Spinlock, intFlags);
|
||||
RETURN_ERROR(MAJOR, rc, NO_MSG);
|
||||
}
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
DebugMemPut(p_Mem, p_Block);
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
XX_UnlockIntrSpinlock(p_Mem->h_Spinlock, intFlags);
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
|
||||
/*****************************************************************************/
|
||||
void MEM_CheckLeaks(t_Handle h_Mem)
|
||||
{
|
||||
t_MemorySegment *p_Mem = (t_MemorySegment *)h_Mem;
|
||||
t_MemDbg *p_MemDbg = (t_MemDbg *)p_Mem->p_MemDbg;
|
||||
uint8_t *p_Block;
|
||||
int i;
|
||||
|
||||
ASSERT_COND(h_Mem);
|
||||
|
||||
if (p_Mem->consecutiveMem)
|
||||
{
|
||||
for (i=0; i < p_Mem->num; i++)
|
||||
{
|
||||
if (p_MemDbg[i].ownerAddress != ILLEGAL_BASE)
|
||||
{
|
||||
/* Find the block address */
|
||||
p_Block = ((p_Mem->p_Bases[0] + p_Mem->blockOffset) +
|
||||
(i * p_Mem->blockSize));
|
||||
|
||||
XX_Print("MEM leak: 0x%08x, Caller address: 0x%08x\n",
|
||||
p_Block, p_MemDbg[i].ownerAddress);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for (i=0; i < p_Mem->num; i++)
|
||||
{
|
||||
if (p_MemDbg[i].ownerAddress != ILLEGAL_BASE)
|
||||
{
|
||||
/* Find the block address */
|
||||
p_Block = p_Mem->p_Bases[i];
|
||||
|
||||
ALIGN_BLOCK(p_Block, p_Mem->prefixSize, p_Mem->alignment);
|
||||
|
||||
if (p_Block == p_Mem->p_Bases[i])
|
||||
p_Block += p_Mem->alignment;
|
||||
|
||||
XX_Print("MEM leak: 0x%08x, Caller address: 0x%08x\n",
|
||||
p_Block, p_MemDbg[i].ownerAddress);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
|
||||
@@ -0,0 +1,50 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __MEM_H
|
||||
#define __MEM_H
|
||||
|
||||
#include "error_ext.h"
|
||||
#include "std_ext.h"
|
||||
#include "list_ext.h"
|
||||
|
||||
|
||||
#define __ERR_MODULE__ MODULE_MEM
|
||||
|
||||
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Memory allocation owner.
|
||||
*//***************************************************************************/
|
||||
typedef enum e_MemAllocOwner
|
||||
{
|
||||
e_MEM_ALLOC_OWNER_LOCAL,
|
||||
e_MEM_ALLOC_OWNER_LOCAL_SMART,
|
||||
e_MEM_ALLOC_OWNER_EXTERNAL
|
||||
} e_MemAllocOwner;
|
||||
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description MEM block information for leaks detection.
|
||||
*//***************************************************************************/
|
||||
typedef struct t_MemDbg
|
||||
{
|
||||
uint32_t ownerAddress;
|
||||
|
||||
} t_MemDbg;
|
||||
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
|
||||
|
||||
#endif /* __MEM_H */
|
||||
@@ -0,0 +1,644 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "xx_ext.h"
|
||||
#include "memcpy_ext.h"
|
||||
|
||||
|
||||
#ifdef CORE_8BIT_ACCESS_ERRATA
|
||||
static void MY_MY_WRITE_UINT8(uint8_t *addr, uint8_t val)
|
||||
{
|
||||
uint32_t newAddr, newVal;
|
||||
newAddr = (uint32_t)addr & ~0x3L;
|
||||
switch ((uint32_t)addr%4)
|
||||
{
|
||||
case (0):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0x00ffffff) | (((uint32_t)val)<<24);
|
||||
WRITE_UINT32(*(uint32_t*)newAddr, newVal);
|
||||
break;
|
||||
case (1):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0xff00ffff) | (((uint32_t)val)<<16);
|
||||
WRITE_UINT32(*(uint32_t*)newAddr, newVal);
|
||||
break;
|
||||
case (2):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0xffff00ff) | (((uint32_t)val)<<8);
|
||||
WRITE_UINT32(*(uint32_t*)newAddr, newVal);
|
||||
break;
|
||||
case (3):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0xffffff00) | val;
|
||||
WRITE_UINT32(*(uint32_t*)newAddr, newVal);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t MY_MY_GET_UINT8(uint8_t *addr)
|
||||
{
|
||||
uint32_t newAddr, newVal=0;
|
||||
newAddr = (uint32_t)addr & ~0x3L;
|
||||
switch ((uint32_t)addr%4)
|
||||
{
|
||||
case (0):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0xff000000)>>24;
|
||||
break;
|
||||
case (1):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0x00ff0000)>>16;
|
||||
break;
|
||||
case (2):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0x0000ff00)>>8;
|
||||
break;
|
||||
case (3):
|
||||
newVal = GET_UINT32(*(uint32_t*)newAddr);
|
||||
newVal = (newVal & 0x000000ff);
|
||||
break;
|
||||
}
|
||||
|
||||
return (uint8_t)newVal;
|
||||
}
|
||||
|
||||
#define MY_WRITE_UINT8(addr,val) MY_MY_WRITE_UINT8(&addr,val)
|
||||
#define MY_GET_UINT8(addr) MY_MY_GET_UINT8(&addr)
|
||||
#else
|
||||
#define MY_WRITE_UINT8 WRITE_UINT8
|
||||
#define MY_GET_UINT8 GET_UINT8
|
||||
#endif /* CORE_8BIT_ACCESS_ERRATA */
|
||||
|
||||
|
||||
void * MemCpy32(void* pDst,void* pSrc, uint32_t size)
|
||||
{
|
||||
uint32_t leftAlign;
|
||||
uint32_t rightAlign;
|
||||
uint32_t lastWord;
|
||||
uint32_t currWord;
|
||||
uint32_t *p_Src32;
|
||||
uint32_t *p_Dst32;
|
||||
uint8_t *p_Src8;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Src8 = (uint8_t*)(pSrc);
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
/* first copy byte by byte till the source first alignment
|
||||
* this step is necessary to ensure we do not even try to access
|
||||
* data which is before the source buffer, hence it is not ours.
|
||||
*/
|
||||
while(((uint32_t)(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8++ = *p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* align destination (possibly disaligning source)*/
|
||||
while(((uint32_t)(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8++ = *p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* dest is aligned and source is not necessarily aligned */
|
||||
leftAlign = (((uint32_t)(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
|
||||
rightAlign = 32 - leftAlign;
|
||||
|
||||
|
||||
if (leftAlign == 0)
|
||||
{
|
||||
/* source is also aligned */
|
||||
p_Src32 = (uint32_t*)(p_Src8);
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
while (size >> 2) /* size >= 4 */
|
||||
{
|
||||
*p_Dst32++ = *p_Src32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Src8 = (uint8_t*)(p_Src32);
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* source is not aligned (destination is aligned)*/
|
||||
p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
lastWord = *p_Src32++;
|
||||
while(size >> 3) /* size >= 8 */
|
||||
{
|
||||
currWord = *p_Src32;
|
||||
*p_Dst32 = (lastWord << leftAlign) | (currWord >> rightAlign);
|
||||
lastWord = currWord;
|
||||
p_Src32++;
|
||||
p_Dst32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
|
||||
}
|
||||
|
||||
/* complete the left overs */
|
||||
while (size--)
|
||||
*p_Dst8++ = *p_Src8++;
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void * IO2IOCpy32(void* pDst,void* pSrc, uint32_t size)
|
||||
{
|
||||
uint32_t leftAlign;
|
||||
uint32_t rightAlign;
|
||||
uint32_t lastWord;
|
||||
uint32_t currWord;
|
||||
uint32_t *p_Src32;
|
||||
uint32_t *p_Dst32;
|
||||
uint8_t *p_Src8;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Src8 = (uint8_t*)(pSrc);
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
/* first copy byte by byte till the source first alignment
|
||||
* this step is necessary to ensure we do not even try to access
|
||||
* data which is before the source buffer, hence it is not ours.
|
||||
*/
|
||||
while(((uint32_t)(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, MY_GET_UINT8(*p_Src8));
|
||||
p_Dst8++;p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* align destination (possibly disaligning source)*/
|
||||
while(((uint32_t)(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, MY_GET_UINT8(*p_Src8));
|
||||
p_Dst8++;p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* dest is aligned and source is not necessarily aligned */
|
||||
leftAlign = (((uint32_t)(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
|
||||
rightAlign = 32 - leftAlign;
|
||||
|
||||
if (leftAlign == 0)
|
||||
{
|
||||
/* source is also aligned */
|
||||
p_Src32 = (uint32_t*)(p_Src8);
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
while (size >> 2) /* size >= 4 */
|
||||
{
|
||||
WRITE_UINT32(*p_Dst32, GET_UINT32(*p_Src32));
|
||||
p_Dst32++;p_Src32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Src8 = (uint8_t*)(p_Src32);
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* source is not aligned (destination is aligned)*/
|
||||
p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
lastWord = GET_UINT32(*p_Src32);
|
||||
p_Src32++;
|
||||
while(size >> 3) /* size >= 8 */
|
||||
{
|
||||
currWord = GET_UINT32(*p_Src32);
|
||||
WRITE_UINT32(*p_Dst32, (lastWord << leftAlign) | (currWord >> rightAlign));
|
||||
lastWord = currWord;
|
||||
p_Src32++;p_Dst32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
|
||||
}
|
||||
|
||||
/* complete the left overs */
|
||||
while (size--)
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, MY_GET_UINT8(*p_Src8));
|
||||
p_Dst8++;p_Src8++;
|
||||
}
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void * Mem2IOCpy32(void* pDst,void* pSrc, uint32_t size)
|
||||
{
|
||||
uint32_t leftAlign;
|
||||
uint32_t rightAlign;
|
||||
uint32_t lastWord;
|
||||
uint32_t currWord;
|
||||
uint32_t *p_Src32;
|
||||
uint32_t *p_Dst32;
|
||||
uint8_t *p_Src8;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Src8 = (uint8_t*)(pSrc);
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
/* first copy byte by byte till the source first alignment
|
||||
* this step is necessary to ensure we do not even try to access
|
||||
* data which is before the source buffer, hence it is not ours.
|
||||
*/
|
||||
while(((uint32_t)(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, *p_Src8);
|
||||
p_Dst8++;p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* align destination (possibly disaligning source)*/
|
||||
while(((uint32_t)(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, *p_Src8);
|
||||
p_Dst8++;p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* dest is aligned and source is not necessarily aligned */
|
||||
leftAlign = (((uint32_t)(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
|
||||
rightAlign = 32 - leftAlign;
|
||||
|
||||
if (leftAlign == 0)
|
||||
{
|
||||
/* source is also aligned */
|
||||
p_Src32 = (uint32_t*)(p_Src8);
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
while (size >> 2) /* size >= 4 */
|
||||
{
|
||||
WRITE_UINT32(*p_Dst32, *p_Src32);
|
||||
p_Dst32++;p_Src32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Src8 = (uint8_t*)(p_Src32);
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* source is not aligned (destination is aligned)*/
|
||||
p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
lastWord = *p_Src32++;
|
||||
while(size >> 3) /* size >= 8 */
|
||||
{
|
||||
currWord = *p_Src32;
|
||||
WRITE_UINT32(*p_Dst32, (lastWord << leftAlign) | (currWord >> rightAlign));
|
||||
lastWord = currWord;
|
||||
p_Src32++;p_Dst32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
|
||||
}
|
||||
|
||||
/* complete the left overs */
|
||||
while (size--)
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, *p_Src8);
|
||||
p_Dst8++;p_Src8++;
|
||||
}
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void * IO2MemCpy32(void* pDst,void* pSrc, uint32_t size)
|
||||
{
|
||||
uint32_t leftAlign;
|
||||
uint32_t rightAlign;
|
||||
uint32_t lastWord;
|
||||
uint32_t currWord;
|
||||
uint32_t *p_Src32;
|
||||
uint32_t *p_Dst32;
|
||||
uint8_t *p_Src8;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Src8 = (uint8_t*)(pSrc);
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
/* first copy byte by byte till the source first alignment
|
||||
* this step is necessary to ensure we do not even try to access
|
||||
* data which is before the source buffer, hence it is not ours.
|
||||
*/
|
||||
while(((uint32_t)(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8 = MY_GET_UINT8(*p_Src8);
|
||||
p_Dst8++;p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* align destination (possibly disaligning source)*/
|
||||
while(((uint32_t)(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8 = MY_GET_UINT8(*p_Src8);
|
||||
p_Dst8++;p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* dest is aligned and source is not necessarily aligned */
|
||||
leftAlign = (((uint32_t)(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
|
||||
rightAlign = 32 - leftAlign;
|
||||
|
||||
if (leftAlign == 0)
|
||||
{
|
||||
/* source is also aligned */
|
||||
p_Src32 = (uint32_t*)(p_Src8);
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
while (size >> 2) /* size >= 4 */
|
||||
{
|
||||
*p_Dst32 = GET_UINT32(*p_Src32);
|
||||
p_Dst32++;p_Src32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Src8 = (uint8_t*)(p_Src32);
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* source is not aligned (destination is aligned)*/
|
||||
p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
lastWord = GET_UINT32(*p_Src32);
|
||||
p_Src32++;
|
||||
while(size >> 3) /* size >= 8 */
|
||||
{
|
||||
currWord = GET_UINT32(*p_Src32);
|
||||
*p_Dst32 = (lastWord << leftAlign) | (currWord >> rightAlign);
|
||||
lastWord = currWord;
|
||||
p_Src32++;p_Dst32++;
|
||||
size -= 4;
|
||||
}
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
|
||||
}
|
||||
|
||||
/* complete the left overs */
|
||||
while (size--)
|
||||
{
|
||||
*p_Dst8 = MY_GET_UINT8(*p_Src8);
|
||||
p_Dst8++;p_Src8++;
|
||||
}
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void * MemCpy64(void* pDst,void* pSrc, uint32_t size)
|
||||
{
|
||||
uint32_t leftAlign;
|
||||
uint32_t rightAlign;
|
||||
uint64_t lastWord;
|
||||
uint64_t currWord;
|
||||
uint64_t *pSrc64;
|
||||
uint64_t *pDst64;
|
||||
uint8_t *p_Src8;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Src8 = (uint8_t*)(pSrc);
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
/* first copy byte by byte till the source first alignment
|
||||
* this step is necessarily to ensure we do not even try to access
|
||||
* data which is before the source buffer, hence it is not ours.
|
||||
*/
|
||||
while(((uint32_t)(p_Src8) & 7) && size) /* (pSrc mod 8) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8++ = *p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* align destination (possibly disaligning source)*/
|
||||
while(((uint32_t)(p_Dst8) & 7) && size) /* (pDst mod 8) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8++ = *p_Src8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* dest is aligned and source is not necessarily aligned */
|
||||
leftAlign = (((uint32_t)(p_Src8) & 7) << 3); /* leftAlign = (pSrc mod 8)*8 */
|
||||
rightAlign = 64 - leftAlign;
|
||||
|
||||
|
||||
if (leftAlign == 0)
|
||||
{
|
||||
/* source is also aligned */
|
||||
pSrc64 = (uint64_t*)(p_Src8);
|
||||
pDst64 = (uint64_t*)(p_Dst8);
|
||||
while (size >> 3) /* size >= 8 */
|
||||
{
|
||||
*pDst64++ = *pSrc64++;
|
||||
size -= 8;
|
||||
}
|
||||
p_Src8 = (uint8_t*)(pSrc64);
|
||||
p_Dst8 = (uint8_t*)(pDst64);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* source is not aligned (destination is aligned)*/
|
||||
pSrc64 = (uint64_t*)(p_Src8 - (leftAlign >> 3));
|
||||
pDst64 = (uint64_t*)(p_Dst8);
|
||||
lastWord = *pSrc64++;
|
||||
while(size >> 4) /* size >= 16 */
|
||||
{
|
||||
currWord = *pSrc64;
|
||||
*pDst64 = (lastWord << leftAlign) | (currWord >> rightAlign);
|
||||
lastWord = currWord;
|
||||
pSrc64++;
|
||||
pDst64++;
|
||||
size -= 8;
|
||||
}
|
||||
p_Dst8 = (uint8_t*)(pDst64);
|
||||
p_Src8 = (uint8_t*)(pSrc64) - 8 + (leftAlign >> 3);
|
||||
}
|
||||
|
||||
/* complete the left overs */
|
||||
while (size--)
|
||||
*p_Dst8++ = *p_Src8++;
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void * MemSet32(void* pDst, uint8_t val, uint32_t size)
|
||||
{
|
||||
uint32_t val32;
|
||||
uint32_t *p_Dst32;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
|
||||
/* generate four 8-bit val's in 32-bit container */
|
||||
val32 = (uint32_t) val;
|
||||
val32 |= (val32 << 8);
|
||||
val32 |= (val32 << 16);
|
||||
|
||||
/* align destination to 32 */
|
||||
while(((uint32_t)(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8++ = val;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* 32-bit chunks */
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
while (size >> 2) /* size >= 4 */
|
||||
{
|
||||
*p_Dst32++ = val32;
|
||||
size -= 4;
|
||||
}
|
||||
|
||||
/* complete the leftovers */
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
while (size--)
|
||||
*p_Dst8++ = val;
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void * IOMemSet32(void* pDst, uint8_t val, uint32_t size)
|
||||
{
|
||||
uint32_t val32;
|
||||
uint32_t *p_Dst32;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
|
||||
/* generate four 8-bit val's in 32-bit container */
|
||||
val32 = (uint32_t) val;
|
||||
val32 |= (val32 << 8);
|
||||
val32 |= (val32 << 16);
|
||||
|
||||
/* align destination to 32 */
|
||||
while(((uint32_t)(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, val);
|
||||
p_Dst8++;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* 32-bit chunks */
|
||||
p_Dst32 = (uint32_t*)(p_Dst8);
|
||||
while (size >> 2) /* size >= 4 */
|
||||
{
|
||||
WRITE_UINT32(*p_Dst32, val32);
|
||||
p_Dst32++;
|
||||
size -= 4;
|
||||
}
|
||||
|
||||
/* complete the leftovers */
|
||||
p_Dst8 = (uint8_t*)(p_Dst32);
|
||||
while (size--)
|
||||
{
|
||||
MY_WRITE_UINT8(*p_Dst8, val);
|
||||
p_Dst8++;
|
||||
}
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void * MemSet64(void* pDst, uint8_t val, uint32_t size)
|
||||
{
|
||||
uint64_t val64;
|
||||
uint64_t *pDst64;
|
||||
uint8_t *p_Dst8;
|
||||
|
||||
p_Dst8 = (uint8_t*)(pDst);
|
||||
|
||||
/* generate four 8-bit val's in 32-bit container */
|
||||
val64 = (uint64_t) val;
|
||||
val64 |= (val64 << 8);
|
||||
val64 |= (val64 << 16);
|
||||
val64 |= (val64 << 24);
|
||||
val64 |= (val64 << 32);
|
||||
|
||||
/* align destination to 64 */
|
||||
while(((uint32_t)(p_Dst8) & 7) && size) /* (pDst mod 8) > 0 and size > 0 */
|
||||
{
|
||||
*p_Dst8++ = val;
|
||||
size--;
|
||||
}
|
||||
|
||||
/* 64-bit chunks */
|
||||
pDst64 = (uint64_t*)(p_Dst8);
|
||||
while (size >> 4) /* size >= 8 */
|
||||
{
|
||||
*pDst64++ = val64;
|
||||
size -= 8;
|
||||
}
|
||||
|
||||
/* complete the leftovers */
|
||||
p_Dst8 = (uint8_t*)(pDst64);
|
||||
while (size--)
|
||||
*p_Dst8++ = val;
|
||||
|
||||
return pDst;
|
||||
}
|
||||
|
||||
void MemDisp(uint8_t *p, int size)
|
||||
{
|
||||
uint32_t space = ((uint32_t)p & 0x3);
|
||||
uint8_t *p_Limit;
|
||||
|
||||
if (space)
|
||||
{
|
||||
p_Limit = (p - space + 4);
|
||||
|
||||
XX_Print("0x%08X: ", (p - space));
|
||||
|
||||
while (space--)
|
||||
{
|
||||
XX_Print("--");
|
||||
}
|
||||
while (size && (p < p_Limit))
|
||||
{
|
||||
XX_Print("%02x", *(uint8_t*)p);
|
||||
size--;
|
||||
p++;
|
||||
}
|
||||
|
||||
XX_Print(" ");
|
||||
p_Limit += 12;
|
||||
|
||||
while ((size > 3) && (p < p_Limit))
|
||||
{
|
||||
XX_Print("%08x ", *(uint32_t*)p);
|
||||
size -= 4;
|
||||
p += 4;
|
||||
}
|
||||
XX_Print("\r\n");
|
||||
}
|
||||
|
||||
while (size > 15)
|
||||
{
|
||||
XX_Print("0x%08X: %08x %08x %08x %08x\r\n",
|
||||
p, *(uint32_t *)p, *(uint32_t *)(p + 4),
|
||||
*(uint32_t *)(p + 8), *(uint32_t *)(p + 12));
|
||||
size -= 16;
|
||||
p += 16;
|
||||
}
|
||||
|
||||
if (size)
|
||||
{
|
||||
XX_Print("0x%08X: ", p);
|
||||
|
||||
while (size > 3)
|
||||
{
|
||||
XX_Print("%08x ", *(uint32_t *)p);
|
||||
size -= 4;
|
||||
p += 4;
|
||||
}
|
||||
while (size)
|
||||
{
|
||||
XX_Print("%02x", *(uint8_t *)p);
|
||||
size--;
|
||||
p++;
|
||||
}
|
||||
|
||||
XX_Print("\r\n");
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,792 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __SEC_DCL_EXT_H
|
||||
#define __SEC_DCL_EXT_H
|
||||
|
||||
|
||||
#include "std_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_grp SEC DCL Module
|
||||
|
||||
@Description Functions, definitions and enumerators
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_initialization_grp Initialization Unit
|
||||
|
||||
@Description Initialization routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecDclParam
|
||||
{
|
||||
t_Handle h_Sec ; /**< SEC object */
|
||||
int memId ; /**< Memory partition ID */
|
||||
uint32_t alignment ; /**< Alignment of each descriptor buffer */
|
||||
uint32_t prefixSize ; /**< Size of data preceding each descriptor buffer */
|
||||
uint32_t postfixSize; /**< Size of data succeeding each descriptor buffer */
|
||||
/* wind river start */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
uint32_t noofBuf ; /**< Number of allocated descriptor objects */
|
||||
uint32_t descSize ; /**< Size of data for descriptor objects */
|
||||
uint32_t descBufSize; /**< Size of data for descriptor buffers */
|
||||
#endif
|
||||
/* wind river end */
|
||||
}
|
||||
t_SecDclParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_Config
|
||||
|
||||
@Description Allocates the SEC DCL object.
|
||||
|
||||
@Param[in] p_Param - Configuration parameters:
|
||||
h_Sec - SEC object.
|
||||
memId - Memory partition ID.
|
||||
alignment - Alignment of each descriptor buffer.
|
||||
prefixSize - Size of data preceding each descriptor buffer.
|
||||
postfixSize - Size of data succeeding each descriptor buffer.
|
||||
|
||||
@Return Handle to the SEC DCL object on success; NULL otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_Config(t_SecDclParam* p_Param);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_Init
|
||||
|
||||
@Description Initializes the SEC DCL.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_DCL_Init(t_Handle h_SecDcl);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_Free
|
||||
|
||||
@Description Deallocates the SEC DCL object.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_DCL_Free(t_Handle h_SecDcl);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_initialization_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_runtime_control_grp Runtime Control Unit
|
||||
|
||||
@Description Runtime control routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_runtime_control_job_desc_grp Job Descriptor Construction Interface
|
||||
|
||||
@Description Job descriptor construction routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Sequence Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SeqParam
|
||||
{
|
||||
bool sgt ;
|
||||
uint32_t size ;
|
||||
uint8_t* p_Data;
|
||||
}
|
||||
t_SeqParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Sequence Job-Descriptor Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SeqJobDescParam
|
||||
{
|
||||
t_Handle h_ShrDesc;
|
||||
t_SeqParam inputSeq ;
|
||||
t_SeqParam outputSeq;
|
||||
}
|
||||
t_SeqJobDescParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function InitSeqJobDesc
|
||||
|
||||
@Description Creates a Sequence Job-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_JobDescParam - Job-Descriptor parameters.
|
||||
|
||||
@Return Job-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitSeqJobDesc(t_Handle h_SecDcl,
|
||||
t_SeqJobDescParam* p_JobDescParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Split-Key Hashing-Algorithm Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SplitKeyHashAlg
|
||||
{
|
||||
e_SPLIT_KEY_HASH_ALG_MD5 ,
|
||||
e_SPLIT_KEY_HASH_ALG_SHA1 ,
|
||||
e_SPLIT_KEY_HASH_ALG_SHA2_224,
|
||||
e_SPLIT_KEY_HASH_ALG_SHA2_256,
|
||||
e_SPLIT_KEY_HASH_ALG_SHA2_384,
|
||||
e_SPLIT_KEY_HASH_ALG_SHA2_512
|
||||
}
|
||||
e_SplitKeyHashAlg;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Split-Key Job-Descriptor Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SplitKeyJobDescParam
|
||||
{
|
||||
uint8_t* p_InputKey ;
|
||||
uint8_t* p_OutputKey;
|
||||
e_SplitKeyHashAlg hashAlg ;
|
||||
}
|
||||
t_SplitKeyJobDescParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitSplitKeyJobDesc
|
||||
|
||||
@Description Creates a Split-Key Job-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_JobDescParam - Job-Descriptor parameters.
|
||||
|
||||
@Return Job-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitSplitKeyJobDesc(t_Handle h_SecDcl,
|
||||
t_SplitKeyJobDescParam* p_JobDescParam);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_runtime_control_job_desc_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_runtime_control_shr_desc_grp Shared Descriptor Construction Interface
|
||||
|
||||
@Description Shared descriptor construction routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Key Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_KeyParam
|
||||
{
|
||||
bool imm ;
|
||||
uint32_t size ;
|
||||
uint8_t* p_Data;
|
||||
}
|
||||
t_KeyParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_runtime_control_shr_desc_ipsec_grp Shared Descriptor Construction Interface for IPSEC
|
||||
|
||||
@Description Shared descriptor construction functions, definitions and enumerators for IPSEC
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Cryptographic-Algorithm Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_IpsecCryptoAlg
|
||||
{
|
||||
e_IPSEC_CRYPTO_ALG_DES ,
|
||||
e_IPSEC_CRYPTO_ALG_3DES ,
|
||||
e_IPSEC_CRYPTO_ALG_NULL_ENC ,
|
||||
e_IPSEC_CRYPTO_ALG_AES_CBC ,
|
||||
e_IPSEC_CRYPTO_ALG_AES_CTR ,
|
||||
e_IPSEC_CRYPTO_ALG_AES_CCM8 ,
|
||||
e_IPSEC_CRYPTO_ALG_AES_CCM12,
|
||||
e_IPSEC_CRYPTO_ALG_AES_CCM16,
|
||||
e_IPSEC_CRYPTO_ALG_AES_GCM8 ,
|
||||
e_IPSEC_CRYPTO_ALG_AES_GCM12,
|
||||
e_IPSEC_CRYPTO_ALG_AES_GCM16,
|
||||
e_IPSEC_CRYPTO_ALG_AES_GMAC ,
|
||||
e_IPSEC_CRYPTO_ALG_AES_XTS
|
||||
}
|
||||
e_IpsecCryptoAlg;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Authentication-Algorithm Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_IpsecAuthenAlg
|
||||
{
|
||||
e_IPSEC_AUTHEN_ALG_AES_CCM_GCM ,
|
||||
e_IPSEC_AUTHEN_ALG_HMAC_MD5_96 ,
|
||||
e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96 ,
|
||||
e_IPSEC_AUTHEN_ALG_AES_XCBC_MAC_96 ,
|
||||
e_IPSEC_AUTHEN_ALG_HMAC_MD5_128 ,
|
||||
e_IPSEC_AUTHEN_ALG_HMAC_SHA1_160 ,
|
||||
e_IPSEC_AUTHEN_ALG_AES_CMAC_96 ,
|
||||
e_IPSEC_AUTHEN_ALG_HMAC_SHA2_256_128,
|
||||
e_IPSEC_AUTHEN_ALG_HMAC_SHA2_384_192,
|
||||
e_IPSEC_AUTHEN_ALG_HMAC_SHA2_512_256
|
||||
}
|
||||
e_IpsecAuthenAlg;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Shared-Descriptor Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_IpsecShrDescParam
|
||||
{
|
||||
uint32_t dataMoveSize;
|
||||
t_KeyParam cryptoKey ;
|
||||
t_KeyParam authenKey ;
|
||||
e_IpsecCryptoAlg cryptoAlg ;
|
||||
e_IpsecAuthenAlg authenAlg ;
|
||||
}
|
||||
t_IpsecShrDescParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Anti-Replay-Size Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_IpsecArs
|
||||
{
|
||||
e_IPSEC_ARS_0 ,
|
||||
e_IPSEC_ARS_32,
|
||||
e_IPSEC_ARS_64
|
||||
}
|
||||
e_IpsecArs;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Version Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_IpsecVer
|
||||
{
|
||||
e_IPSEC_VER_4,
|
||||
e_IPSEC_VER_6
|
||||
}
|
||||
e_IpsecVer;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Header Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_IpsecHdr
|
||||
{
|
||||
e_IPSEC_HDR_NONE ,
|
||||
e_IPSEC_HDR_IN_FRAME,
|
||||
e_IPSEC_HDR_IN_PARAM
|
||||
}
|
||||
e_IpsecHdr;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Mode Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_IpsecMode
|
||||
{
|
||||
e_IPSEC_MODE_TRANSPORT,
|
||||
e_IPSEC_MODE_TUNNEL
|
||||
}
|
||||
e_IpsecMode;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC Type Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_IpsecType
|
||||
{
|
||||
e_IPSEC_TYPE_CBC,
|
||||
e_IPSEC_TYPE_CTR,
|
||||
e_IPSEC_TYPE_CCM,
|
||||
e_IPSEC_TYPE_GCM
|
||||
}
|
||||
e_IpsecType;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC-Encapsulation Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_IpsecEncapParam
|
||||
{
|
||||
bool copyDf ;
|
||||
bool decTtl ;
|
||||
bool enCksm ;
|
||||
bool copyDs ;
|
||||
bool randIv ;
|
||||
bool extSeqNum;
|
||||
uint8_t nextHdr ;
|
||||
uint8_t nhOffset ;
|
||||
uint64_t seqNum ;
|
||||
uint32_t spi ;
|
||||
uint16_t ipHdrLen ;
|
||||
uint8_t* p_IpHdr ;
|
||||
e_IpsecVer ipsecVer ;
|
||||
e_IpsecHdr ipsecHdr ;
|
||||
e_IpsecMode ipsecMode;
|
||||
e_IpsecType ipsecType;
|
||||
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint8_t iv[16];
|
||||
}
|
||||
cbc;
|
||||
|
||||
struct
|
||||
{
|
||||
uint32_t nonce ;
|
||||
uint32_t initCount;
|
||||
uint8_t iv[8] ;
|
||||
}
|
||||
ctr;
|
||||
|
||||
struct
|
||||
{
|
||||
uint32_t salt ;
|
||||
uint8_t b0Flags ;
|
||||
uint8_t ctrFlags ;
|
||||
uint16_t initCount;
|
||||
uint8_t iv[8] ;
|
||||
}
|
||||
ccm;
|
||||
|
||||
struct
|
||||
{
|
||||
uint32_t salt ;
|
||||
uint8_t iv[8];
|
||||
}
|
||||
gcm;
|
||||
}
|
||||
alg;
|
||||
}
|
||||
t_IpsecEncapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description IPSEC-Decapsulation Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_IpsecDecapParam
|
||||
{
|
||||
bool decTtl ;
|
||||
bool copyDs ;
|
||||
bool enCksm ;
|
||||
bool extSeqNum;
|
||||
bool outFmt ;
|
||||
uint16_t ipHdrLen ;
|
||||
uint8_t nhOffset ;
|
||||
uint64_t seqNum ;
|
||||
e_IpsecArs ipsecArs ;
|
||||
e_IpsecVer ipsecVer ;
|
||||
e_IpsecMode ipsecMode;
|
||||
e_IpsecType ipsecType;
|
||||
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t salt ;
|
||||
uint32_t initCount;
|
||||
}
|
||||
ctr;
|
||||
|
||||
struct
|
||||
{
|
||||
uint32_t salt ;
|
||||
uint8_t ivFlags ;
|
||||
uint8_t ctrFlags ;
|
||||
uint16_t initCount;
|
||||
}
|
||||
ccm;
|
||||
|
||||
struct
|
||||
{
|
||||
uint32_t salt;
|
||||
}
|
||||
gcm;
|
||||
}
|
||||
alg;
|
||||
}
|
||||
t_IpsecDecapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitIpsecEncapShrDesc
|
||||
|
||||
@Description Creates an IPSEC-Encapsulation Shared-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_ShrDescParam - Shared-Descriptor parameters.
|
||||
@Param[in] p_EncapParam - Encapsulation parameters.
|
||||
|
||||
@Return Shared-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitIpsecEncapShrDesc(t_Handle h_SecDcl,
|
||||
t_IpsecShrDescParam* p_ShrDescParam,
|
||||
t_IpsecEncapParam* p_EncapParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitIpsecDecapShrDesc
|
||||
|
||||
@Description Creates an IPSEC-Decapsulation Shared-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_ShrDescParam - Shared-Descriptor parameters.
|
||||
@Param[in] p_DecapParam - Decapsulation parameters.
|
||||
|
||||
@Return Shared-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitIpsecDecapShrDesc(t_Handle h_SecDcl,
|
||||
t_IpsecShrDescParam* p_ShrDescParam,
|
||||
t_IpsecDecapParam* p_DecapParam);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_runtime_control_shr_desc_ipsec_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_runtime_control_shr_desc_dtls_grp Shared Descriptor Construction Interface for DTLS
|
||||
|
||||
@Description Shared descriptor construction functions, definitions and enumerators for DTLS
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description DTLS Cipher-Algorithm Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_DtlsCipherAlg
|
||||
{
|
||||
e_DTLS_CIPHER_ALG_RC4_40_MD5 ,
|
||||
e_DTLS_CIPHER_ALG_RC4_128_MD5 ,
|
||||
e_DTLS_CIPHER_ALG_RC4_128_SHA ,
|
||||
e_DTLS_CIPHER_ALG_DES40_CBC_SHA ,
|
||||
e_DTLS_CIPHER_ALG_DES_CBC_SHA ,
|
||||
e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA ,
|
||||
e_DTLS_CIPHER_ALG_DES_CBC_MD5 ,
|
||||
e_DTLS_CIPHER_ALG_3DES_EDE_CBC_MD5 ,
|
||||
e_DTLS_CIPHER_ALG_RC4_40_SHA ,
|
||||
e_DTLS_CIPHER_ALG_DES40_CBC_MD5 ,
|
||||
e_DTLS_CIPHER_ALG_AES_128_CBC_SHA ,
|
||||
e_DTLS_CIPHER_ALG_AES_256_CBC_SHA ,
|
||||
e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_256 ,
|
||||
e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_256 ,
|
||||
e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_160 ,
|
||||
e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_384 ,
|
||||
e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_224 ,
|
||||
e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_512 ,
|
||||
e_DTLS_CIPHER_ALG_AES_192_CBC_SHA_256 ,
|
||||
e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_160,
|
||||
e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_384,
|
||||
e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_224,
|
||||
e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_512,
|
||||
e_DTLS_CIPHER_ALG_3DES_EDE_CBC_SHA_256,
|
||||
e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_160 ,
|
||||
e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_384 ,
|
||||
e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_224 ,
|
||||
e_DTLS_CIPHER_ALG_AES_256_CBC_SHA_512 ,
|
||||
e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_160 ,
|
||||
e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_384 ,
|
||||
e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_224 ,
|
||||
e_DTLS_CIPHER_ALG_AES_128_CBC_SHA_512
|
||||
}
|
||||
e_DtlsCipherAlg;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description DTLS Shared-Descriptor Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_DtlsShrDescParam
|
||||
{
|
||||
uint32_t dataMoveSize;
|
||||
t_KeyParam cryptoKey ;
|
||||
t_KeyParam authenKey ;
|
||||
e_DtlsCipherAlg cipherAlg ;
|
||||
}
|
||||
t_DtlsShrDescParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description DTLS Anti-Replay-Size Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_DtlsArs
|
||||
{
|
||||
e_DTLS_ARS_0 ,
|
||||
e_DTLS_ARS_32,
|
||||
e_DTLS_ARS_64
|
||||
}
|
||||
e_DtlsArs;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description DTLS-Encapsulation Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_DtlsEncapParam
|
||||
{
|
||||
bool wbIv ;
|
||||
bool expIv ;
|
||||
uint8_t type ;
|
||||
uint16_t version;
|
||||
uint16_t epoch ;
|
||||
uint64_t seqNum ;
|
||||
uint8_t iv[16] ;
|
||||
}
|
||||
t_DtlsEncapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description DTLS-Decapsulation Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_DtlsDecapParam
|
||||
{
|
||||
bool wbIv ;
|
||||
bool expIv ;
|
||||
uint16_t epoch ;
|
||||
uint64_t seqNum ;
|
||||
uint8_t iv[16] ;
|
||||
e_DtlsArs dtlsArs;
|
||||
}
|
||||
t_DtlsDecapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitDtlsEncapShrDesc
|
||||
|
||||
@Description Creates a DTLS-Encapsulation Shared-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_ShrDescParam - Shared-Descriptor parameters.
|
||||
@Param[in] p_EncapParam - Encapsulation parameters.
|
||||
|
||||
@Return Shared-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitDtlsEncapShrDesc(t_Handle h_SecDcl,
|
||||
t_DtlsShrDescParam* p_ShrDescParam,
|
||||
t_DtlsEncapParam* p_EncapParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitDtlsDecapShrDesc
|
||||
|
||||
@Description Creates a DTLS-Decapsulation Shared-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_ShrDescParam - Shared-Descriptor parameters.
|
||||
@Param[in] p_DecapParam - Decapsulation parameters.
|
||||
|
||||
@Return Shared-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitDtlsDecapShrDesc(t_Handle h_SecDcl,
|
||||
t_DtlsShrDescParam* p_ShrDescParam,
|
||||
t_DtlsDecapParam* p_DecapParam);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_runtime_control_shr_desc_dtls_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_dcl_mdl_runtime_control_shr_desc_macsec_grp Shared Descriptor Construction Interface for MACSEC
|
||||
|
||||
@Description Shared descriptor construction functions, definitions and enumerators for MACSEC
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description MACSEC Cipher-Algorithm Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_MacsecCipherAlg
|
||||
{
|
||||
e_MACSEC_CIPHER_ALG_AES_GCM_16
|
||||
}
|
||||
e_MacsecCipherAlg;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description MACSEC Shared-Descriptor Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_MacsecShrDescParam
|
||||
{
|
||||
uint32_t dataMoveSize;
|
||||
t_KeyParam cipherKey ;
|
||||
e_MacsecCipherAlg cipherAlg ;
|
||||
}
|
||||
t_MacsecShrDescParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description MACSEC-Encapsulation Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_MacsecEncapParam
|
||||
{
|
||||
uint16_t aadLength;
|
||||
uint64_t sci ;
|
||||
uint16_t etherType;
|
||||
uint8_t tciAn ;
|
||||
uint32_t pn ;
|
||||
}
|
||||
t_MacsecEncapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description MACSEC-Decapsulation Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_MacsecDecapParam
|
||||
{
|
||||
bool enAr ;
|
||||
uint16_t aadLength;
|
||||
uint64_t sci ;
|
||||
uint8_t arLen ;
|
||||
uint32_t pn ;
|
||||
}
|
||||
t_MacsecDecapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitMacsecEncapShrDesc
|
||||
|
||||
@Description Creates a MACSEC-Encapsulation Shared-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_ShrDescParam - Shared-Descriptor parameters.
|
||||
@Param[in] p_EncapParam - Encapsulation parameters.
|
||||
|
||||
@Return Shared-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitMacsecEncapShrDesc(t_Handle h_SecDcl,
|
||||
t_MacsecShrDescParam* p_ShrDescParam,
|
||||
t_MacsecEncapParam* p_EncapParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitMacsecDecapShrDesc
|
||||
|
||||
@Description Creates a MACSEC-Decapsulation Shared-Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_ShrDescParam - Shared-Descriptor parameters.
|
||||
@Param[in] p_DecapParam - Decapsulation parameters.
|
||||
|
||||
@Return Shared-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitMacsecDecapShrDesc(t_Handle h_SecDcl,
|
||||
t_MacsecShrDescParam* p_ShrDescParam,
|
||||
t_MacsecDecapParam* p_DecapParam);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_runtime_control_shr_desc_macsec_grp */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_runtime_control_shr_desc_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_GetDescPrefix
|
||||
|
||||
@Description Returns a pointer to the data preceding a descriptor buffer.
|
||||
|
||||
@Param[in] h_Desc - Descriptor object.
|
||||
|
||||
@Return Pointer to the data preceding the descriptor buffer.
|
||||
*//***************************************************************************/
|
||||
uint8_t* SEC_DCL_GetDescPrefix(t_Handle h_Desc);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_GetDescBuffer
|
||||
|
||||
@Description Returns a pointer to a descriptor buffer.
|
||||
|
||||
@Param[in] h_Desc - Descriptor object.
|
||||
|
||||
@Return Pointer to the descriptor buffer.
|
||||
*//***************************************************************************/
|
||||
uint8_t* SEC_DCL_GetDescBuffer(t_Handle h_Desc);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_GetDescPostfix
|
||||
|
||||
@Description Returns a pointer to the data succeeding a descriptor buffer.
|
||||
|
||||
@Param[in] h_Desc - Descriptor object.
|
||||
|
||||
@Return Pointer to the data succeeding the descriptor buffer.
|
||||
*//***************************************************************************/
|
||||
uint8_t* SEC_DCL_GetDescPostfix(t_Handle h_Desc);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_GetBufferSize
|
||||
|
||||
@Description Returns the size of a descriptor buffer.
|
||||
|
||||
@Param[in] h_Desc - Descriptor object.
|
||||
|
||||
@Return Size of the descriptor buffer.
|
||||
*//***************************************************************************/
|
||||
uint32_t SEC_DCL_GetBufferSize(t_Handle h_Desc);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_FreeDesc
|
||||
|
||||
@Description Deallocates a Descriptor object.
|
||||
|
||||
@Param[in] h_Desc - Descriptor object.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void SEC_DCL_FreeDesc(t_Handle h_Desc);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_runtime_control_grp */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_dcl_mdl_grp */
|
||||
|
||||
|
||||
#endif /* __SEC_DCL_EXT_H */
|
||||
@@ -0,0 +1,512 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**
|
||||
|
||||
@File sec_ext.h
|
||||
|
||||
@Description SEC external structures and definitions.
|
||||
*//***************************************************************************/
|
||||
#ifndef __SEC_EXT_H
|
||||
#define __SEC_EXT_H
|
||||
|
||||
|
||||
#include "std_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_mdl_grp SEC Module
|
||||
|
||||
@Description Functions, definitions and enumerators
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description General Definitions
|
||||
*//***************************************************************************/
|
||||
#define SEC_MAX_NUM_OF_QI_JOBS 15 /**< Maximum number of Qman Interface jobs */
|
||||
#define SEC_TOTAL_NUM_OF_JQS 4 /**< Total number of job queues */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_mdl_initialization_grp Initialization Unit
|
||||
|
||||
@Description Initialization routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecParam
|
||||
{
|
||||
uint32_t guestId ; /**< Guest ID */
|
||||
uint64_t baseAddr; /**< Base address */
|
||||
}
|
||||
t_SecParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_Config
|
||||
|
||||
@Description Allocates the SEC object.
|
||||
|
||||
@Param[in] p_Param - Configuration parameters:
|
||||
guestId - Guest ID.
|
||||
baseAddr - Base address.
|
||||
|
||||
@Return Handle to the SEC object on success; NULL otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_Config(t_SecParam* p_Param);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_Init
|
||||
|
||||
@Description Initializes the SEC General registers (Master user only).
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_Init(t_Handle h_Sec);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_Free
|
||||
|
||||
@Description Deallocates the SEC object.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_Free(t_Handle h_Sec);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_mdl_advance_config_grp Advanced Configuration Unit
|
||||
|
||||
@Description Advanced configuration routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Soft Reset Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SecSoftReset
|
||||
{
|
||||
e_SEC_SOFT_RESET_NEVER , /**< Soft reset never initiated */
|
||||
e_SEC_SOFT_RESET_ON_INIT /**< Soft reset upon initialization */
|
||||
}
|
||||
e_SecSoftReset;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_ConfigSoftReset
|
||||
|
||||
@Description Configures the SEC Soft-Reset mode.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
@Param[in] softReset - Soft reset (default value = [DEFAULT_softReset]).
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
|
||||
@Cautions Only the Master user can configure the Soft-Reset mode.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_ConfigSoftReset(t_Handle h_Sec,
|
||||
e_SecSoftReset softReset);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Address Space Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SecAddrSpace
|
||||
{
|
||||
e_SEC_ADDR_SPACE_32_BIT, /**< 32-bit address space */
|
||||
e_SEC_ADDR_SPACE_64_BIT /**< 64-bit address space */
|
||||
}
|
||||
e_SecAddrSpace;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_ConfigAddrSpace
|
||||
|
||||
@Description Configures the SEC Address-Space mode.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
@Param[in] addrSpace - Address space (default value = [DEFAULT_addrSpace]).
|
||||
|
||||
@Notes If any core uses 64-bit address space, then 64-bit address space configuration must be applied.
|
||||
If all cores use 32-bit address space, then 32-bit address space configuration may be applied.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
|
||||
@Cautions Only the Master user can configure the Address-Space mode.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_ConfigAddrSpace(t_Handle h_Sec,
|
||||
e_SecAddrSpace addrSpace);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Byte Swap Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SecByteSwap
|
||||
{
|
||||
e_SEC_BYTE_SWAP_NONE , /**< No byte swap */
|
||||
e_SEC_BYTE_SWAP_1_IN_2 , /**< 00|01 02|03 04|05 06|07 08|09 0A|0B 0C|0D 0E|0F ==> 01|00 03|02 05|04 07|06 09|08 0B|0A 0D|0C 0F|0E */
|
||||
e_SEC_BYTE_SWAP_1_IN_4 , /**< 00|01|02|03 04|05|06|07 08|09|0A|0B 0C|0D|0E|0F ==> 03|02|01|00 07|06|05|04 0B|0A|09|08 0F|0E|0D|0C */
|
||||
e_SEC_BYTE_SWAP_1_IN_8 , /**< 00|01|02|03|04|05|06|07 08|09|0A|0B|0C|0D|0E|0F ==> 07|06|05|04|03|02|01|00 0F|0E|0D|0C|0B|0A|09|08 */
|
||||
e_SEC_BYTE_SWAP_1_IN_16, /**< 00|01|02|03|04|05|06|07|08|09|0A|0B|0C|0D|0E|0F ==> 0F|0E|0D|0C|0B|0A|09|08|07|06|05|04|03|02|01|00 */
|
||||
e_SEC_BYTE_SWAP_2_IN_4 , /**< 00_01|02_03 04_05|06_07 08_09|0A_0B 0C_0D|0E_0F ==> 02_03|00_01 06_07|04_05 0A_0B|08_09 0E_0F|0C_0D */
|
||||
e_SEC_BYTE_SWAP_2_IN_8 , /**< 00_01|02_03|04_05|06_07 08_09|0A_0B|0C_0D|0E_0F ==> 06_07|04_05|02_03|00_01 0E_0F|0C_0D|0A_0B|08_09 */
|
||||
e_SEC_BYTE_SWAP_2_IN_16, /**< 00_01|02_03|04_05|06_07|08_09|0A_0B|0C_0D|0E_0F ==> 0E_0F|0C_0D|0A_0B|08_09|06_07|04_05|02_03|00_01 */
|
||||
e_SEC_BYTE_SWAP_4_IN_8 , /**< 00_01_02_03|04_05_06_07 08_09_0A_0B|0C_0D_0E_0F ==> 04_05_06_07|00_01_02_03 0C_0D_0E_0F|08_09_0A_0B */
|
||||
e_SEC_BYTE_SWAP_4_IN_16, /**< 00_01_02_03|04_05_06_07|08_09_0A_0B|0C_0D_0E_0F ==> 0C_0D_0E_0F|08_09_0A_0B|04_05_06_07|00_01_02_03 */
|
||||
e_SEC_BYTE_SWAP_8_IN_16 /**< 00_01_02_03_04_05_06_07|08_09_0A_0B_0C_0D_0E_0F ==> 08_09_0A_0B_0C_0D_0E_0F|00_01_02_03_04_05_06_07 */
|
||||
}
|
||||
e_SecByteSwap;
|
||||
|
||||
|
||||
/** @} */ /* end of sec_mdl_advance_config_grp */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_mdl_initialization_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_mdl_runtime_control_grp Runtime Control Unit
|
||||
|
||||
@Description Runtime control routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//*
|
||||
@Function SEC_GetPtrSize
|
||||
|
||||
@Description Returns the SEC pointer size.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
|
||||
@Return SEC pointer size.
|
||||
*//***************************************************************************/
|
||||
uint32_t SEC_GetPtrSize(t_Handle h_Sec);
|
||||
|
||||
|
||||
/**************************************************************************//*
|
||||
@Function SEC_GetBurstSize
|
||||
|
||||
@Description Returns the SEC burst size.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
|
||||
@Return SEC burst size.
|
||||
*//***************************************************************************/
|
||||
uint32_t SEC_GetBurstSize(t_Handle h_Sec);
|
||||
|
||||
|
||||
/**************************************************************************//*
|
||||
@Function SEC_GetMajRevNum
|
||||
|
||||
@Description Returns the SEC major-revision number.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
|
||||
@Return SEC major-revision number.
|
||||
*//***************************************************************************/
|
||||
uint8_t SEC_GetMajRevNum(t_Handle h_Sec);
|
||||
|
||||
|
||||
/**************************************************************************//*
|
||||
@Function SEC_GetMinRevNum
|
||||
|
||||
@Description Returns the SEC minor-revision number.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
|
||||
@Return SEC minor-revision number.
|
||||
*//***************************************************************************/
|
||||
uint8_t SEC_GetMinRevNum(t_Handle h_Sec);
|
||||
|
||||
|
||||
/**************************************************************************//*
|
||||
@Function SEC_InitJqLiodnReg
|
||||
|
||||
@Description Initializes the LIODN register of a given job queue.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
@Param[in] jobQueueId - Job queue ID.
|
||||
@Param[in] seqLiodnVal - Sequential LIODN value.
|
||||
@Param[in] nonSeqLiodnVal - Non-sequential LIODN value.
|
||||
@Param[in] allowMtdJobs - Allow MTD jobs.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_InitJqLiodnReg(t_Handle h_Sec,
|
||||
uint8_t jobQueueId,
|
||||
uint16_t seqLiodnVal,
|
||||
uint16_t nonSeqLiodnVal,
|
||||
bool allowMtdJobs);
|
||||
|
||||
|
||||
/**************************************************************************//*
|
||||
@Function SEC_CalcByteSwapFlags
|
||||
|
||||
@Description Calculates a flag combination that produces a given byte-swap.
|
||||
|
||||
@Param[in] byteSwap - Required byte-swap.
|
||||
@Param[in] swap1In4 - A flag for reversing 4 units, where each unit is 1-byte long.
|
||||
@Param[in] swap2In4 - A flag for reversing 2 units, where each unit is 2-byte long.
|
||||
@Param[in] swap4In8 - A flag for reversing 2 units, where each unit is 4-byte long.
|
||||
@Param[in] swap8In16 - A flag for reversing 2 units, where each unit is 8-byte long.
|
||||
|
||||
@Return The flag combination that produces the given byte-swap.
|
||||
*//***************************************************************************/
|
||||
uint64_t SEC_CalcByteSwapFlags(e_SecByteSwap byteSwap,
|
||||
uint64_t swap1In4,
|
||||
uint64_t swap2In4,
|
||||
uint64_t swap4In8,
|
||||
uint64_t swap8In16);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Job Status Sources
|
||||
*//***************************************************************************/
|
||||
#define SEC_JOB_STATUS_SOURCE_NONE 0x0 /**< No status source */
|
||||
#define SEC_JOB_STATUS_SOURCE_CCB 0x2 /**< Cryptographic Control Block status source */
|
||||
#define SEC_JOB_STATUS_SOURCE_JHU 0x3 /**< Jump Halt User status source */
|
||||
#define SEC_JOB_STATUS_SOURCE_DECO 0x4 /**< Descriptor Controller status source */
|
||||
#define SEC_JOB_STATUS_SOURCE_JQ 0x6 /**< Job Queue status source */
|
||||
#define SEC_JOB_STATUS_SOURCE_JHT 0x7 /**< Jump Halt Test status source */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Cryptographic Control Block Descriptor Errors
|
||||
*//***************************************************************************/
|
||||
#define SEC_CCB_DESC_ERROR_NONE 0x0 /**< No error */
|
||||
#define SEC_CCB_DESC_ERROR_MODE 0x1 /**< Mode error */
|
||||
#define SEC_CCB_DESC_ERROR_DATA_SIZE 0x2 /**< Data size error */
|
||||
#define SEC_CCB_DESC_ERROR_KEY_SIZE 0x3 /**< Key size error */
|
||||
#define SEC_CCB_DESC_ERROR_PKHA_A_MEM_SIZE 0x4 /**< PKHA A memory size error */
|
||||
#define SEC_CCB_DESC_ERROR_PKHA_B_MEM_SIZE 0x5 /**< PKHA B memory size error */
|
||||
#define SEC_CCB_DESC_ERROR_DATA_OUT_OF_SEQ 0x6 /**< Data arrived out of sequence error */
|
||||
#define SEC_CCB_DESC_ERROR_PKHA_DIV_BY_ZERO 0x7 /**< PKHA divide-by-zero error */
|
||||
#define SEC_CCB_DESC_ERROR_PKHA_MODULES_EVEN 0x8 /**< PKHA modulus even error */
|
||||
#define SEC_CCB_DESC_ERROR_DES_KEY_PARITY 0x9 /**< DES key parity error */
|
||||
#define SEC_CCB_DESC_ERROR_ICV_CHECK 0xA /**< ICV check failed */
|
||||
#define SEC_CCB_DESC_ERROR_HARDWARE 0xB /**< Hardware error */
|
||||
#define SEC_CCB_DESC_ERROR_CCM_AAD_SIZE 0xC /**< Unsupported CCM AAD size */
|
||||
#define SEC_CCB_DESC_ERROR_CHA_NOT_RESET 0xD /**< Class 1 CHA not reset */
|
||||
#define SEC_CCB_DESC_ERROR_CHA_COMB_SELECTED 0xE /**< Invalid CHA combination selected */
|
||||
#define SEC_CCB_DESC_ERROR_CHA_SELECTED 0xF /**< Invalid CHA selected */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Cryptographic Control Block Algorithms
|
||||
*//***************************************************************************/
|
||||
#define SEC_CCB_ALGORITHM_AES 0x1 /**< AES */
|
||||
#define SEC_CCB_ALGORITHM_DES_3DES 0x2 /**< DES or 3DES */
|
||||
#define SEC_CCB_ALGORITHM_ARC4 0x3 /**< ARC4 */
|
||||
#define SEC_CCB_ALGORITHM_MD5_SHA 0x4 /**< MD5 or SHA */
|
||||
#define SEC_CCB_ALGORITHM_RNG 0x5 /**< RNG */
|
||||
#define SEC_CCB_ALGORITHM_SNOW_F8 0x6 /**< SNOW f8 */
|
||||
#define SEC_CCB_ALGORITHM_KASUMI_F8_F9 0x7 /**< Kasumi f8 / f9 */
|
||||
#define SEC_CCB_ALGORITHM_PUBLIC_KEY 0x8 /**< Public Key */
|
||||
#define SEC_CCB_ALGORITHM_CRC 0x9 /**< CRC */
|
||||
#define SEC_CCB_ALGORITHM_SNOW_F9 0xA /**< SNOW f9 */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Descriptor Controller Descriptor Errors
|
||||
*//***************************************************************************/
|
||||
#define SEC_DECO_DESC_ERROR_NONE 0x00 /**< No error */
|
||||
#define SEC_DECO_DESC_ERROR_SGT_LENGTH 0x01 /**< SGT length error */
|
||||
#define SEC_DECO_DESC_ERROR_JQ_CONTROL 0x03 /**< JQ control error */
|
||||
#define SEC_DECO_DESC_ERROR_CMD 0x04 /**< Invalid command */
|
||||
#define SEC_DECO_DESC_ERROR_KEY_CMD 0x06 /**< Invalid Key command */
|
||||
#define SEC_DECO_DESC_ERROR_LOAD_CMD 0x07 /**< Invalid Load command */
|
||||
#define SEC_DECO_DESC_ERROR_STORE_CMD 0x08 /**< Invalid Store command */
|
||||
#define SEC_DECO_DESC_ERROR_OPERATION_CMD 0x09 /**< Invalid Operation command */
|
||||
#define SEC_DECO_DESC_ERROR_FIFO_LOAD_CMD 0x0A /**< Invalid Fifo-Load command */
|
||||
#define SEC_DECO_DESC_ERROR_FIFO_STORE_CMD 0x0B /**< Invalid Fifo-Store command */
|
||||
#define SEC_DECO_DESC_ERROR_MOVE_CMD 0x0C /**< Invalid Move command */
|
||||
#define SEC_DECO_DESC_ERROR_JUMP_CMD 0x0D /**< Invalid Jump command */
|
||||
#define SEC_DECO_DESC_ERROR_MATH_CMD 0x0E /**< Invalid Math command */
|
||||
#define SEC_DECO_DESC_ERROR_SIGNED_HASH_CMD 0x0F /**< Invalid Signed-Hash command */
|
||||
#define SEC_DECO_DESC_ERROR_SEQUENCE_CMD 0x10 /**< Invalid Sequence command */
|
||||
#define SEC_DECO_DESC_ERROR_SKIP_DATA_TYPE 0x11 /**< Skip data type invalid */
|
||||
#define SEC_DECO_DESC_ERROR_SHARED_HEADER 0x12 /**< Shared header error */
|
||||
#define SEC_DECO_DESC_ERROR_HEADER 0x13 /**< Header error */
|
||||
#define SEC_DECO_DESC_ERROR_BURSTER 0x14 /**< Burster error */
|
||||
#define SEC_DECO_DESC_ERROR_CONTEXT_REG_LEN 0x15 /**< Context register length error */
|
||||
#define SEC_DECO_DESC_ERROR_DMA 0x16 /**< DMA error */
|
||||
#define SEC_DECO_DESC_ERROR_JQ_RESET 0x1A /**< Job failed due to job queue reset */
|
||||
#define SEC_DECO_DESC_ERROR_FAIL_MODE 0x1B /**< Job failed due to fail mode */
|
||||
#define SEC_DECO_DESC_ERROR_WATCHDOG_TIMEOUT 0x1C /**< Watchdog timer timeout error */
|
||||
#define SEC_DECO_DESC_ERROR_KEY_COPY 0x1D /**< Key copy failure */
|
||||
#define SEC_DECO_DESC_ERROR_DATA_COPY 0x1E /**< Data copy failure */
|
||||
#define SEC_DECO_DESC_ERROR_LIODN 0x1F /**< LIODN error */
|
||||
#define SEC_DECO_DESC_ERROR_RESET 0x20 /**< Reset initiated via the DRR */
|
||||
#define SEC_DECO_DESC_ERROR_NONCE 0x21 /**< Nonce error */
|
||||
#define SEC_DECO_DESC_ERROR_META_DATA_SIZE 0x22 /**< Meta data too large */
|
||||
#define SEC_DECO_DESC_ERROR_DNR 0x80 /**< DNR (do not run) error */
|
||||
#define SEC_DECO_DESC_ERROR_PROTOCOL_CMD 0x81 /**< Undefined protocol command */
|
||||
#define SEC_DECO_DESC_ERROR_PDB_SETTIGS 0x82 /**< Invalid setting in PDB */
|
||||
#define SEC_DECO_DESC_ERROR_LATE 0x83 /**< Anti-replay late error */
|
||||
#define SEC_DECO_DESC_ERROR_REPLAY 0x84 /**< Anti-replay replay error */
|
||||
#define SEC_DECO_DESC_ERROR_SEQ_NUM_OVERFLOW 0x85 /**< Sequence number overflow */
|
||||
#define SEC_DECO_DESC_ERROR_SIGVER_SIGNATURE 0x86 /**< Sigver invalid signature */
|
||||
#define SEC_DECO_DESC_ERROR_DSA_SIGN 0x87 /**< DSA sign illegal test descriptor */
|
||||
#define SEC_DECO_DESC_ERROR_PROTOCOL_FORMAT 0x88 /**< Protocol format error */
|
||||
#define SEC_DECO_DESC_ERROR_PROTOCOL_SIZE 0x89 /**< Protocol size error */
|
||||
#define SEC_DECO_DESC_ERROR_BLOB_MODE 0xC1 /**< Undefined blob mode */
|
||||
#define SEC_DECO_DESC_ERROR_BLOB_SEC_MEM_MODE 0xC2 /**< Secure memory blob mode error */
|
||||
#define SEC_DECO_DESC_ERROR_BLOB_KEY_SIZE 0xC4 /**< Black blob key or input size error */
|
||||
#define SEC_DECO_DESC_ERROR_BLOB_KEY_DEST 0xC5 /**< Invalid key destination */
|
||||
#define SEC_DECO_DESC_ERROR_BLOB_TRST_SEC_MODE 0xC8 /**< Trusted/Secure mode error */
|
||||
#define SEC_DECO_DESC_ERROR_TTL_OR_HOP_LIMIT 0xF0 /**< IPsec TTL or hop limit field 0 */
|
||||
#define SEC_DECO_DESC_ERROR_3GPP_HFN 0xF1 /**< 3GPP HFN matches or exceeds threshold */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Job Queue Descriptor Errors
|
||||
*//***************************************************************************/
|
||||
#define SEC_JQ_DESC_ERROR_NONE 0x00 /**< No error */
|
||||
#define SEC_JQ_DESC_ERROR_READ_DESC_ADDR 0x1E /**< Error reading the descriptor address */
|
||||
#define SEC_JQ_DESC_ERROR_READ_DESC 0x1F /**< Error reading the descriptor */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Jump Halt Test Errors
|
||||
*//***************************************************************************/
|
||||
#define SEC_JHT_ERROR_PKHA_IS_ZERO 0x80 /**< The result of a PKHA operation is zero */
|
||||
#define SEC_JHT_ERROR_PKHA_GCD_ONE 0x40 /**< The greatest common divisor of two numbers is one */
|
||||
#define SEC_JHT_ERROR_PKHA_IS_PRIME 0x20 /**< The given number is probably prime */
|
||||
#define SEC_JHT_ERROR_MATH_N 0x08 /**< The result is negative */
|
||||
#define SEC_JHT_ERROR_MATH_Z 0x04 /**< The result of a math operation is zero */
|
||||
#define SEC_JHT_ERROR_MATH_C 0x02 /**< The math operation resulted in a carry or borrow */
|
||||
#define SEC_JHT_ERROR_MATH_NV 0x01 /**< A combination of the sign bit and overflow */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Job Status
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecJobStatus
|
||||
{
|
||||
uint8_t sourceId; /**< Source ID */
|
||||
|
||||
union
|
||||
{
|
||||
struct /**< Cryptographic Control Block Details */
|
||||
{
|
||||
bool jump ; /**< The descriptor made a jump to another descriptor */
|
||||
uint8_t descIndex; /**< Index into the failing descriptor */
|
||||
uint8_t algorithm; /**< Algorithm that generated the error */
|
||||
uint8_t descError; /**< Descriptor error */
|
||||
}
|
||||
ccbDetails;
|
||||
|
||||
struct /**< Jump Halt User Details */
|
||||
{
|
||||
bool jump ; /**< The descriptor made a jump to another descriptor */
|
||||
uint8_t descIndex; /**< Index into the failing descriptor */
|
||||
uint8_t status ; /**< User status field from Jump command */
|
||||
}
|
||||
jhuDetails;
|
||||
|
||||
struct /**< Descriptor Controller Details */
|
||||
{
|
||||
bool jump ; /**< The descriptor made a jump to another descriptor */
|
||||
uint8_t descIndex; /**< Index into the failing descriptor */
|
||||
uint8_t descError; /**< Descriptor error */
|
||||
}
|
||||
decoDetails;
|
||||
|
||||
struct /**< Job Queue Details */
|
||||
{
|
||||
uint8_t numOfDars; /**< Number of descriptor addresses requested */
|
||||
uint8_t descError; /**< Descriptor error */
|
||||
}
|
||||
jqDetails;
|
||||
|
||||
struct /**< Jump Halt Test Details */
|
||||
{
|
||||
bool jump ; /**< The descriptor made a jump to another descriptor */
|
||||
uint8_t descIndex; /**< Index into the failing descriptor */
|
||||
uint8_t condCodes; /**< Condition codes field from Jump command */
|
||||
}
|
||||
jhtDetails;
|
||||
} details;
|
||||
}
|
||||
t_SecJobStatus;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DecodeJobStatus
|
||||
|
||||
@Description Decodes an encoded job-status.
|
||||
|
||||
@Param[in] jobStatus - Encoded job-status.
|
||||
|
||||
@Return Decoded job-status.
|
||||
|
||||
@Cautions Encoded job-status format is not asserted.
|
||||
*//***************************************************************************/
|
||||
t_SecJobStatus SEC_DecodeJobStatus(uint32_t jobStatus);
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_PrintJobStatus
|
||||
|
||||
@Description Decodes an encoded job-status and prints it.
|
||||
|
||||
@Param[in] jobStatus - Encoded job-status.
|
||||
|
||||
@Return None.
|
||||
|
||||
@Cautions Encoded job-status format is not asserted.
|
||||
*//***************************************************************************/
|
||||
void SEC_PrintJobStatus(uint32_t jobStatus);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DumpRegisters
|
||||
|
||||
@Description Dumps the contents of the SEC General registers.
|
||||
|
||||
@Param[in] h_Sec - SEC object.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void SEC_DumpRegisters(t_Handle h_Sec);
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_mdl_runtime_control_grp */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_mdl_grp */
|
||||
|
||||
|
||||
#endif /* __SEC_EXT_H */
|
||||
@@ -0,0 +1,335 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**
|
||||
|
||||
@File sec_jq_ext.h
|
||||
|
||||
@Description SEC JQ external structures and definitions.
|
||||
*//***************************************************************************/
|
||||
#ifndef __SEC_JQ_EXT_H
|
||||
#define __SEC_JQ_EXT_H
|
||||
|
||||
|
||||
#include "sec_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_jq_mdl_grp SEC JQ Module
|
||||
|
||||
@Description Functions, definitions and enumerators
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_jq_mdl_initialization_grp Initialization Unit
|
||||
|
||||
@Description Initialization routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Definition t_SecJqCbr
|
||||
|
||||
@Description Prototype of the application routine called upon every job completion.
|
||||
|
||||
@Param[in] h_App - Application parameters.
|
||||
@Param[in] p_JobDesc - Job descriptor address.
|
||||
@Param[in] h_Context - Job descriptor context.
|
||||
@Param[in] jobStatus - Job status.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
typedef void (t_SecJqCbr)(t_Handle h_App,
|
||||
void* p_JobDesc,
|
||||
t_Handle h_Context,
|
||||
uint32_t jobStatus);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecJqParam
|
||||
{
|
||||
t_Handle h_Sec ; /**< SEC object */
|
||||
uint64_t baseAddr ; /**< Base address */
|
||||
uint8_t jobQueueId ; /**< Job queue ID */
|
||||
uint16_t seqLiodnVal ; /**< Sequential LIODN value */
|
||||
uint16_t nonSeqLiodnVal; /**< Non-sequential LIODN value */
|
||||
t_SecJqCbr* f_Cbr ; /**< Callback routine */
|
||||
t_Handle h_App ; /**< Application */
|
||||
int irq ; /**< IRQ */
|
||||
/* windriver start */
|
||||
/* To be able to share a job queue object between cores */
|
||||
int memId ; /**< Memory partition ID */
|
||||
/* windriver end */
|
||||
}
|
||||
t_SecJqParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_Config
|
||||
|
||||
@Description Allocates a SEC JQ object.
|
||||
|
||||
@Param[in] p_Param - Configuration parameters:
|
||||
h_Sec - SEC object.
|
||||
baseAddr - Base address.
|
||||
jobQueueId - Job queue ID.
|
||||
seqLiodnVal - Sequential LIODN value.
|
||||
nonSeqLiodnVal - Non-sequential LIODN value.
|
||||
f_Cbr - Callback routine.
|
||||
h_App - Application.
|
||||
irq - IRQ.
|
||||
|
||||
@Return Handle to a SEC JQ object on success; NULL otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_JQ_Config(t_SecJqParam* p_Param);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_Init
|
||||
|
||||
@Description Initializes a SEC JQ registers.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_Init(t_Handle h_SecJq);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_Free
|
||||
|
||||
@Description Deallocates a SEC JQ object.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_Free(t_Handle h_SecJq);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_jq_mdl_advance_config_grp Advanced Configuration Unit
|
||||
|
||||
@Description Advanced configuration routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_ConfigAllowMtdJobs
|
||||
|
||||
@Description Configures a SEC JQ whether or not to allow MTD jobs.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
@Param[in] allowMtdJobs - Allow MTD jobs (default value = [DEFAULT_allowMtdJobs]).
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_ConfigAllowMtdJobs(t_Handle h_SecJq,
|
||||
bool allowMtdJobs);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Ring Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecJqRingParam
|
||||
{
|
||||
uint32_t len ; /**< Number of entries */
|
||||
int memId; /**< Memory partition ID */
|
||||
}
|
||||
t_SecJqRingParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_ConfigInputRing
|
||||
|
||||
@Description Configures a SEC JQ input ring.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
@Param[in] p_RingParam - Input ring configuration parameters:
|
||||
len - Number of entries (default value = [DEFAULT_inputRingLen ]).
|
||||
memId - Memory partition ID (default value = [DEFAULT_inputRingMemId]).
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
|
||||
@Cautions len must be between [MIN_VAL_inputRingLen] and [MAX_VAL_inputRingLen].
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_ConfigInputRing(t_Handle h_SecJq,
|
||||
t_SecJqRingParam* p_RingParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_ConfigOutputRing
|
||||
|
||||
@Description Configures a SEC JQ output ring.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
@Param[in] p_RingParam - Output ring configuration parameters:
|
||||
len - Number of entries (default value = [DEFAULT_outputRingLen ]).
|
||||
memId - Memory partition ID (default value = [DEFAULT_outputRingMemId]).
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
|
||||
@Cautions len must be between [MIN_VAL_outputRingLen] and [MAX_VAL_outputRingLen].
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_ConfigOutputRing(t_Handle h_SecJq,
|
||||
t_SecJqRingParam* p_RingParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Interrupt Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecJqIntrParam
|
||||
{
|
||||
uint32_t jobCountThr; /**< Job-count threshold */
|
||||
uint32_t ticCountThr; /**< Tic-count threshold */
|
||||
}
|
||||
t_SecJqIntrParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Interrupt Definitions
|
||||
*//***************************************************************************/
|
||||
#define SEC_JQ_INTR_TIC_COUNT_THR_UNITS 64 /**< Interrupt tic-count threshold units */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_ConfigInterrupts
|
||||
|
||||
@Description Configures a SEC JQ interrupts.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
@Param[in] p_IntrParam - Interrupt configuration parameters:
|
||||
jobCountThr - Job-count threshold (default value = [DEFAULT_intrJobCountThr]).
|
||||
ticCountThr - Tic-count threshold (default value = [DEFAULT_intrTicCountThr]).
|
||||
|
||||
@Notes The job-count measures the number of jobs completed since the previous interrupt.
|
||||
The tic-count measures the number of tics elapsed after the completion of the first job.
|
||||
Therefore, if the job-count threshold is set to 1, then the tic-count threshold has no effect.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
|
||||
@Cautions ticCountThr must be a multiple of SEC_JQ_INTR_TIC_COUNT_THR_UNITS.
|
||||
jobCountThr must be between [MIN_VAL_intrJobCountThr] and [MAX_VAL_intrJobCountThr].
|
||||
ticCountThr must be between [MIN_VAL_intrTicCountThr] and [MAX_VAL_intrTicCountThr].
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_ConfigInterrupts(t_Handle h_SecJq,
|
||||
t_SecJqIntrParam* p_IntrParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Byte Swap Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecJqByteSwapParam
|
||||
{
|
||||
e_SecByteSwap icd; /* Input control data */
|
||||
e_SecByteSwap ocd; /* Output control data */
|
||||
e_SecByteSwap imd; /* Input message data */
|
||||
e_SecByteSwap omd; /* Output message data */
|
||||
}
|
||||
t_SecJqByteSwapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_ConfigByteSwap
|
||||
|
||||
@Description Configures a SEC JQ Byte-Swap mode.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
@Param[in] p_ByteSwapParam - Byte swap configuration parameters:
|
||||
icd - Input control data (default value = [DEFAULT_icdByteSwap]).
|
||||
ocd - Output control data (default value = [DEFAULT_ocdByteSwap]).
|
||||
imd - Input message data (default value = [DEFAULT_imdByteSwap]).
|
||||
omd - Output message data (default value = [DEFAULT_omdByteSwap]).
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_ConfigByteSwap(t_Handle h_SecJq,
|
||||
t_SecJqByteSwapParam* p_ByteSwapParam);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_jq_mdl_advance_config_grp */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_jq_mdl_initialization_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_jq_mdl_runtime_control_grp Runtime Control Unit
|
||||
|
||||
@Description Runtime control routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_Enqueue
|
||||
|
||||
@Description Enqueues one job onto a SEC JQ.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
@Param[in] p_JobDesc - Job descriptor address.
|
||||
@Param[in] h_Context - Job descriptor context.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_Enqueue(t_Handle h_SecJq,
|
||||
void* p_JobDesc,
|
||||
t_Handle h_Context);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_Dequeue
|
||||
|
||||
@Description Dequeues all jobs from a SEC JQ.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_JQ_Dequeue(t_Handle h_SecJq);
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_JQ_DumpRegisters
|
||||
|
||||
@Description Dumps the contents of a SEC JQ registers.
|
||||
|
||||
@Param[in] h_SecJq - SEC JQ object.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void SEC_JQ_DumpRegisters(t_Handle h_SecJq);
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_jq_mdl_runtime_control_grp */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_jq_mdl_grp */
|
||||
|
||||
|
||||
#endif /* __SEC_JQ_EXT_H */
|
||||
@@ -0,0 +1,427 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**
|
||||
|
||||
@File sec_qi_ext.h
|
||||
|
||||
@Description SEC QI external structures and definitions.
|
||||
*//***************************************************************************/
|
||||
#ifndef __SEC_QI_EXT_H
|
||||
#define __SEC_QI_EXT_H
|
||||
|
||||
|
||||
#include "sec_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_qi_mdl_grp SEC QI Module
|
||||
|
||||
@Description Functions, definitions and enumerators
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_qi_mdl_initialization_grp Initialization Unit
|
||||
|
||||
@Description Initialization routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecQiParam
|
||||
{
|
||||
t_Handle h_Sec ; /**< SEC object */
|
||||
uint64_t baseAddr ; /**< Base address */
|
||||
uint16_t seqLiodnBase ; /**< Sequential LIODN base */
|
||||
uint16_t nonSeqLiodnBase; /**< Non-sequential LIODN base */
|
||||
uint16_t nonSeqLiodnMask; /**< Non-sequential LIODN offset mask */
|
||||
}
|
||||
t_SecQiParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_Config
|
||||
|
||||
@Description Allocates the SEC QI object.
|
||||
|
||||
@Param[in] p_Param - Configuration parameters:
|
||||
h_Sec - SEC object.
|
||||
baseAddr - Base address.
|
||||
seqLiodnBase - Sequential LIODN base.
|
||||
nonSeqLiodnBase - Non-sequential LIODN base.
|
||||
nonSeqLiodnMask - Non-sequential LIODN offset mask.
|
||||
|
||||
@Return Handle to the SEC QI object on success; NULL otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_QI_Config(t_SecQiParam* p_Param);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_Init
|
||||
|
||||
@Description Initializes the SEC QI registers.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_Init(t_Handle h_SecQi);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_Free
|
||||
|
||||
@Description Deallocates the SEC QI object.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_Free(t_Handle h_SecQi);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_qi_mdl_advance_config_grp Advanced Configuration Unit
|
||||
|
||||
@Description Advanced configuration routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_ConfigStopOnError
|
||||
|
||||
@Description Configures the SEC QI whether or not to stop on error.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
@Param[in] stopOnError - Stop on error (default value = [DEFAULT_stopOnError]).
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_ConfigStopOnError(t_Handle h_SecQi,
|
||||
bool stopOnError);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Frame Color Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SecQiFrameColor
|
||||
{
|
||||
e_SEC_QI_FRAME_COLOR_GREEN , /**< Green */
|
||||
e_SEC_QI_FRAME_COLOR_YELLOW , /**< Yellow */
|
||||
e_SEC_QI_FRAME_COLOR_RED , /**< Red */
|
||||
e_SEC_QI_FRAME_COLOR_OVERRIDE /**< Override */
|
||||
}
|
||||
e_SecQiFrameColor;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Frame Count Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SecQiFrameCount
|
||||
{
|
||||
e_SEC_QI_FRAME_COUNT_MAXIMUM_1, /**< At most one frame */
|
||||
e_SEC_QI_FRAME_COUNT_MAXIMUM_3 /**< Up to three frames */
|
||||
}
|
||||
e_SecQiFrameCount;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Scheduling Options
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SecQiScheduling
|
||||
{
|
||||
e_SEC_QI_SCHEDULING_NONE , /**< No dequeue operations executed */
|
||||
e_SEC_QI_SCHEDULING_PRI_WITH_IC , /**< Priority precedence with intra-class scheduling */
|
||||
e_SEC_QI_SCHEDULING_AFQ_WITH_IC , /**< Active FQ precedence with intra-class scheduling */
|
||||
e_SEC_QI_SCHEDULING_AFQ_WITHOUT_IC /**< Active FQ precedence without intra-class scheduling */
|
||||
}
|
||||
e_SecQiScheduling;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Command Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecQiCmdParam
|
||||
{
|
||||
e_SecQiFrameColor enqFrameColor ;
|
||||
e_SecQiFrameCount deqFrameCount ;
|
||||
e_SecQiScheduling deqScheduling ;
|
||||
uint32_t deqByteCountThr;
|
||||
uint32_t deqSpfCountThr ;
|
||||
}
|
||||
t_SecQiCmdParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_ConfigCommands
|
||||
|
||||
@Description Configures the SEC QI commands.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
@Param[in] p_CmdParam - Command configuration parameters:
|
||||
enqFrameColor - Enqueue frame color (default value = [DEFAULT_enqFrameColor ]).
|
||||
deqFrameCount - Dequeue frame count (default value = [DEFAULT_deqFrameCount ]).
|
||||
deqScheduling - Dequeue scheduling (default value = [DEFAULT_deqScheduling ]).
|
||||
deqByteCountThr - Dequeue byte-count threshold (default value = [DEFAULT_deqByteCountThr]).
|
||||
deqSpfCountThr - Dequeue subportal-frame-count threshold (default value = [DEFAULT_deqSpfCountThr ]).
|
||||
|
||||
@Notes A dequeue byte-count threshold of 65535 is equivalent to an infinite threshold.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
|
||||
@Cautions deqByteCountThr must be between [MIN_VAL_deqByteCountThr] and [MAX_VAL_deqByteCountThr].
|
||||
deqSpfCountThr must be between [MIN_VAL_deqSpfCountThr ] and [MAX_VAL_deqSpfCountThr ].
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_ConfigCommands(t_Handle h_SecQi,
|
||||
t_SecQiCmdParam* p_CmdParam);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Byte Swap Configuration Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecQiByteSwapParam
|
||||
{
|
||||
e_SecByteSwap icd; /* Input control data */
|
||||
e_SecByteSwap ocd; /* Output control data */
|
||||
e_SecByteSwap imd; /* Input message data */
|
||||
e_SecByteSwap omd; /* Output message data */
|
||||
}
|
||||
t_SecQiByteSwapParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_ConfigByteSwap
|
||||
|
||||
@Description Configures the SEC QI Byte-Swap mode.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
@Param[in] p_ByteSwapParam - Byte swap configuration parameters:
|
||||
icd - Input control data (default value = [DEFAULT_icdByteSwap]).
|
||||
ocd - Output control data (default value = [DEFAULT_ocdByteSwap]).
|
||||
imd - Input message data (default value = [DEFAULT_imdByteSwap]).
|
||||
omd - Output message data (default value = [DEFAULT_omdByteSwap]).
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_ConfigByteSwap(t_Handle h_SecQi,
|
||||
t_SecQiByteSwapParam* p_ByteSwapParam);
|
||||
|
||||
|
||||
/** @} */ /* end of sec_qi_mdl_advance_config_grp */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_qi_mdl_initialization_grp */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sec_qi_mdl_runtime_control_grp Runtime Control Unit
|
||||
|
||||
@Description Runtime control routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_Enable
|
||||
|
||||
@Description Enables the SEC QI.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_Enable(t_Handle h_SecQi);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_Disable
|
||||
|
||||
@Description Disables the SEC QI.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_Disable(t_Handle h_SecQi);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Error Flags
|
||||
*//***************************************************************************/
|
||||
#define SEC_QI_OFTL_ERROR 0x40 /**< Output frame too large error */
|
||||
#define SEC_QI_CFWR_ERROR 0x20 /**< Compound frame write error */
|
||||
#define SEC_QI_BTS_ERROR 0x10 /**< Buffer too small error */
|
||||
#define SEC_QI_BPD_ERROR 0x08 /**< Buffer pool depletion error */
|
||||
#define SEC_QI_OFWR_ERROR 0x04 /**< Output frame write error */
|
||||
#define SEC_QI_CFRD_ERROR 0x02 /**< Compound frame read error */
|
||||
#define SEC_QI_PHRD_ERROR 0x01 /**< PreHeader read error */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_RetrieveErrors
|
||||
|
||||
@Description Retrieves the SEC QI errors.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
@Param[out] p_ErrorFlags - Error flags.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_RetrieveErrors(t_Handle h_SecQi,
|
||||
uint8_t* p_ErrorFlags);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Job Status Registers
|
||||
*//***************************************************************************/
|
||||
typedef struct t_SecQiJobStatus
|
||||
{
|
||||
uint16_t done ; /**< Flags indicating which jobs are done */
|
||||
uint16_t exec ; /**< Flags indicating which jobs are executing */
|
||||
uint16_t inUse; /**< Flags indicating which job-data-buffers are in use */
|
||||
}
|
||||
t_SecQiJobStatus;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_RetrieveJobStatus
|
||||
|
||||
@Description Retrieves the SEC QI job-status.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
@Param[out] p_JobStatus - Job status registers:
|
||||
done - Flags indicating which jobs are done.
|
||||
exec - Flags indicating which jobs are executing.
|
||||
inUse - Flags indicating which job-data-buffers are in use.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error SEC_QI_RetrieveJobStatus(t_Handle h_SecQi,
|
||||
t_SecQiJobStatus* p_JobStatus);
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_QI_DumpRegisters
|
||||
|
||||
@Description Dumps the contents of the SEC QI registers.
|
||||
|
||||
@Param[in] h_SecQi - SEC QI object.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void SEC_QI_DumpRegisters(t_Handle h_SecQi);
|
||||
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_qi_mdl_runtime_control_grp */
|
||||
|
||||
|
||||
#if defined(__MWERKS__) && !defined(__GNUC__)
|
||||
#pragma pack(push,1)
|
||||
#endif /* defined(__MWERKS__) && !defined(__GNUC__) */
|
||||
#define MEM_MAP_START
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Pre-Header Type
|
||||
*//***************************************************************************/
|
||||
typedef _Packed struct t_SecPreHeader
|
||||
{
|
||||
volatile uint32_t first ;
|
||||
volatile uint32_t second;
|
||||
}
|
||||
_PackedType t_SecPreHeader;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Context A
|
||||
*//***************************************************************************/
|
||||
typedef _Packed struct t_SecContextA
|
||||
{
|
||||
volatile uint32_t addr_hi;
|
||||
volatile uint32_t addr_lo;
|
||||
}
|
||||
_PackedType t_SecContextA;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Context-B Type
|
||||
*//***************************************************************************/
|
||||
typedef uint32_t t_SecContextB;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Collection Pre-Header Macros
|
||||
*//***************************************************************************/
|
||||
#define SEC_PH_RSLS_MASK 0x80000000
|
||||
#define SEC_PH_SDLEN_MASK 0x0000007F
|
||||
#define SEC_PH_FSGT_MASK 0x20000000
|
||||
#define SEC_PH_LONG_MASK 0x10000000
|
||||
#define SEC_PH_OFFSET_MASK 0x0C000000
|
||||
#define SEC_PH_ABS_MASK 0x02000000
|
||||
#define SEC_PH_ADDBUF_MASK 0x01000000
|
||||
#define SEC_PH_POOLID_MASK 0x00FF0000
|
||||
#define SEC_PH_BUFSIZE_MASK 0x0000FFFF
|
||||
#define SEC_PH_GET_RSLS(preHeader) ((((t_SecPreHeader*)preHeader)->first & SEC_PH_RSLS_MASK ) >> (31- 0))
|
||||
#define SEC_PH_GET_SDLEN(preHeader) ((((t_SecPreHeader*)preHeader)->first & SEC_PH_SDLEN_MASK ) >> (31-31))
|
||||
#define SEC_PH_GET_FSGT(preHeader) ((((t_SecPreHeader*)preHeader)->second & SEC_PH_FSGT_MASK ) >> (31- 2))
|
||||
#define SEC_PH_GET_LONG(preHeader) ((((t_SecPreHeader*)preHeader)->second & SEC_PH_LONG_MASK ) >> (31- 3))
|
||||
#define SEC_PH_GET_OFFSET(preHeader) ((((t_SecPreHeader*)preHeader)->second & SEC_PH_OFFSET_MASK ) >> (31- 5))
|
||||
#define SEC_PH_GET_ABS(preHeader) ((((t_SecPreHeader*)preHeader)->second & SEC_PH_ABS_MASK ) >> (31- 6))
|
||||
#define SEC_PH_GET_ADDBUF(preHeader) ((((t_SecPreHeader*)preHeader)->second & SEC_PH_ADDBUF_MASK ) >> (31- 7))
|
||||
#define SEC_PH_GET_POOLID(preHeader) ((((t_SecPreHeader*)preHeader)->second & SEC_PH_POOLID_MASK ) >> (31-15))
|
||||
#define SEC_PH_GET_BUFSIZE(preHeader) ((((t_SecPreHeader*)preHeader)->second & SEC_PH_BUFSIZE_MASK) >> (31-31))
|
||||
#define SEC_PH_SET_RSLS(preHeader,val) (((t_SecPreHeader* )preHeader)->first = ((((t_SecPreHeader*)preHeader)->first & ~SEC_PH_RSLS_MASK ) | ((val << (31- 0)) & SEC_PH_RSLS_MASK )))
|
||||
#define SEC_PH_SET_SDLEN(preHeader,val) (((t_SecPreHeader* )preHeader)->first = ((((t_SecPreHeader*)preHeader)->first & ~SEC_PH_SDLEN_MASK ) | ((val << (31-31)) & SEC_PH_SDLEN_MASK )))
|
||||
#define SEC_PH_SET_FSGT(preHeader,val) (((t_SecPreHeader* )preHeader)->second = ((((t_SecPreHeader*)preHeader)->second & ~SEC_PH_FSGT_MASK ) | ((val << (31- 2)) & SEC_PH_FSGT_MASK )))
|
||||
#define SEC_PH_SET_LONG(preHeader,val) (((t_SecPreHeader* )preHeader)->second = ((((t_SecPreHeader*)preHeader)->second & ~SEC_PH_LONG_MASK ) | ((val << (31- 3)) & SEC_PH_LONG_MASK )))
|
||||
#define SEC_PH_SET_OFFSET(preHeader,val) (((t_SecPreHeader* )preHeader)->second = ((((t_SecPreHeader*)preHeader)->second & ~SEC_PH_OFFSET_MASK ) | ((val << (31- 5)) & SEC_PH_OFFSET_MASK )))
|
||||
#define SEC_PH_SET_ABS(preHeader,val) (((t_SecPreHeader* )preHeader)->second = ((((t_SecPreHeader*)preHeader)->second & ~SEC_PH_ABS_MASK ) | ((val << (31- 6)) & SEC_PH_ABS_MASK )))
|
||||
#define SEC_PH_SET_ADDBUF(preHeader,val) (((t_SecPreHeader* )preHeader)->second = ((((t_SecPreHeader*)preHeader)->second & ~SEC_PH_ADDBUF_MASK ) | ((val << (31- 7)) & SEC_PH_ADDBUF_MASK )))
|
||||
#define SEC_PH_SET_POOLID(preHeader,val) (((t_SecPreHeader* )preHeader)->second = ((((t_SecPreHeader*)preHeader)->second & ~SEC_PH_POOLID_MASK ) | ((val << (31-15)) & SEC_PH_POOLID_MASK )))
|
||||
#define SEC_PH_SET_BUFSIZE(preHeader,val) (((t_SecPreHeader* )preHeader)->second = ((((t_SecPreHeader*)preHeader)->second & ~SEC_PH_BUFSIZE_MASK) | ((val << (31-31)) & SEC_PH_BUFSIZE_MASK)))
|
||||
/* @} */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Collection Context-B Macros
|
||||
*//***************************************************************************/
|
||||
#define SEC_CONTEXTB_FQID_MASK 0x00FFFFFF
|
||||
#define SEC_CONTEXTB_GET_FQID(contextB) (*((t_SecContextB*)contextB) & SEC_CONTEXTB_FQID_MASK)
|
||||
#define SEC_CONTEXTB_SET_FQID(contextB,val) (*((t_SecContextB*)contextB) = ((*((t_SecContextB *)contextB) & ~SEC_CONTEXTB_FQID_MASK) | (val & SEC_CONTEXTB_FQID_MASK)))
|
||||
/* @} */
|
||||
|
||||
|
||||
#define MEM_MAP_END
|
||||
#if defined(__MWERKS__) && !defined(__GNUC__)
|
||||
#pragma pack(pop)
|
||||
#endif /* defined(__MWERKS__) && !defined(__GNUC__) */
|
||||
|
||||
|
||||
/** @} */ /* end of sec_qi_mdl_grp */
|
||||
|
||||
|
||||
#endif /* __SEC_QI_EXT_H */
|
||||
@@ -0,0 +1,58 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File core_ext.h
|
||||
|
||||
@Description Generic interface to basic core operations.
|
||||
|
||||
The system integrator must ensure that this interface is
|
||||
mapped to a specific core implementation, by including the
|
||||
appropriate header file.
|
||||
*//***************************************************************************/
|
||||
#ifndef __CORE_EXT_H
|
||||
#define __CORE_EXT_H
|
||||
|
||||
|
||||
#ifdef NCSW_PPC_CORE
|
||||
#include "ppc_ext.h"
|
||||
#else
|
||||
#error "Core is not defined!"
|
||||
#endif /* NCSW_CORE */
|
||||
|
||||
#if (!defined(CORE_IS_LITTLE_ENDIAN) && !defined(CORE_IS_BIG_ENDIAN))
|
||||
#error "Must define core as little-endian or big-endian!"
|
||||
#endif /* (!defined(CORE_IS_LITTLE_ENDIAN) && ... */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_GetId
|
||||
|
||||
@Description Returns the core ID in the system.
|
||||
|
||||
@Return Core ID.
|
||||
*//***************************************************************************/
|
||||
uint32_t CORE_GetId(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_MemoryBarrier
|
||||
|
||||
@Description This routine will cause the core to stop executing any commands
|
||||
until all previous memory read/write commands are completely out
|
||||
of the core's pipeline.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void CORE_MemoryBarrier(void);
|
||||
|
||||
|
||||
#endif /* __CORE_EXT_H */
|
||||
|
||||
@@ -0,0 +1,379 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File e500v2_ext.h
|
||||
|
||||
@Description E500 external definitions prototypes
|
||||
This file is not included by the E500
|
||||
source file as it is an assembly file. It is used
|
||||
only for prototypes exposure, for inclusion
|
||||
by user and other modules.
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __E500V2_EXT_H
|
||||
#define __E500V2_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
|
||||
|
||||
/* Layer 1 Cache Manipulations
|
||||
*==============================
|
||||
* Should not be called directly by the user.
|
||||
*/
|
||||
void L1DCache_Invalidate (void);
|
||||
void L1ICache_Invalidate(void);
|
||||
void L1DCache_Enable(void);
|
||||
void L1ICache_Enable(void);
|
||||
void L1DCache_Disable(void);
|
||||
void L1ICache_Disable(void);
|
||||
void L1DCache_Flush(void);
|
||||
void L1ICache_Flush(void);
|
||||
/*
|
||||
*
|
||||
*/
|
||||
uint32_t L1DCache_LineLock(uint32_t addr);
|
||||
uint32_t L1ICache_LineLock(uint32_t addr);
|
||||
void L1Cache_BroadCastEnable(void);
|
||||
void L1Cache_BroadCastDisable(void);
|
||||
|
||||
|
||||
#define CORE_DCacheEnable E500_DCacheEnable
|
||||
#define CORE_ICacheEnable E500_ICacheEnable
|
||||
#define CORE_DCacheDisable E500_DCacheDisable
|
||||
#define CORE_ICacheDisable E500_ICacheDisable
|
||||
#define CORE_GetId E500_GetId
|
||||
#define CORE_TestAndSet E500_TestAndSet
|
||||
#define CORE_MemoryBarrier E500_MemoryBarrier
|
||||
#define CORE_InstructionSync E500_InstructionSync
|
||||
|
||||
#define CORE_SetDozeMode E500_SetDozeMode
|
||||
#define CORE_SetNapMode E500_SetNapMode
|
||||
#define CORE_SetSleepMode E500_SetSleepMode
|
||||
#define CORE_SetJogMode E500_SetJogMode
|
||||
#define CORE_SetDeepSleepMode E500_SetDeepSleepMode
|
||||
|
||||
#define CORE_RecoverDozeMode E500_RecoverDozeMode
|
||||
#define CORE_RecoverNapMode E500_RecoverNapMode
|
||||
#define CORE_RecoverSleepMode E500_RecoverSleepMode
|
||||
#define CORE_RecoverJogMode E500_RecoverJogMode
|
||||
|
||||
void E500_SetDozeMode(void);
|
||||
void E500_SetNapMode(void);
|
||||
void E500_SetSleepMode(void);
|
||||
void E500_SetJogMode(void);
|
||||
t_Error E500_SetDeepSleepMode(uint32_t bptrAddress);
|
||||
|
||||
void E500_RecoverDozeMode(void);
|
||||
void E500_RecoverNapMode(void);
|
||||
void E500_RecoverSleepMode(void);
|
||||
void E500_RecoverJogMode(void);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group E500_id E500 Application Programming Interface
|
||||
|
||||
@Description E500 API functions, definitions and enums
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group E500_init_grp E500 Initialization Unit
|
||||
|
||||
@Description E500 initialization unit API functions, definitions and enums
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_DCacheEnable
|
||||
|
||||
@Description Enables the data cache for memory pages that are
|
||||
not cache inhibited.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_DCacheEnable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_ICacheEnable
|
||||
|
||||
@Description Enables the instruction cache for memory pages that are
|
||||
not cache inhibited.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_ICacheEnable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_DCacheDisable
|
||||
|
||||
@Description Disables the data cache.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_DCacheDisable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_ICacheDisable
|
||||
|
||||
@Description Disables the instruction cache.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_ICacheDisable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_DCacheFlush
|
||||
|
||||
@Description Flushes the data cache
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_DCacheFlush(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_ICacheFlush
|
||||
|
||||
@Description Flushes the instruction cache.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_ICacheFlush(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_DCacheSetStashId
|
||||
|
||||
@Description Set Stash Id for data cache
|
||||
|
||||
@Param[in] stashId the stash id to be set.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_DCacheSetStashId(uint8_t stashId);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description E500mc L2 Cache Operation Mode
|
||||
*//***************************************************************************/
|
||||
typedef enum e_E500mcL2CacheMode
|
||||
{
|
||||
e_L2_CACHE_MODE_DATA_ONLY = 0x00000001, /**< Cache data only */
|
||||
e_L2_CACHE_MODE_INST_ONLY = 0x00000002, /**< Cache instructions only */
|
||||
e_L2_CACHE_MODE_DATA_AND_INST = 0x00000003 /**< Cache data and instructions */
|
||||
} e_E500mcL2CacheMode;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_L2CacheEnable
|
||||
|
||||
@Description Enables the cache for memory pages that are not cache inhibited.
|
||||
|
||||
@param[in] mode - L2 cache mode: data only, instruction only or instruction and data.
|
||||
|
||||
@Return None.
|
||||
|
||||
@Cautions This routine must be call only ONCE for both caches. I.e. it is
|
||||
not possible to call this routine for i-cache and than to call
|
||||
again for d-cache; The second call will override the first one.
|
||||
*//***************************************************************************/
|
||||
void E500_L2CacheEnable(e_E500mcL2CacheMode mode);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_L2CacheDisable
|
||||
|
||||
@Description Disables the cache (data instruction or both).
|
||||
|
||||
@Return None.
|
||||
|
||||
*//***************************************************************************/
|
||||
void E500_L2CacheDisable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_L2CacheFlush
|
||||
|
||||
@Description Flushes the cache.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_L2CacheFlush(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_L2SetStashId
|
||||
|
||||
@Description Set Stash Id
|
||||
|
||||
@Param[in] stashId the stash id to be set.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_L2SetStashId(uint8_t stashId);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_AddressBusStreamingEnable
|
||||
|
||||
@Description Enables address bus streaming on the CCB.
|
||||
|
||||
This setting, along with the ECM streaming configuration
|
||||
parameters, enables address bus streaming on the CCB.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_AddressBusStreamingEnable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_AddressBusStreamingDisable
|
||||
|
||||
@Description Disables address bus streaming on the CCB.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_AddressBusStreamingDisable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_AddressBroadcastEnable
|
||||
|
||||
@Description Enables address broadcast.
|
||||
|
||||
The e500 broadcasts cache management instructions (dcbst, dcblc
|
||||
(CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi)
|
||||
based on ABE. ABE must be set to allow management of external
|
||||
L2 caches.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_AddressBroadcastEnable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_AddressBroadcastDisable
|
||||
|
||||
@Description Disables address broadcast.
|
||||
|
||||
The e500 broadcasts cache management instructions (dcbst, dcblc
|
||||
(CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi)
|
||||
based on ABE. ABE must be set to allow management of external
|
||||
L2 caches.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void E500_AddressBroadcastDisable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_IsTaskletSupported
|
||||
|
||||
@Description Checks if tasklets are supported by the e500 interrupt handler.
|
||||
|
||||
@Retval TRUE - Tasklets are supported.
|
||||
@Retval FALSE - Tasklets are not supported.
|
||||
*//***************************************************************************/
|
||||
bool E500_IsTaskletSupported(void);
|
||||
|
||||
void E500_EnableTimeBase(void);
|
||||
void E500_DisableTimeBase(void);
|
||||
|
||||
uint64_t E500_GetTimeBaseTime(void);
|
||||
|
||||
void E500_GenericIntrInit(void);
|
||||
|
||||
t_Error E500_SetIntr(int ppcIntrSrc,
|
||||
void (* Isr)(t_Handle handle),
|
||||
t_Handle handle);
|
||||
|
||||
t_Error E500_ClearIntr(int ppcIntrSrc);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_GenericIntrHandler
|
||||
|
||||
@Description This is the general e500 interrupt handler.
|
||||
|
||||
It is called by the main assembly interrupt handler
|
||||
when an exception occures and no other function has been
|
||||
assigned to this exception.
|
||||
|
||||
@Param intrEntry - (In) The exception interrupt vector entry.
|
||||
*//***************************************************************************/
|
||||
void E500_GenericIntrHandler(uint32_t intrEntry);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CriticalIntr
|
||||
|
||||
@Description This is the specific critical e500 interrupt handler.
|
||||
|
||||
It is called by the main assembly interrupt handler
|
||||
when an critical interrupt.
|
||||
|
||||
@Param intrEntry - (In) The exception interrupt vector entry.
|
||||
*//***************************************************************************/
|
||||
void CriticalIntr(uint32_t intrEntry);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_GetId
|
||||
|
||||
@Description Returns the core ID in the system.
|
||||
|
||||
@Return Core ID.
|
||||
*//***************************************************************************/
|
||||
uint32_t E500_GetId(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_TestAndSet
|
||||
|
||||
@Description This routine tries to atomically test-and-set an integer
|
||||
in memory to a non-zero value.
|
||||
|
||||
The memory will be set only if it is tested as zero, in which
|
||||
case the routine retunrs the new non-zero value; otherwise the
|
||||
routine returns zero.
|
||||
|
||||
@Param[in] p - pointer to a volatile int in memory, on which test-and-set
|
||||
operation should be made.
|
||||
|
||||
@Retval Zero - Operation failed - memory was already set.
|
||||
@Retval Non-zero - Operation succeeded - memory has been set.
|
||||
*//***************************************************************************/
|
||||
int E500_TestAndSet(volatile int *p);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_MemoryBarrier
|
||||
|
||||
@Description This routine will cause the core to stop executing any commands
|
||||
until all previous memory read/write commands are completely out
|
||||
of the core's pipeline.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void E500_MemoryBarrier(void)
|
||||
{
|
||||
__asm__ ("mbar 1");
|
||||
}
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function E500_InstructionSync
|
||||
|
||||
@Description This routine will cause the core to wait for previous instructions
|
||||
(including any interrupts they generate) to complete before the
|
||||
synchronization command executes, which purges all instructions
|
||||
from the processor's pipeline and refetches the next instruction.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void E500_InstructionSync(void)
|
||||
{
|
||||
__asm__ ("isync");
|
||||
}
|
||||
|
||||
|
||||
/** @} */ /* end of E500_init_grp group */
|
||||
/** @} */ /* end of E500_grp group */
|
||||
|
||||
|
||||
#endif /* __E500V2_EXT_H */
|
||||
@@ -0,0 +1,109 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File ppc_ext.h
|
||||
|
||||
@Description Core API for PowerPC cores
|
||||
|
||||
These routines must be implemented by each specific PowerPC
|
||||
core driver.
|
||||
*//***************************************************************************/
|
||||
#ifndef __PPC_EXT_H
|
||||
#define __PPC_EXT_H
|
||||
|
||||
#include "part_ext.h"
|
||||
|
||||
|
||||
#define CORE_IS_BIG_ENDIAN
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_TestAndSet
|
||||
|
||||
@Description This routine tries to atomically test-and-set an integer
|
||||
in memory to a non-zero value.
|
||||
|
||||
The memory will be set only if it is tested as zero, in which
|
||||
case the routine retunrs the new non-zero value; otherwise the
|
||||
routine returns zero.
|
||||
|
||||
@Param[in] p - pointer to a volatile int in memory, on which test-and-set
|
||||
operation should be made.
|
||||
|
||||
@Retval Zero - Operation failed - memory was already set.
|
||||
@Retval Non-zero - Operation succeeded - memory has been set.
|
||||
*//***************************************************************************/
|
||||
int CORE_TestAndSet(volatile int *p);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_InstructionSync
|
||||
|
||||
@Description This routine will cause the core to wait for previous instructions
|
||||
(including any interrupts they generate) to complete before the
|
||||
synchronization command executes, which purges all instructions
|
||||
from the processor's pipeline and refetches the next instruction.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void CORE_InstructionSync(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_DCacheEnable
|
||||
|
||||
@Description Enables the data cache for memory pages that are
|
||||
not cache inhibited.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void CORE_DCacheEnable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_ICacheEnable
|
||||
|
||||
@Description Enables the instruction cache for memory pages that are
|
||||
not cache inhibited.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void CORE_ICacheEnable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_DCacheDisable
|
||||
|
||||
@Description Disables the data cache.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void CORE_DCacheDisable(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function CORE_ICacheDisable
|
||||
|
||||
@Description Disables the instruction cache.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void CORE_ICacheDisable(void);
|
||||
|
||||
|
||||
|
||||
|
||||
#if defined(CORE_E300)
|
||||
#include "e300_ext.h"
|
||||
#elif defined(CORE_E500V2) || defined(CORE_E500MC)
|
||||
#include "e500v2_ext.h"
|
||||
#else
|
||||
#error "Core not defined!"
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __PPC_EXT_H */
|
||||
@@ -0,0 +1,245 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File debug_ext.h
|
||||
|
||||
@Description Debug mode definitions.
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __DEBUG_EXT_H
|
||||
#define __DEBUG_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "xx_ext.h"
|
||||
#include "memcpy_ext.h"
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
#include "sprint_ext.h"
|
||||
#include "string_ext.h"
|
||||
#endif /* DEBUG_ERRORS > 0 */
|
||||
|
||||
|
||||
#if (DEBUG_ERRORS > 0)
|
||||
|
||||
/* Internally used macros */
|
||||
|
||||
#define DUMP_Print XX_Print
|
||||
#define DUMP_MAX_LEVELS 6
|
||||
#define DUMP_MAX_STR 64
|
||||
|
||||
|
||||
#define _CREATE_DUMP_SUBSTR(phrase) \
|
||||
dumpTmpLevel = 0; dumpSubStr[0] = '\0'; \
|
||||
sprintf(dumpTmpStr, "%s", #phrase); \
|
||||
p_DumpToken = strtok(dumpTmpStr, (dumpIsArr[0] ? "[" : ".")); \
|
||||
while (p_DumpToken != NULL) \
|
||||
{ \
|
||||
strcat(dumpSubStr, p_DumpToken); \
|
||||
if (dumpIsArr[dumpTmpLevel]) \
|
||||
{ \
|
||||
strcat(dumpSubStr, dumpIdxStr[dumpTmpLevel]); \
|
||||
p_DumpToken = strtok(NULL, "."); \
|
||||
} \
|
||||
if ((p_DumpToken = strtok(NULL, (dumpIsArr[++dumpTmpLevel] ? "[" : "."))) != 0) \
|
||||
strcat(dumpSubStr, "."); \
|
||||
}\
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group gen_id General Drivers Utilities
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group dump_id Memory and Registers Dump Mechanism
|
||||
|
||||
@Description Macros for dumping memory mapped structures.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Declaration of dump mechanism variables.
|
||||
|
||||
This macro must be declared at the beginning of each routine
|
||||
which uses the dump mechanism macros, before the routine's code
|
||||
starts.
|
||||
*//***************************************************************************/
|
||||
#define DECLARE_DUMP \
|
||||
char dumpIdxStr[DUMP_MAX_LEVELS + 1][6] = { "", }; \
|
||||
char dumpSubStr[DUMP_MAX_STR] = ""; \
|
||||
char dumpTmpStr[DUMP_MAX_STR] = ""; \
|
||||
char *p_DumpToken = NULL; \
|
||||
int dumpArrIdx = 0, dumpArrSize = 0, dumpVarSize = 0, dumpLevel = 0, dumpTmpLevel = 0; \
|
||||
uint8_t dumpIsArr[DUMP_MAX_LEVELS + 1] = { 0 }; \
|
||||
/* Prevent warnings if not all used */ \
|
||||
UNUSED(dumpIdxStr[0][0]); \
|
||||
UNUSED(dumpSubStr[0]); \
|
||||
UNUSED(dumpTmpStr[0]); \
|
||||
UNUSED(p_DumpToken); \
|
||||
UNUSED(dumpArrIdx); \
|
||||
UNUSED(dumpArrSize); \
|
||||
UNUSED(dumpVarSize); \
|
||||
UNUSED(dumpLevel); \
|
||||
UNUSED(dumpTmpLevel); \
|
||||
UNUSED(dumpIsArr[0]);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Prints a title for a subsequent dumped structure or memory.
|
||||
|
||||
The inputs for this macro are the structure/memory title and
|
||||
its base addresss.
|
||||
*//***************************************************************************/
|
||||
#define DUMP_TITLE(addr, msg) \
|
||||
DUMP_Print("\r\n"); DUMP_Print msg; \
|
||||
DUMP_Print(" (0x%08X)\r\n" \
|
||||
"---------------------------------------------------------\r\n", \
|
||||
(uint32_t)addr)
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Prints a subtitle for a subsequent dumped sub-structure (optional).
|
||||
|
||||
The inputs for this macro are the sub-structure subtitle.
|
||||
A separating line with this subtitle will be printed.
|
||||
*//***************************************************************************/
|
||||
#define DUMP_SUBTITLE(subtitle) \
|
||||
DUMP_Print("----------- "); DUMP_Print subtitle; DUMP_Print("\r\n")
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Dumps a memory region in 4-bytes aligned format.
|
||||
|
||||
The inputs for this macro are the base addresss and size
|
||||
(in bytes) of the memory region.
|
||||
*//***************************************************************************/
|
||||
#define DUMP_MEMORY(addr, size) \
|
||||
MemDisp((uint8_t *)(addr), (int)(size))
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Declares a dump loop, for dumping a sub-structure array.
|
||||
|
||||
The inputs for this macro are:
|
||||
- idx: an index variable, for indexing the sub-structure items
|
||||
inside the loop. This variable must be declared separately
|
||||
in the beginning of the routine.
|
||||
- cnt: the number of times to repeat the loop. This number should
|
||||
equal the number of items in the sub-structures array.
|
||||
|
||||
Note, that the body of the loop must be written inside brackets.
|
||||
*//***************************************************************************/
|
||||
#define DUMP_SUBSTRUCT_ARRAY(idx, cnt) \
|
||||
for (idx=0, dumpIsArr[dumpLevel++] = 1; \
|
||||
(idx < cnt) && sprintf(dumpIdxStr[dumpLevel-1], "[%d]", idx); \
|
||||
idx++, ((idx < cnt) || ((dumpIsArr[--dumpLevel] = 0) == 0)))
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Dumps a structure's member variable.
|
||||
|
||||
The input for this macro is the full reference for the member
|
||||
variable, where the structure is referenced using a pointer.
|
||||
|
||||
Note, that a members array must be dumped using DUMP_ARR macro,
|
||||
rather than using this macro.
|
||||
|
||||
If the member variable is part of a sub-structure hierarchy,
|
||||
the full hierarchy (including array indexing) must be specified.
|
||||
|
||||
Examples: p_Struct->member
|
||||
p_Struct->sub.member
|
||||
p_Struct->sub[i].member
|
||||
*//***************************************************************************/
|
||||
#define DUMP_VAR(st, phrase) \
|
||||
do { \
|
||||
void *addr = (void *)&((st)->phrase); \
|
||||
_CREATE_DUMP_SUBSTR(phrase); \
|
||||
dumpVarSize = sizeof((st)->phrase); \
|
||||
switch (dumpVarSize) \
|
||||
{ \
|
||||
case 1: DUMP_Print("0x%08X: 0x%02x%14s\t%s\r\n", \
|
||||
addr, GET_UINT8((st)->phrase), "", dumpSubStr); break; \
|
||||
case 2: DUMP_Print("0x%08X: 0x%04x%12s\t%s\r\n", \
|
||||
addr, GET_UINT16((st)->phrase), "", dumpSubStr); break; \
|
||||
case 4: DUMP_Print("0x%08X: 0x%08x%8s\t%s\r\n", \
|
||||
addr, GET_UINT32((st)->phrase), "", dumpSubStr); break; \
|
||||
case 8: DUMP_Print("0x%08X: 0x%016llx\t%s\r\n", \
|
||||
addr, GET_UINT64((st)->phrase), dumpSubStr); break; \
|
||||
default: DUMP_Print("Bad size %d (" #st "->" #phrase ")\r\n", dumpVarSize); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Dumps a structure's members array.
|
||||
|
||||
The input for this macro is the full reference for the members
|
||||
array, where the structure is referenced using a pointer.
|
||||
|
||||
If the members array is part of a sub-structure hierarchy,
|
||||
the full hierarchy (including array indexing) must be specified.
|
||||
|
||||
Examples: p_Struct->array
|
||||
p_Struct->sub.array
|
||||
p_Struct->sub[i].array
|
||||
*//***************************************************************************/
|
||||
#define DUMP_ARR(st, phrase) \
|
||||
do { \
|
||||
_CREATE_DUMP_SUBSTR(phrase); \
|
||||
dumpArrSize = ARRAY_SIZE((st)->phrase); \
|
||||
dumpVarSize = sizeof((st)->phrase[0]); \
|
||||
switch (dumpVarSize) \
|
||||
{ \
|
||||
case 1: \
|
||||
for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \
|
||||
DUMP_Print("0x%08X: 0x%02x%14s\t%s[%d]\r\n", \
|
||||
&((st)->phrase[dumpArrIdx]), GET_UINT8((st)->phrase[dumpArrIdx]), "", dumpSubStr, dumpArrIdx); \
|
||||
} break; \
|
||||
case 2: \
|
||||
for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \
|
||||
DUMP_Print("0x%08X: 0x%04x%12s\t%s[%d]\r\n", \
|
||||
&((st)->phrase[dumpArrIdx]), GET_UINT16((st)->phrase[dumpArrIdx]), "", dumpSubStr, dumpArrIdx); \
|
||||
} break; \
|
||||
case 4: \
|
||||
for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \
|
||||
DUMP_Print("0x%08X: 0x%08x%8s\t%s[%d]\r\n", \
|
||||
&((st)->phrase[dumpArrIdx]), GET_UINT32((st)->phrase[dumpArrIdx]), "", dumpSubStr, dumpArrIdx); \
|
||||
} break; \
|
||||
case 8: \
|
||||
for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \
|
||||
DUMP_Print("0x%08X: 0x%016llx\t%s[%d]\r\n", \
|
||||
&((st)->phrase[dumpArrIdx]), GET_UINT64((st)->phrase[dumpArrIdx]), dumpSubStr, dumpArrIdx); \
|
||||
} break; \
|
||||
case 16: \
|
||||
for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \
|
||||
DUMP_Print("0x%08X: 0x%016llx %016llx\t%s[%d]\r\n", \
|
||||
&((st)->phrase[dumpArrIdx]), \
|
||||
GET_UINT64((st)->phrase[dumpArrIdx]), \
|
||||
GET_UINT64(*(&((st)->phrase[dumpArrIdx]) + sizeof(UINT64))), dumpSubStr, dumpArrIdx); \
|
||||
} break; \
|
||||
default: DUMP_Print("Bad size %d (" #st "->" #phrase "[0])\r\n", dumpVarSize); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
|
||||
#endif /* DEBUG_ERRORS > 0 */
|
||||
|
||||
|
||||
/** @} */ /* end of dump_id group */
|
||||
/** @} */ /* end of gen_id group */
|
||||
|
||||
|
||||
#endif /* __DEBUG_EXT_H */
|
||||
|
||||
@@ -0,0 +1,539 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**
|
||||
@File error_ext.h
|
||||
|
||||
@Description Error definitions.
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __ERROR_EXT_H
|
||||
#define __ERROR_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "xx_ext.h"
|
||||
#include "core_ext.h"
|
||||
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group gen_id General Drivers Utilities
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group gen_error_id Errors, Events and Debug
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
The scheme below provides the bits description for error codes:
|
||||
|
||||
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
|
||||
| Reserved (should be zero) | Module ID |
|
||||
|
||||
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
|
||||
| Error Type |
|
||||
******************************************************************************/
|
||||
|
||||
#define ERROR_CODE(_err) ((((uint32_t)_err) & 0x0000FFFF) | __ERR_MODULE__)
|
||||
|
||||
#define GET_ERROR_TYPE(_errcode) ((_errcode) & 0x0000FFFF)
|
||||
/**< Extract module code from error code (#t_Error) */
|
||||
|
||||
#define GET_ERROR_MODULE(_errcode) ((_errcode) & 0x00FF0000)
|
||||
/**< Extract error type (#e_ErrorType) from
|
||||
error code (#t_Error) */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Error Type Enumeration
|
||||
*//***************************************************************************/
|
||||
typedef enum e_ErrorType /* Comments / Associated Message Strings */
|
||||
{ /* ------------------------------------------------------------ */
|
||||
E_OK = 0 /* Never use "RETURN_ERROR" with E_OK; Use "return E_OK;" */
|
||||
|
||||
/* Invalid Function Calls */
|
||||
,E_INVALID_STATE /**< The operation is not allowed in current module state. */
|
||||
/* String: none. */
|
||||
,E_INVALID_OPERATION /**< The operation/command is invalid (unrecognized). */
|
||||
/* String: none. */
|
||||
,E_NOT_SUPPORTED /**< The function is not supported or not implemented. */
|
||||
/* String: none. */
|
||||
,E_NO_DEVICE /**< The associated device is not initialized. */
|
||||
/* String: none. */
|
||||
|
||||
/* Invalid Parameters */
|
||||
,E_INVALID_HANDLE /**< Invalid handle of module or object. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
handle (in this case add the handle description) */
|
||||
,E_INVALID_ID /**< Invalid module ID (usually enumeration or index). */
|
||||
/* String: none, unless the function takes in more than one
|
||||
ID (in this case add the ID description) */
|
||||
,E_NULL_POINTER /**< Unexpected NULL pointer. */
|
||||
/* String: pointer description. */
|
||||
,E_INVALID_VALUE /**< Invalid value. */
|
||||
/* Use for non-enumeration parameters, and
|
||||
only when other error types are not suitable.
|
||||
String: parameter description + "(should be <attribute>)",
|
||||
e.g: "Maximum Rx buffer length (should be divisible by 8)",
|
||||
"Channel number (should be even)". */
|
||||
,E_INVALID_SELECTION /**< Invalid selection or mode. */
|
||||
/* Use for enumeration values, only when other error types
|
||||
are not suitable.
|
||||
String: parameter description. */
|
||||
,E_INVALID_COMM_MODE /**< Invalid communication mode. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
communication mode indications (in this case add
|
||||
parameter description). */
|
||||
,E_INVALID_BYTE_ORDER /**< Invalid byte order. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
byte order indications (in this case add parameter
|
||||
description). */
|
||||
,E_INVALID_MEMORY_TYPE /**< Invalid memory type. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
memory types (in this case add memory description,
|
||||
e.g: "Data memory", "Buffer descriptors memory"). */
|
||||
,E_INVALID_INTR_QUEUE /**< Invalid interrupt queue. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
interrupt queues (in this case add queue description,
|
||||
e.g: "Rx interrupt queue", "Tx interrupt queue"). */
|
||||
,E_INVALID_PRIORITY /**< Invalid priority. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
priority (in this case add priority description). */
|
||||
,E_INVALID_CLOCK /**< Invalid clock. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
clocks (in this case add clock description,
|
||||
e.g: "Rx clock", "Tx clock"). */
|
||||
,E_INVALID_RATE /**< Invalid rate value. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
rate values (in this case add rate description). */
|
||||
,E_INVALID_ADDRESS /**< Invalid address. */
|
||||
/* String: description of the specific violation. */
|
||||
,E_INVALID_BUS /**< Invalid bus type. */
|
||||
/* String: none, unless the function takes in more than one
|
||||
bus parameters (in this case add bus description). */
|
||||
,E_BUS_CONFLICT /**< Bus (or memory) type conflicts with another setting. */
|
||||
/* String: description of the conflicting buses/memories. */
|
||||
,E_CONFLICT /**< Some setting conflicts with another setting. */
|
||||
/* String: description of the conflicting settings. */
|
||||
,E_NOT_ALIGNED /**< Non-aligned address. */
|
||||
/* String: parameter description + "(should be %d-bytes aligned)",
|
||||
e.g: "Rx data buffer (should be 32-bytes aligned)". */
|
||||
,E_NOT_IN_RANGE /**< Parameter value is out of range. */
|
||||
/* Don't use this error for enumeration parameters.
|
||||
String: parameter description + "(should be %d-%d)",
|
||||
e.g: "Number of pad characters (should be 0-15)". */
|
||||
|
||||
/* Frame/Buffer Errors */
|
||||
,E_INVALID_FRAME /**< Invalid frame object (NULL handle or missing buffers). */
|
||||
/* String: none. */
|
||||
,E_EMPTY_FRAME /**< Frame object is empty (has no buffers). */
|
||||
/* String: none. */
|
||||
,E_EMPTY_BUFFER /**< Buffer object is empty (no data, or zero data length). */
|
||||
/* String: none. */
|
||||
|
||||
/* Resource Errors */
|
||||
,E_NO_MEMORY /**< External memory allocation failed. */
|
||||
/* String: description of item for which allocation failed. */
|
||||
,E_NOT_FOUND /**< Requested resource or item was not found. */
|
||||
/* Use only when the resource/item is uniquely identified.
|
||||
String: none, unless the operation is not the main goal
|
||||
of the function (in this case add item description). */
|
||||
,E_NOT_AVAILABLE /**< Resource is unavailable. */
|
||||
/* String: none, unless the operation is not the main goal
|
||||
of the function (in this case add resource description). */
|
||||
,E_ALREADY_EXISTS /**< Requested resource or item already exists. */
|
||||
/* Use when resource duplication or sharing are not allowed.
|
||||
String: none, unless the operation is not the main goal
|
||||
of the function (in this case add item description). */
|
||||
,E_FULL /**< Resource is full. */
|
||||
/* String: none, unless the operation is not the main goal
|
||||
of the function (in this case add resource description). */
|
||||
,E_EMPTY /**< Resource is empty. */
|
||||
/* String: none, unless the operation is not the main goal
|
||||
of the function (in this case add resource description). */
|
||||
,E_BUSY /**< Resource or module is busy. */
|
||||
/* String: none, unless the operation is not the main goal
|
||||
of the function (in this case add resource description). */
|
||||
,E_ALREADY_FREE /**< Specified resource or item is already free or deleted. */
|
||||
/* String: none, unless the operation is not the main goal
|
||||
of the function (in this case add item description). */
|
||||
|
||||
/* Read/Write Access Errors */
|
||||
,E_READ_FAILED /**< Read access failed on memory/device. */
|
||||
/* String: none, or device name. */
|
||||
,E_WRITE_FAILED /**< Write access failed on memory/device. */
|
||||
/* String: none, or device name. */
|
||||
|
||||
/* Send/Receive Failures */
|
||||
,E_SEND_FAILED /**< Send operation failed on device. */
|
||||
/* String: none, or device name. */
|
||||
,E_RECEIVE_FAILED /**< Receive operation failed on device. */
|
||||
/* String: none, or device name. */
|
||||
|
||||
/* Operation time-out */
|
||||
,E_TIMEOUT /**< The operation timed out. */
|
||||
/* String: none. */
|
||||
|
||||
,E_DUMMY_LAST /* NEVER USED */
|
||||
|
||||
} e_ErrorType;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Event Type Enumeration
|
||||
*//***************************************************************************/
|
||||
typedef enum e_Event /* Comments / Associated Flags and Message Strings */
|
||||
{ /* ------------------------------------------------------------ */
|
||||
EV_NO_EVENT = 0 /**< No event; Never used. */
|
||||
|
||||
,EV_RX_DISCARD /**< Received packet discarded (by the driver, and only for
|
||||
complete packets);
|
||||
Flags: error flags in case of error, zero otherwise. */
|
||||
/* String: reason for discard, e.g: "Error in frame",
|
||||
"Disordered frame", "Incomplete frame", "No frame object". */
|
||||
,EV_RX_ERROR /**< Receive error (by hardware/firmware);
|
||||
Flags: usually status flags from the buffer descriptor. */
|
||||
/* String: none. */
|
||||
,EV_TX_ERROR /**< Transmit error (by hardware/firmware);
|
||||
Flags: usually status flags from the buffer descriptor. */
|
||||
/* String: none. */
|
||||
,EV_NO_BUFFERS /**< System ran out of buffer objects;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_NO_MB_FRAMES /**< System ran out of multi-buffer frame objects;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_NO_SB_FRAMES /**< System ran out of single-buffer frame objects;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_TX_QUEUE_FULL /**< Transmit queue is full;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_RX_QUEUE_FULL /**< Receive queue is full;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_INTR_QUEUE_FULL /**< Interrupt queue overflow;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_NO_DATA_BUFFER /**< Data buffer allocation (from higher layer) failed;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_OBJ_POOL_EMPTY /**< Objects pool is empty;
|
||||
Flags: zero. */
|
||||
/* String: object description (name). */
|
||||
,EV_BUS_ERROR /**< Illegal access on bus;
|
||||
Flags: the address (if available) or bus identifier */
|
||||
/* String: bus/address/module description. */
|
||||
,EV_PTP_TXTS_QUEUE_FULL /**< PTP Tx timestamps queue is full;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_PTP_RXTS_QUEUE_FULL /**< PTP Rx timestamps queue is full;
|
||||
Flags: zero. */
|
||||
/* String: none. */
|
||||
,EV_DUMMY_LAST
|
||||
|
||||
} e_Event;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Collection Debug Levels for Errors and Events
|
||||
|
||||
The level description refers to errors only.
|
||||
For events, classification is done by the user.
|
||||
|
||||
The TRACE, INFO and WARNING levels are allowed only when using
|
||||
the DBG macro, and are not allowed when using the error macros
|
||||
(RETURN_ERROR or REPORT_ERROR).
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
#define REPORT_LEVEL_CRITICAL 1 /**< Crasher: Incorrect flow, NULL pointers/handles. */
|
||||
#define REPORT_LEVEL_MAJOR 2 /**< Cannot proceed: Invalid operation, parameters or
|
||||
configuration. */
|
||||
#define REPORT_LEVEL_MINOR 3 /**< Recoverable problem: a repeating call with the same
|
||||
parameters may be successful. */
|
||||
#define REPORT_LEVEL_WARNING 4 /**< Something is not exactly right, yet it is not an error. */
|
||||
#define REPORT_LEVEL_INFO 5 /**< Messages which may be of interest to user/programmer. */
|
||||
#define REPORT_LEVEL_TRACE 6 /**< Program flow messages. */
|
||||
|
||||
#define EVENT_DISABLED 0xFF /**< Disabled event (not reported at all) */
|
||||
|
||||
/* @} */
|
||||
|
||||
|
||||
|
||||
#define NO_MSG ("")
|
||||
|
||||
#ifndef DEBUG_GLOBAL_LEVEL
|
||||
#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING
|
||||
#endif /* DEBUG_GLOBAL_LEVEL */
|
||||
|
||||
#ifndef ERROR_GLOBAL_LEVEL
|
||||
#define ERROR_GLOBAL_LEVEL DEBUG_GLOBAL_LEVEL
|
||||
#endif /* ERROR_GLOBAL_LEVEL */
|
||||
|
||||
#ifndef EVENT_GLOBAL_LEVEL
|
||||
#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR
|
||||
#endif /* EVENT_GLOBAL_LEVEL */
|
||||
|
||||
#ifdef EVENT_LOCAL_LEVEL
|
||||
#define EVENT_DYNAMIC_LEVEL EVENT_LOCAL_LEVEL
|
||||
#else
|
||||
#define EVENT_DYNAMIC_LEVEL EVENT_GLOBAL_LEVEL
|
||||
#endif /* EVENT_LOCAL_LEVEL */
|
||||
|
||||
|
||||
#ifndef DEBUG_DYNAMIC_LEVEL
|
||||
#define DEBUG_USING_STATIC_LEVEL
|
||||
|
||||
#ifdef DEBUG_STATIC_LEVEL
|
||||
#define DEBUG_DYNAMIC_LEVEL DEBUG_STATIC_LEVEL
|
||||
#else
|
||||
#define DEBUG_DYNAMIC_LEVEL DEBUG_GLOBAL_LEVEL
|
||||
#endif /* DEBUG_STATIC_LEVEL */
|
||||
|
||||
#else /* DEBUG_DYNAMIC_LEVEL */
|
||||
#ifdef DEBUG_STATIC_LEVEL
|
||||
#error "Please use either DEBUG_STATIC_LEVEL or DEBUG_DYNAMIC_LEVEL (not both)"
|
||||
#else
|
||||
int DEBUG_DYNAMIC_LEVEL = DEBUG_GLOBAL_LEVEL;
|
||||
#endif /* DEBUG_STATIC_LEVEL */
|
||||
#endif /* !DEBUG_DYNAMIC_LEVEL */
|
||||
|
||||
|
||||
#ifndef ERROR_DYNAMIC_LEVEL
|
||||
|
||||
#ifdef ERROR_STATIC_LEVEL
|
||||
#define ERROR_DYNAMIC_LEVEL ERROR_STATIC_LEVEL
|
||||
#else
|
||||
#define ERROR_DYNAMIC_LEVEL ERROR_GLOBAL_LEVEL
|
||||
#endif /* ERROR_STATIC_LEVEL */
|
||||
|
||||
#else /* ERROR_DYNAMIC_LEVEL */
|
||||
#ifdef ERROR_STATIC_LEVEL
|
||||
#error "Please use either ERROR_STATIC_LEVEL or ERROR_DYNAMIC_LEVEL (not both)"
|
||||
#else
|
||||
int ERROR_DYNAMIC_LEVEL = ERROR_GLOBAL_LEVEL;
|
||||
#endif /* ERROR_STATIC_LEVEL */
|
||||
#endif /* !ERROR_DYNAMIC_LEVEL */
|
||||
|
||||
#ifdef NCSW_SMP
|
||||
#define PRINT_FORMAT "[cpu%d, %s:%d %s]"
|
||||
#define PRINT_FMT_PARAMS CORE_GetId(), __FILE__, __LINE__, __FUNCTION__
|
||||
#else
|
||||
#define PRINT_FORMAT "[%s:%d %s]"
|
||||
#define PRINT_FMT_PARAMS __FILE__, __LINE__, __FUNCTION__
|
||||
#endif /* NCSW_SMP */
|
||||
|
||||
#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0))
|
||||
/* No debug/error/event messages at all */
|
||||
#define DBG(_level, _vmsg)
|
||||
|
||||
#define REPORT_ERROR(_level, _err, _vmsg)
|
||||
|
||||
#define RETURN_ERROR(_level, _err, _vmsg) \
|
||||
return ERROR_CODE(_err)
|
||||
|
||||
#if (REPORT_EVENTS > 0)
|
||||
|
||||
#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \
|
||||
do { \
|
||||
if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \
|
||||
XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#else
|
||||
|
||||
#define REPORT_EVENT(_ev, _appId, _flg, _vmsg)
|
||||
|
||||
#endif /* (REPORT_EVENTS > 0) */
|
||||
|
||||
|
||||
#else /* DEBUG_ERRORS > 0 */
|
||||
|
||||
extern const char *dbgLevelStrings[];
|
||||
extern const char *errTypeStrings[];
|
||||
extern const char *moduleStrings[];
|
||||
#if (REPORT_EVENTS > 0)
|
||||
extern const char *eventStrings[];
|
||||
#endif /* (REPORT_EVENTS > 0) */
|
||||
|
||||
|
||||
#if ((defined(DEBUG_USING_STATIC_LEVEL)) && (DEBUG_DYNAMIC_LEVEL < REPORT_LEVEL_WARNING))
|
||||
/* No need for DBG macro - debug level is higher anyway */
|
||||
#define DBG(_level, _vmsg)
|
||||
#else
|
||||
#define DBG(_level, _vmsg) \
|
||||
do { \
|
||||
if (REPORT_LEVEL_##_level <= DEBUG_DYNAMIC_LEVEL) { \
|
||||
XX_Print("> %s (%s) " PRINT_FORMAT ": ", \
|
||||
dbgLevelStrings[REPORT_LEVEL_##_level - 1], \
|
||||
moduleStrings[__ERR_MODULE__ >> 16], \
|
||||
PRINT_FMT_PARAMS); \
|
||||
XX_Print _vmsg; \
|
||||
XX_Print("\r\n"); \
|
||||
} \
|
||||
} while (0)
|
||||
#endif /* (defined(DEBUG_USING_STATIC_LEVEL) && (DEBUG_DYNAMIC_LEVEL < WARNING)) */
|
||||
|
||||
|
||||
#define REPORT_ERROR(_level, _err, _vmsg) \
|
||||
do { \
|
||||
if (REPORT_LEVEL_##_level <= ERROR_DYNAMIC_LEVEL) { \
|
||||
XX_Print("! %s %s Error " PRINT_FORMAT ": %s; ", \
|
||||
dbgLevelStrings[REPORT_LEVEL_##_level - 1], \
|
||||
moduleStrings[__ERR_MODULE__ >> 16], \
|
||||
PRINT_FMT_PARAMS, \
|
||||
errTypeStrings[(GET_ERROR_TYPE(_err) - E_OK - 1)]); \
|
||||
XX_Print _vmsg; \
|
||||
XX_Print("\r\n"); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define RETURN_ERROR(_level, _err, _vmsg) \
|
||||
do { \
|
||||
REPORT_ERROR(_level, (_err), _vmsg); \
|
||||
return ERROR_CODE(_err); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#if (REPORT_EVENTS > 0)
|
||||
|
||||
#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \
|
||||
do { \
|
||||
if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \
|
||||
XX_Print("~ %s %s Event " PRINT_FORMAT ": %s (flags: 0x%04x); ", \
|
||||
dbgLevelStrings[_ev##_LEVEL - 1], \
|
||||
moduleStrings[__ERR_MODULE__ >> 16], \
|
||||
PRINT_FMT_PARAMS, \
|
||||
eventStrings[((_ev) - EV_NO_EVENT - 1)], \
|
||||
(uint16_t)(_flg)); \
|
||||
XX_Print _vmsg; \
|
||||
XX_Print("\r\n"); \
|
||||
XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#else /* not REPORT_EVENTS */
|
||||
|
||||
#define REPORT_EVENT(_ev, _appId, _flg, _vmsg)
|
||||
|
||||
#endif /* (REPORT_EVENTS > 0) */
|
||||
|
||||
#endif /* (DEBUG_ERRORS > 0) */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function ASSERT_COND
|
||||
|
||||
@Description Assertion macro.
|
||||
|
||||
@Param[in] _cond - The condition being checked, in positive form;
|
||||
Failure of the condition triggers the assert.
|
||||
*//***************************************************************************/
|
||||
#ifdef DISABLE_ASSERTIONS
|
||||
#define ASSERT_COND(_cond)
|
||||
#else
|
||||
#define ASSERT_COND(_cond) \
|
||||
do { \
|
||||
if (!(_cond)) { \
|
||||
XX_Print("*** ASSERT_COND failed " PRINT_FORMAT "\r\n", \
|
||||
PRINT_FMT_PARAMS); \
|
||||
XX_Exit(1); \
|
||||
} \
|
||||
} while (0)
|
||||
#endif /* DISABLE_ASSERTIONS */
|
||||
|
||||
|
||||
#ifdef DISABLE_INIT_PARAMETERS_CHECK
|
||||
|
||||
#define CHECK_INIT_PARAMETERS(handle, f_check)
|
||||
#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval)
|
||||
|
||||
#else
|
||||
|
||||
#define CHECK_INIT_PARAMETERS(handle, f_check) \
|
||||
do { \
|
||||
t_Error err = f_check(handle); \
|
||||
if (err != E_OK) { \
|
||||
RETURN_ERROR(MAJOR, err, NO_MSG); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval) \
|
||||
do { \
|
||||
t_Error err = f_check(handle); \
|
||||
if (err != E_OK) { \
|
||||
REPORT_ERROR(MAJOR, err, NO_MSG); \
|
||||
return (retval); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#endif /* DISABLE_INIT_PARAMETERS_CHECK */
|
||||
|
||||
#ifdef DISABLE_SANITY_CHECKS
|
||||
|
||||
#define SANITY_CHECK_RETURN_ERROR(_cond, _err)
|
||||
#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval)
|
||||
#define SANITY_CHECK_RETURN(_cond, _err)
|
||||
#define SANITY_CHECK_EXIT(_cond, _err)
|
||||
|
||||
#else /* DISABLE_SANITY_CHECKS */
|
||||
|
||||
#define SANITY_CHECK_RETURN_ERROR(_cond, _err) \
|
||||
do { \
|
||||
if (!(_cond)) { \
|
||||
RETURN_ERROR(CRITICAL, (_err), NO_MSG); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval) \
|
||||
do { \
|
||||
if (!(_cond)) { \
|
||||
REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
|
||||
return (retval); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define SANITY_CHECK_RETURN(_cond, _err) \
|
||||
do { \
|
||||
if (!(_cond)) { \
|
||||
REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
|
||||
return; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define SANITY_CHECK_EXIT(_cond, _err) \
|
||||
do { \
|
||||
if (!(_cond)) { \
|
||||
REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
|
||||
XX_Exit(1); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#endif /* DISABLE_SANITY_CHECKS */
|
||||
|
||||
/** @} */ /* end of Debug/error Utils group */
|
||||
|
||||
/** @} */ /* end of General Utils group */
|
||||
|
||||
#endif /* __ERROR_EXT_H */
|
||||
|
||||
|
||||
@@ -0,0 +1,174 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**
|
||||
|
||||
@File hash_ext.h
|
||||
|
||||
@Description Hash table implementation
|
||||
|
||||
This is a module that implements a hash table
|
||||
|
||||
User can create (using HASH_Create) the table with a fixed size and
|
||||
|
||||
hash function to his liking.
|
||||
|
||||
@Cautions None.
|
||||
|
||||
*//***************************************************************************/
|
||||
#ifndef __HASH_EXT_H
|
||||
#define __HASH_EXT_H
|
||||
|
||||
|
||||
#include "list_ext.h"
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group etc_id Utility Library Application Programming Interface
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group hash_id Hash Table
|
||||
|
||||
@Description Hash Table functions and typedefs.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description The t_HashEntry is infact a t_List.
|
||||
|
||||
*//***************************************************************************/
|
||||
typedef t_List t_HashEntry;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description The hash table control structure.
|
||||
*//***************************************************************************/
|
||||
typedef struct t_HashTable
|
||||
{
|
||||
uint32_t numOfItems; /**< A counter for the number of items in the table */
|
||||
uint32_t tableSize; /**< A variable holding the number of bins in the table */
|
||||
t_HashEntry * (*f_HashFunc)(t_Handle, t_HashEntry*);
|
||||
/**< A user-defined callback routine for fitting an
|
||||
appropriate bin to a given entry. */
|
||||
t_HashEntry *hashTable; /**< The bins table, after initialization contains
|
||||
tableSize items. */
|
||||
} t_HashTable;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function HASH_Create
|
||||
|
||||
@Description Allocate and initialize the hash table.
|
||||
|
||||
This function allocates memory space and initializes all the
|
||||
members of the hash table object.
|
||||
|
||||
@Param[in] f_HashFunc - The hash function.
|
||||
@Param[in] tableSize - The number of entries in the table.
|
||||
|
||||
@Return Pointer to the created hash table.
|
||||
|
||||
@Cautions f_HashFunc should limit itself to the table size,
|
||||
it's up to the user to check that it does not exceed the limits.
|
||||
*//***************************************************************************/
|
||||
t_HashTable * HASH_Create(t_HashEntry * (*f_HashFunc)(t_Handle, t_HashEntry*),
|
||||
uint32_t tableSize);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function HASH_Terminate
|
||||
|
||||
@Description destructor
|
||||
|
||||
free the allocated memory
|
||||
|
||||
@Param[in] p_HashTable - A pointer to a hash table instance.
|
||||
|
||||
@Return None
|
||||
|
||||
@Cautions User can no longer reach the items through this table.
|
||||
It is recommended to handle this issue before calling this function
|
||||
*//***************************************************************************/
|
||||
void HASH_Terminate(t_HashTable *p_HashTable);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function HASH_Insert
|
||||
|
||||
@Description insert a member to the hash table.
|
||||
|
||||
Insert an item to the location specified by the
|
||||
hash function.
|
||||
|
||||
@Param[in] p_HashTable - A pointer to the hash table instance.
|
||||
@Param[in] p_NewEntry - A pointer to the new entry.
|
||||
|
||||
@Return None
|
||||
*//***************************************************************************/
|
||||
void HASH_Insert(t_HashTable *p_HashTable, t_HashEntry *p_NewEntry);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function HASH_IsEmpty
|
||||
|
||||
@Description Checks if no items are contained in the hash table.
|
||||
|
||||
@Param[in] p_HashTable - A pointer to a hash table instance.
|
||||
|
||||
@Return TRUE when empty , FALSE otherwise.
|
||||
*//***************************************************************************/
|
||||
int32_t HASH_IsEmpty(t_HashTable *p_HashTable);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function HASH_Find
|
||||
|
||||
@Description Finds an entry that is equivalent to the given entry.
|
||||
|
||||
Checks if in the bin that the hash function leads to, there's an
|
||||
item that causes the f_Compare to return TRUE when tested on it.
|
||||
if there is such an item return its address.
|
||||
|
||||
@Param[in] p_HashTable - A pointer to the hash table instance.
|
||||
@Param[in] p_LookFor - A pointer to the requested entry.
|
||||
@Param[in] f_Compare - The compare function.
|
||||
|
||||
@Return Pointer to an entry to the first item for which f_Compare
|
||||
returned TRUE.
|
||||
*//***************************************************************************/
|
||||
t_HashEntry * HASH_Find(t_HashTable *p_HashTable,
|
||||
t_HashEntry *p_LookFor,
|
||||
int32_t (*f_Compare)(t_HashEntry*, t_HashEntry*));
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function HASH_DelInit
|
||||
|
||||
@Description Extracts an item from the hash table.
|
||||
|
||||
@Param[in] p_HashTable - A pointer to the hash table instance.
|
||||
@Param[in] p_HashEntry - A pointer to the deleted entry.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void HASH_DelInit(t_HashTable* p_HashTable, t_HashEntry *p_HashEntry);
|
||||
|
||||
|
||||
/** @} */ /* end of group hash_id */
|
||||
/** @} */ /* end of group etc_id */
|
||||
|
||||
#endif /* __HASH_EXT_H */
|
||||
|
||||
@@ -0,0 +1,336 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
|
||||
@File list_ext.h
|
||||
|
||||
@Description External prototypes for list.c
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __LIST_EXT_H
|
||||
#define __LIST_EXT_H
|
||||
|
||||
|
||||
#include "std_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group etc_id Utility Library Application Programming Interface
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group list_id List
|
||||
|
||||
@Description List module functions,definitions and enums.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description List structure.
|
||||
*//***************************************************************************/
|
||||
typedef struct List
|
||||
{
|
||||
struct List *p_Next; /**< A pointer to the next list object */
|
||||
struct List *p_Prev; /**< A pointer to the previous list object */
|
||||
} t_List;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_FIRST/LIST_LAST/LIST_NEXT/LIST_PREV
|
||||
|
||||
@Description Macro to get first/last/next/previous entry in a list.
|
||||
|
||||
@Param[in] p_List - A pointer to a list.
|
||||
*//***************************************************************************/
|
||||
#define LIST_FIRST(p_List) (p_List)->p_Next
|
||||
#define LIST_LAST(p_List) (p_List)->p_Prev
|
||||
#define LIST_NEXT LIST_FIRST
|
||||
#define LIST_PREV LIST_LAST
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_INIT
|
||||
|
||||
@Description Macro for initialization of a list struct.
|
||||
|
||||
@Param[in] lst - The t_List object to initialize.
|
||||
*//***************************************************************************/
|
||||
#define LIST_INIT(lst) {&(lst), &(lst)}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST
|
||||
|
||||
@Description Macro to declare of a list.
|
||||
|
||||
@Param[in] listName - The list object name.
|
||||
*//***************************************************************************/
|
||||
#define LIST(listName) t_List listName = LIST_INIT(listName)
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function INIT_LIST
|
||||
|
||||
@Description Macro to initialize a list pointer.
|
||||
|
||||
@Param[in] p_List - The list pointer.
|
||||
*//***************************************************************************/
|
||||
#define INIT_LIST(p_List) LIST_FIRST(p_List) = LIST_LAST(p_List) = (p_List)
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_OBJECT
|
||||
|
||||
@Description Macro to get the struct (object) for this entry.
|
||||
|
||||
@Param[in] type - The type of the struct (object) this list is embedded in.
|
||||
@Param[in] member - The name of the t_List object within the struct.
|
||||
|
||||
@Return The structure pointer for this entry.
|
||||
*//***************************************************************************/
|
||||
#define MEMBER_OFFSET(type, member) ((uint32_t)(&((type *)0)->member))
|
||||
#define LIST_OBJECT(p_List, type, member) \
|
||||
((type *)((char *)(p_List)-MEMBER_OFFSET(type, member)))
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_FOR_EACH
|
||||
|
||||
@Description Macro to iterate over a list.
|
||||
|
||||
@Param[in] p_Pos - A pointer to a list to use as a loop counter.
|
||||
@Param[in] p_Head - A pointer to the head for your list pointer.
|
||||
|
||||
@Cautions You can't delete items with this routine.
|
||||
For deletion use LIST_FOR_EACH_SAFE().
|
||||
*//***************************************************************************/
|
||||
#define LIST_FOR_EACH(p_Pos, p_Head) \
|
||||
for (p_Pos = LIST_FIRST(p_Head); p_Pos != (p_Head); p_Pos = LIST_NEXT(p_Pos))
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_FOR_EACH_SAFE
|
||||
|
||||
@Description Macro to iterate over a list safe against removal of list entry.
|
||||
|
||||
@Param[in] p_Pos - A pointer to a list to use as a loop counter.
|
||||
@Param[in] p_Tmp - Another pointer to a list to use as temporary storage.
|
||||
@Param[in] p_Head - A pointer to the head for your list pointer.
|
||||
*//***************************************************************************/
|
||||
#define LIST_FOR_EACH_SAFE(p_Pos, p_Tmp, p_Head) \
|
||||
for (p_Pos = LIST_FIRST(p_Head), p_Tmp = LIST_FIRST(p_Pos); \
|
||||
p_Pos != (p_Head); \
|
||||
p_Pos = p_Tmp, p_Tmp = LIST_NEXT(p_Pos))
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_FOR_EACH_OBJECT_SAFE
|
||||
|
||||
@Description Macro to iterate over list of given type safely.
|
||||
|
||||
@Param[in] p_Pos - A pointer to a list to use as a loop counter.
|
||||
@Param[in] p_Tmp - Another pointer to a list to use as temporary storage.
|
||||
@Param[in] type - The type of the struct this is embedded in.
|
||||
@Param[in] p_Head - A pointer to the head for your list pointer.
|
||||
@Param[in] member - The name of the list_struct within the struct.
|
||||
|
||||
@Cautions You can't delete items with this routine.
|
||||
For deletion use LIST_FOR_EACH_SAFE().
|
||||
*//***************************************************************************/
|
||||
#define LIST_FOR_EACH_OBJECT_SAFE(p_Pos, p_Tmp, p_Head, type, member) \
|
||||
for (p_Pos = LIST_OBJECT(LIST_FIRST(p_Head), type, member), \
|
||||
p_Tmp = LIST_OBJECT(LIST_FIRST(&p_Pos->member), type, member); \
|
||||
&p_Pos->member != (p_Head); \
|
||||
p_Pos = p_Tmp, \
|
||||
p_Tmp = LIST_OBJECT(LIST_FIRST(&p_Pos->member), type, member))
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_FOR_EACH_OBJECT
|
||||
|
||||
@Description Macro to iterate over list of given type.
|
||||
|
||||
@Param[in] p_Pos - A pointer to a list to use as a loop counter.
|
||||
@Param[in] type - The type of the struct this is embedded in.
|
||||
@Param[in] p_Head - A pointer to the head for your list pointer.
|
||||
@Param[in] member - The name of the list_struct within the struct.
|
||||
|
||||
@Cautions You can't delete items with this routine.
|
||||
For deletion use LIST_FOR_EACH_SAFE().
|
||||
*//***************************************************************************/
|
||||
#define LIST_FOR_EACH_OBJECT(p_Pos, type, p_Head, member) \
|
||||
for (p_Pos = LIST_OBJECT(LIST_FIRST(p_Head), type, member); \
|
||||
&p_Pos->member != (p_Head); \
|
||||
p_Pos = LIST_OBJECT(LIST_FIRST(&(p_Pos->member)), type, member))
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_Add
|
||||
|
||||
@Description Add a new entry to a list.
|
||||
|
||||
Insert a new entry after the specified head.
|
||||
This is good for implementing stacks.
|
||||
|
||||
@Param[in] p_New - A pointer to a new list entry to be added.
|
||||
@Param[in] p_Head - A pointer to a list head to add it after.
|
||||
|
||||
@Return none.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void LIST_Add(t_List *p_New, t_List *p_Head)
|
||||
{
|
||||
LIST_PREV(LIST_NEXT(p_Head)) = p_New;
|
||||
LIST_NEXT(p_New) = LIST_NEXT(p_Head);
|
||||
LIST_PREV(p_New) = p_Head;
|
||||
LIST_NEXT(p_Head) = p_New;
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_AddToTail
|
||||
|
||||
@Description Add a new entry to a list.
|
||||
|
||||
Insert a new entry before the specified head.
|
||||
This is useful for implementing queues.
|
||||
|
||||
@Param[in] p_New - A pointer to a new list entry to be added.
|
||||
@Param[in] p_Head - A pointer to a list head to add it after.
|
||||
|
||||
@Return none.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void LIST_AddToTail(t_List *p_New, t_List *p_Head)
|
||||
{
|
||||
LIST_NEXT(LIST_PREV(p_Head)) = p_New;
|
||||
LIST_PREV(p_New) = LIST_PREV(p_Head);
|
||||
LIST_NEXT(p_New) = p_Head;
|
||||
LIST_PREV(p_Head) = p_New;
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_Del
|
||||
|
||||
@Description Deletes entry from a list.
|
||||
|
||||
@Param[in] p_Entry - A pointer to the element to delete from the list.
|
||||
|
||||
@Return none.
|
||||
|
||||
@Cautions LIST_IsEmpty() on entry does not return true after this,
|
||||
the entry is in an undefined state.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void LIST_Del(t_List *p_Entry)
|
||||
{
|
||||
LIST_PREV(LIST_NEXT(p_Entry)) = LIST_PREV(p_Entry);
|
||||
LIST_NEXT(LIST_PREV(p_Entry)) = LIST_NEXT(p_Entry);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_DelAndInit
|
||||
|
||||
@Description Deletes entry from list and reinitialize it.
|
||||
|
||||
@Param[in] p_Entry - A pointer to the element to delete from the list.
|
||||
|
||||
@Return none.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void LIST_DelAndInit(t_List *p_Entry)
|
||||
{
|
||||
LIST_Del(p_Entry);
|
||||
INIT_LIST(p_Entry);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_Move
|
||||
|
||||
@Description Delete from one list and add as another's head.
|
||||
|
||||
@Param[in] p_Entry - A pointer to the list entry to move.
|
||||
@Param[in] p_Head - A pointer to the list head that will precede our entry.
|
||||
|
||||
@Return none.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void LIST_Move(t_List *p_Entry, t_List *p_Head)
|
||||
{
|
||||
LIST_Del(p_Entry);
|
||||
LIST_Add(p_Entry, p_Head);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_MoveToTail
|
||||
|
||||
@Description Delete from one list and add as another's tail.
|
||||
|
||||
@Param[in] p_Entry - A pointer to the entry to move.
|
||||
@Param[in] p_Head - A pointer to the list head that will follow our entry.
|
||||
|
||||
@Return none.
|
||||
*//***************************************************************************/
|
||||
static __inline__ void LIST_MoveToTail(t_List *p_Entry, t_List *p_Head)
|
||||
{
|
||||
LIST_Del(p_Entry);
|
||||
LIST_AddToTail(p_Entry, p_Head);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_IsEmpty
|
||||
|
||||
@Description Tests whether a list is empty.
|
||||
|
||||
@Param[in] p_List - A pointer to the list to test.
|
||||
|
||||
@Return 1 if the list is empty, 0 otherwise.
|
||||
*//***************************************************************************/
|
||||
static __inline__ int LIST_IsEmpty(t_List *p_List)
|
||||
{
|
||||
return (LIST_FIRST(p_List) == p_List);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_Append
|
||||
|
||||
@Description Join two lists.
|
||||
|
||||
@Param[in] p_NewList - A pointer to the new list to add.
|
||||
@Param[in] p_Head - A pointer to the place to add it in the first list.
|
||||
|
||||
@Return none.
|
||||
*//***************************************************************************/
|
||||
void LIST_Append(t_List *p_NewList, t_List *p_Head);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function LIST_NumOfObjs
|
||||
|
||||
@Description Counts number of objects in the list
|
||||
|
||||
@Param[in] p_List - A pointer to the list which objects are to be counted.
|
||||
|
||||
@Return Number of objects in the list.
|
||||
*//***************************************************************************/
|
||||
int LIST_NumOfObjs(t_List *p_List);
|
||||
|
||||
/** @} */ /* end of list_id group */
|
||||
/** @} */ /* end of etc_id group */
|
||||
|
||||
|
||||
#endif /* __LIST_EXT_H */
|
||||
@@ -0,0 +1,303 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
|
||||
@File mem_ext.h
|
||||
|
||||
@Description External prototypes for the memory manager object
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __MEM_EXT_H
|
||||
#define __MEM_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "part_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group etc_id Utility Library Application Programming Interface
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group mem_id Slab Memory Manager
|
||||
|
||||
@Description Slab Memory Manager module functions, definitions and enums.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/* Each block is of the following structure:
|
||||
*
|
||||
*
|
||||
* +-----------+----------+---------------------------+-----------+-----------+
|
||||
* | Alignment | Prefix | Data | Postfix | Alignment |
|
||||
* | field | field | field | field | Padding |
|
||||
* | | | | | |
|
||||
* +-----------+----------+---------------------------+-----------+-----------+
|
||||
* and at the beginning of all bytes, an additional optional padding might reside
|
||||
* to ensure that the first blocks data field is aligned as requested.
|
||||
*/
|
||||
|
||||
|
||||
#define MEM_MAX_NAME_LENGTH 4
|
||||
|
||||
/**************************************************************************//*
|
||||
@Description Memory Segment structure
|
||||
*//***************************************************************************/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
char name[MEM_MAX_NAME_LENGTH];
|
||||
/* The segment's name */
|
||||
uint16_t dataSize; /* Size of each data block */
|
||||
uint32_t getFailures; /* Number of times get failed */
|
||||
int allocOwner; /* Memory allocation owner */
|
||||
uint8_t **p_Bases; /* Base addresses of the segments */
|
||||
uint8_t **p_BlocksStack; /* Array of pointers to blocks */
|
||||
uint32_t num; /* Number of blocks in segment */
|
||||
uint32_t current; /* Current block */
|
||||
uint16_t prefixSize; /* How many bytes to reserve before the data */
|
||||
uint16_t postfixSize; /* How many bytes to reserve after the data */
|
||||
uint16_t alignment; /* Requested alignment for the data field */
|
||||
bool consecutiveMem; /* Allocate consecutive data blocks memory */
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
void *p_MemDbg; /* MEM debug database (MEM leaks detection) */
|
||||
uint32_t blockOffset;
|
||||
uint32_t blockSize;
|
||||
#endif /* DEBUG_MEM_LEAKS */
|
||||
t_Handle h_Spinlock;
|
||||
} t_MemorySegment;
|
||||
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_Init
|
||||
|
||||
@Description Create a new memory segment.
|
||||
|
||||
@Param[in] name - Name of memory partition.
|
||||
@Param[in] p_Handle - Handle to new segment is returned through here.
|
||||
@Param[in] num - Number of blocks in new segment.
|
||||
@Param[in] dataSize - Size of blocks in segment.
|
||||
@Param[in] prefixSize - How many bytes to allocate before the data.
|
||||
@Param[in] postfixSize - How many bytes to allocate after the data.
|
||||
@Param[in] alignment - Requested alignment for data field.
|
||||
|
||||
@Return E_OK - success, E_NO_MEMORY - out of memory.
|
||||
*//***************************************************************************/
|
||||
t_Error MEM_Init(char name[],
|
||||
t_Handle *p_Handle,
|
||||
uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_InitSmart
|
||||
|
||||
@Description Create a new memory segment.
|
||||
|
||||
@Param[in] name - Name of memory partition.
|
||||
@Param[in] p_Handle - Handle to new segment is returned through here.
|
||||
@Param[in] num - Number of blocks in new segment.
|
||||
@Param[in] dataSize - Size of blocks in segment.
|
||||
@Param[in] prefixSize - How many bytes to allocate before the data.
|
||||
@Param[in] postfixSize - How many bytes to allocate after the data.
|
||||
@Param[in] alignment - Requested alignment for data field.
|
||||
@Param[in] memPartitionId - Memory partition ID for allocation.
|
||||
@Param[in] consecutiveMem - Whether to allocate the memory blocks
|
||||
continuously or not.
|
||||
|
||||
@Return E_OK - success, E_NO_MEMORY - out of memory.
|
||||
*//***************************************************************************/
|
||||
t_Error MEM_InitSmart(char name[],
|
||||
t_Handle *p_Handle,
|
||||
uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment,
|
||||
uint8_t memPartitionId,
|
||||
bool consecutiveMem);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_InitByAddress
|
||||
|
||||
@Description Create a new memory segment with a specified base address.
|
||||
|
||||
@Param[in] name - Name of memory partition.
|
||||
@Param[in] p_Handle - Handle to new segment is returned through here.
|
||||
@Param[in] num - Number of blocks in new segment.
|
||||
@Param[in] dataSize - Size of blocks in segment.
|
||||
@Param[in] prefixSize - How many bytes to allocate before the data.
|
||||
@Param[in] postfixSize - How many bytes to allocate after the data.
|
||||
@Param[in] alignment - Requested alignment for data field.
|
||||
@Param[in] address - The required base address.
|
||||
|
||||
@Return E_OK - success, E_NO_MEMORY - out of memory.
|
||||
*//***************************************************************************/
|
||||
t_Error MEM_InitByAddress(char name[],
|
||||
t_Handle *p_Handle,
|
||||
uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment,
|
||||
uint8_t *address);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_Free
|
||||
|
||||
@Description Free a specific memory segment.
|
||||
|
||||
@Param[in] h_Mem - Handle to memory segment.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void MEM_Free(t_Handle h_Mem);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_Get
|
||||
|
||||
@Description Get a block of memory from a segment.
|
||||
|
||||
@Param[in] h_Mem - Handle to memory segment.
|
||||
|
||||
@Return Pointer to new memory block on success,0 otherwise.
|
||||
*//***************************************************************************/
|
||||
void * MEM_Get(t_Handle h_Mem);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_GetN
|
||||
|
||||
@Description Get up to N blocks of memory from a segment.
|
||||
|
||||
The blocks are assumed to be of a fixed size (one size per segment).
|
||||
|
||||
@Param[in] h_Mem - Handle to memory segment.
|
||||
@Param[in] num - Number of blocks to allocate.
|
||||
@Param[out] array - Array of at least num pointers to which the addresses
|
||||
of the allocated blocks are written.
|
||||
|
||||
@Return The number of blocks actually allocated.
|
||||
|
||||
@Cautions Interrupts are disabled for all of the allocation loop.
|
||||
Although this loop is very short for each block (several machine
|
||||
instructions), you should not allocate a very large number
|
||||
of blocks via this routine.
|
||||
*//***************************************************************************/
|
||||
uint16_t MEM_GetN(t_Handle h_Mem, uint32_t num, void *array[]);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_Put
|
||||
|
||||
@Description Put a block of memory back to a segment.
|
||||
|
||||
@Param[in] h_Mem - Handle to memory segment.
|
||||
@Param[in] p_Block - The block to return.
|
||||
|
||||
@Return Pointer to new memory block on success,0 otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error MEM_Put(t_Handle h_Mem, void *p_Block);
|
||||
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MEM_ComputePartitionSize
|
||||
|
||||
@Description calculate a tight upper boundary of the size of a partition with
|
||||
given attributes.
|
||||
|
||||
The returned value is suitable if one wants to use MEM_InitByAddress().
|
||||
|
||||
@Param[in] num - The number of blocks in the segment.
|
||||
@Param[in] dataSize - Size of block to get.
|
||||
@Param[in] prefixSize - The prefix size
|
||||
@Param postfixSize - The postfix size
|
||||
@Param[in] alignment - The requested alignment value
|
||||
|
||||
@Return The memory block size a segment with the given attributes needs.
|
||||
*//***************************************************************************/
|
||||
uint32_t MEM_ComputePartitionSize(uint32_t num,
|
||||
uint16_t dataSize,
|
||||
uint16_t prefixSize,
|
||||
uint16_t postfixSize,
|
||||
uint16_t alignment);
|
||||
|
||||
|
||||
#ifdef DEBUG_MEM_LEAKS
|
||||
|
||||
#if !(defined(__MWERKS__) && (__dest_os == __ppc_eabi))
|
||||
#error "Memory-Leaks-Debug option is supported only for freescale CodeWarrior"
|
||||
#endif /* __MWERKS__ */
|
||||
/**************************************************************************//**
|
||||
@Function MEM_CheckLeaks
|
||||
|
||||
@Description Report MEM object leaks.
|
||||
|
||||
This routine is automatically called by the MEM_Free() routine,
|
||||
but it can also be invoked while the MEM object is alive.
|
||||
|
||||
@Param[in] h_Mem - Handle to memory segment.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void MEM_CheckLeaks(t_Handle h_Mem);
|
||||
|
||||
#else /* not DEBUG_MEM_LEAKS */
|
||||
|
||||
#define MEM_CheckLeaks(h_Mem)
|
||||
|
||||
#endif /* not DEBUG_MEM_LEAKS */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Get base of MEM
|
||||
*//***************************************************************************/
|
||||
#define MEM_GetBase(h_Mem) ((t_MemorySegment *)(h_Mem))->p_Bases[0]
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Get size of MEM block
|
||||
*//***************************************************************************/
|
||||
#define MEM_GetSize(h_Mem) ((t_MemorySegment *)(h_Mem))->dataSize
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Get prefix size of MEM block
|
||||
*//***************************************************************************/
|
||||
#define MEM_GetPrefixSize(h_Mem) ((t_MemorySegment *)(h_Mem))->prefixSize
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Get postfix size of MEM block
|
||||
*//***************************************************************************/
|
||||
#define MEM_GetPostfixSize(h_Mem) ((t_MemorySegment *)(h_Mem))->postfixSize
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Get alignment of MEM block
|
||||
*//***************************************************************************/
|
||||
#define MEM_GetAlignment(h_Mem) ((t_MemorySegment *)(h_Mem))->alignment
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Get the number of blocks in the segment
|
||||
*//***************************************************************************/
|
||||
#define MEM_GetNumOfBlocks(h_Mem) ((t_MemorySegment *)(h_Mem))->num
|
||||
|
||||
|
||||
/** @} */ /* end of MEM group */
|
||||
/** @} */ /* end of etc_id group */
|
||||
|
||||
|
||||
#endif /* __MEM_EXT_H */
|
||||
@@ -0,0 +1,152 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
|
||||
@File memcpy_ext.h
|
||||
|
||||
@Description Efficient functions for copying and setting blocks of memory.
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __MEMCPY_EXT_H
|
||||
#define __MEMCPY_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group etc_id Utility Library Application Programming Interface
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group mem_cpy Memory Copy
|
||||
|
||||
@Description Memory Copy module functions,definitions and enums.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MemCpy32
|
||||
|
||||
@Description Copies one memory buffer into another one in 4-byte chunks!
|
||||
Which should be more efficient than byte by byte.
|
||||
|
||||
For large buffers (over 60 bytes) this function is about 4 times
|
||||
more efficient than the trivial memory copy. For short buffers
|
||||
it is reduced to the trivial copy and may be a bit worse.
|
||||
|
||||
@Param[in] pDst - The address of the destination buffer.
|
||||
@Param[in] pSrc - The address of the source buffer.
|
||||
@Param[in] size - The number of bytes that will be copied from pSrc to pDst.
|
||||
|
||||
@Return pDst (the address of the destination buffer).
|
||||
|
||||
@Cautions There is no parameter or boundary checking! It is up to the user
|
||||
to supply non-null parameters as source & destination and size
|
||||
that actually fits into the destination buffer.
|
||||
*//***************************************************************************/
|
||||
void * MemCpy32(void* pDst,void* pSrc, uint32_t size);
|
||||
void * IO2IOCpy32(void* pDst,void* pSrc, uint32_t size);
|
||||
void * IO2MemCpy32(void* pDst,void* pSrc, uint32_t size);
|
||||
void * Mem2IOCpy32(void* pDst,void* pSrc, uint32_t size);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MemCpy64
|
||||
|
||||
@Description Copies one memory buffer into another one in 8-byte chunks!
|
||||
Which should be more efficient than byte by byte.
|
||||
|
||||
For large buffers (over 60 bytes) this function is about 8 times
|
||||
more efficient than the trivial memory copy. For short buffers
|
||||
it is reduced to the trivial copy and may be a bit worse.
|
||||
|
||||
Some testing suggests that MemCpy32() preforms better than
|
||||
MemCpy64() over small buffers. On average they break even at
|
||||
100 byte buffers. For buffers larger than that MemCpy64 is
|
||||
superior.
|
||||
|
||||
@Param[in] pDst - The address of the destination buffer.
|
||||
@Param[in] pSrc - The address of the source buffer.
|
||||
@Param[in] size - The number of bytes that will be copied from pSrc to pDst.
|
||||
|
||||
@Return pDst (the address of the destination buffer).
|
||||
|
||||
@Cautions There is no parameter or boundary checking! It is up to the user
|
||||
to supply non null parameters as source & destination and size
|
||||
that actually fits into their buffer.
|
||||
|
||||
Do not use under Linux.
|
||||
*//***************************************************************************/
|
||||
void * MemCpy64(void* pDst,void* pSrc, uint32_t size);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MemSet32
|
||||
|
||||
@Description Sets all bytes of a memory buffer to a specific value, in
|
||||
4-byte chunks.
|
||||
|
||||
@Param[in] pDst - The address of the destination buffer.
|
||||
@Param[in] val - Value to set destination bytes to.
|
||||
@Param[in] size - The number of bytes that will be set to val.
|
||||
|
||||
@Return pDst (the address of the destination buffer).
|
||||
|
||||
@Cautions There is no parameter or boundary checking! It is up to the user
|
||||
to supply non null parameter as destination and size
|
||||
that actually fits into the destination buffer.
|
||||
*//***************************************************************************/
|
||||
void * MemSet32(void* pDst, uint8_t val, uint32_t size);
|
||||
void * IOMemSet32(void* pDst, uint8_t val, uint32_t size);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MemSet64
|
||||
|
||||
@Description Sets all bytes of a memory buffer to a specific value, in
|
||||
8-byte chunks.
|
||||
|
||||
@Param[in] pDst - The address of the destination buffer.
|
||||
@Param[in] val - Value to set destination bytes to.
|
||||
@Param[in] size - The number of bytes that will be set to val.
|
||||
|
||||
@Return pDst (the address of the destination buffer).
|
||||
|
||||
@Cautions There is no parameter or boundary checking! It is up to the user
|
||||
to supply non null parameter as destination and size
|
||||
that actually fits into the destination buffer.
|
||||
*//***************************************************************************/
|
||||
void * MemSet64(void* pDst, uint8_t val, uint32_t size);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function MemDisp
|
||||
|
||||
@Description Displays a block of memory in chunks of 32 bits.
|
||||
|
||||
@Param[in] addr - The address of the memory to dysplay.
|
||||
@Param[in] size - The number of bytes that will be displayed.
|
||||
|
||||
@Return None.
|
||||
|
||||
@Cautions There is no parameter or boundary checking! It is up to the user
|
||||
to supply non null parameter as destination and size
|
||||
that actually fits into the destination buffer.
|
||||
*//***************************************************************************/
|
||||
void MemDisp(uint8_t *addr, int size);
|
||||
|
||||
/** @} */ /* end of mem_cpy group */
|
||||
/** @} */ /* end of etc_id group */
|
||||
|
||||
|
||||
#endif /* __MEMCPY_EXT_H */
|
||||
@@ -0,0 +1,97 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/******************************************************************************
|
||||
|
||||
@File sprint_ext.h
|
||||
|
||||
@Description Debug routines (externals).
|
||||
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __SPRINT_EXT_H
|
||||
#define __SPRINT_EXT_H
|
||||
|
||||
|
||||
#if defined(NCSW_LINUX) && defined(__KERNEL__)
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#else
|
||||
#include <stdio.h>
|
||||
|
||||
#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
|
||||
|
||||
#include "std_ext.h"
|
||||
#ifdef NCSW_VXWORKS
|
||||
#include "private/stdioP.h"
|
||||
#endif /* NCSW_VXWORKS */
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group etc_id Utility Library Application Programming Interface
|
||||
|
||||
@Description External routines.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group sprint_id Sprint
|
||||
|
||||
@Description Sprint & Sscan module functions,definitions and enums.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function Sprint
|
||||
|
||||
@Description Format a string and place it in a buffer.
|
||||
|
||||
@Param[in] buff - The buffer to place the result into.
|
||||
@Param[in] str - The format string to use.
|
||||
@Param[in] ... - Arguments for the format string.
|
||||
|
||||
@Return Number of bytes formatted.
|
||||
*//***************************************************************************/
|
||||
int Sprint(char *buff, const char *str, ...);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function Snprint
|
||||
|
||||
@Description Format a string and place it in a buffer.
|
||||
|
||||
@Param[in] buf - The buffer to place the result into.
|
||||
@Param[in] size - The size of the buffer, including the trailing null space.
|
||||
@Param[in] fmt - The format string to use.
|
||||
@Param[in] ... - Arguments for the format string.
|
||||
|
||||
@Return Number of bytes formatted.
|
||||
*//***************************************************************************/
|
||||
int Snprint(char * buf, uint32_t size, const char *fmt, ...);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function Sscan
|
||||
|
||||
@Description Unformat a buffer into a list of arguments.
|
||||
|
||||
@Param[in] buf - input buffer.
|
||||
@Param[in] fmt - formatting of buffer.
|
||||
@Param[out] ... - resulting arguments.
|
||||
|
||||
@Return Number of bytes unformatted.
|
||||
*//***************************************************************************/
|
||||
int Sscan(const char * buf, const char * fmt, ...);
|
||||
|
||||
/** @} */ /* end of sprint_id group */
|
||||
/** @} */ /* end of etc_id group */
|
||||
|
||||
|
||||
#endif /* __SPRINT_EXT_H */
|
||||
+331
@@ -0,0 +1,331 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**
|
||||
|
||||
@File dpaa_integration_ext.h
|
||||
|
||||
@Description P4080 FM external definitions and structures.
|
||||
*//***************************************************************************/
|
||||
#ifndef __DPAA_INTEGRATION_EXT_H
|
||||
#define __DPAA_INTEGRATION_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
|
||||
|
||||
typedef enum {
|
||||
e_DPAA_SWPORTAL0 = 0,
|
||||
e_DPAA_SWPORTAL1,
|
||||
e_DPAA_SWPORTAL2,
|
||||
e_DPAA_SWPORTAL3,
|
||||
e_DPAA_SWPORTAL4,
|
||||
e_DPAA_SWPORTAL5,
|
||||
e_DPAA_SWPORTAL6,
|
||||
e_DPAA_SWPORTAL7,
|
||||
e_DPAA_SWPORTAL8,
|
||||
e_DPAA_SWPORTAL9
|
||||
} e_DpaaSwPortal;
|
||||
|
||||
typedef enum {
|
||||
e_DPAA_DCP0 = 0,
|
||||
e_DPAA_DCP1,
|
||||
e_DPAA_DCP2,
|
||||
e_DPAA_DCP3
|
||||
} e_DpaaDcp;
|
||||
|
||||
#define DPAA_MAX_NUM_OF_SW_PORTALS 10
|
||||
#define DPAA_MAX_NUM_OF_DC_PORTALS 4
|
||||
|
||||
/*****************************************************************************
|
||||
QMan INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define QMAN_PM_DCP_COUNTERS_ERRATA_QMAN1
|
||||
#define QMAN_FQD_AVOID_BLK_ERRATA_QMAN2
|
||||
#define QMAN_DBG_TRC_EV_ERRATA_QMAN3
|
||||
#define QMAN_WQ_CS_CFG_ERRATA_QMAN4
|
||||
#define QMAN_SFDR_LEAK_ERRATA_QMAN5
|
||||
#define QMAN_FQ_TD_THRESH_ERRATA_QMAN6
|
||||
#define QMAN_FQ_INIT_ON_PARKED_ERRATA_QMAN7
|
||||
#define QMAN_NESN_ORR_ERRATA_QMAN8
|
||||
#define QMAN_ERN_REJ_CODE6_ERRATA_QMAN9
|
||||
#define QMAN_ERN_MOULTI_CORE_ERRATA_QMAN10
|
||||
|
||||
#define QM_MAX_NUM_OF_POOL_CHANNELS 15
|
||||
#define QM_MAX_NUM_OF_WQ 8
|
||||
#define QM_MAX_NUM_OF_SWP_AS 4
|
||||
#define QM_MAX_NUM_OF_CGR 64
|
||||
|
||||
typedef enum {
|
||||
e_QM_FQ_CHANNEL_SWPORTAL0 = 0,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL1,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL2,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL3,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL4,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL5,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL6,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL7,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL8,
|
||||
e_QM_FQ_CHANNEL_SWPORTAL9,
|
||||
|
||||
e_QM_FQ_CHANNEL_POOL1 = 0x21,
|
||||
e_QM_FQ_CHANNEL_POOL2,
|
||||
e_QM_FQ_CHANNEL_POOL3,
|
||||
e_QM_FQ_CHANNEL_POOL4,
|
||||
e_QM_FQ_CHANNEL_POOL5,
|
||||
e_QM_FQ_CHANNEL_POOL6,
|
||||
e_QM_FQ_CHANNEL_POOL7,
|
||||
e_QM_FQ_CHANNEL_POOL8,
|
||||
e_QM_FQ_CHANNEL_POOL9,
|
||||
e_QM_FQ_CHANNEL_POOL10,
|
||||
e_QM_FQ_CHANNEL_POOL11,
|
||||
e_QM_FQ_CHANNEL_POOL12,
|
||||
e_QM_FQ_CHANNEL_POOL13,
|
||||
e_QM_FQ_CHANNEL_POOL14,
|
||||
e_QM_FQ_CHANNEL_POOL15,
|
||||
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x40,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP1,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP2,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP3,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP4,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP5,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP6,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP7,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP8,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP9,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP10,
|
||||
e_QM_FQ_CHANNEL_FMAN0_SP11,
|
||||
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP0 = 0x60,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP1,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP2,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP3,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP4,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP5,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP6,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP7,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP8,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP9,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP10,
|
||||
e_QM_FQ_CHANNEL_FMAN1_SP11,
|
||||
|
||||
e_QM_FQ_CHANNEL_CAAM = 0x80,
|
||||
|
||||
e_QM_FQ_CHANNEL_PME = 0xa0
|
||||
} e_QmFQChannel;
|
||||
|
||||
/*****************************************************************************
|
||||
BMan INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define BM_MAX_NUM_OF_POOLS 64
|
||||
|
||||
/*****************************************************************************
|
||||
FM INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define INTG_MAX_NUM_OF_FM 2
|
||||
|
||||
/* Ports defines */
|
||||
#define FM_MAX_NUM_OF_1G_RX_PORTS 4
|
||||
#define FM_MAX_NUM_OF_10G_RX_PORTS 1
|
||||
#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS+FM_MAX_NUM_OF_1G_RX_PORTS)
|
||||
#define FM_MAX_NUM_OF_1G_TX_PORTS 4
|
||||
#define FM_MAX_NUM_OF_10G_TX_PORTS 1
|
||||
#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS+FM_MAX_NUM_OF_1G_TX_PORTS)
|
||||
#define FM_MAX_NUM_OF_OH_PORTS 7
|
||||
#define FM_MAX_NUM_OF_1G_MACS (FM_MAX_NUM_OF_1G_RX_PORTS)
|
||||
#define FM_MAX_NUM_OF_10G_MACS (FM_MAX_NUM_OF_10G_RX_PORTS)
|
||||
#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS+FM_MAX_NUM_OF_10G_MACS)
|
||||
|
||||
#define FM_PORT_MAX_NUM_OF_EXT_POOLS 8 /**< Number of external BM pools per Rx port */
|
||||
#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */
|
||||
#define FM_MAX_NUM_OF_SUB_PORTALS 12
|
||||
#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0
|
||||
|
||||
/* Rams defines */
|
||||
#define FM_MURAM_SIZE (160*KILOBYTE)
|
||||
#define FM_IRAM_SIZE (64*KILOBYTE)
|
||||
|
||||
/* PCD defines */
|
||||
#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */
|
||||
#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */
|
||||
#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */
|
||||
|
||||
/* RTC defines */
|
||||
#define FM_RTC_NUM_OF_ALARMS 2
|
||||
#define FM_RTC_NUM_OF_PERIODIC_PULSES 2
|
||||
#define FM_RTC_NUM_OF_EXT_TRIGGERS 2
|
||||
|
||||
/* QMI defines */
|
||||
#define QMI_MAX_NUM_OF_TNUMS 64
|
||||
#define MAX_QMI_DEQ_SUBPORTAL 12
|
||||
#define QMI_DEF_TNUMS_THRESH 48
|
||||
|
||||
/* FPM defines */
|
||||
#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4
|
||||
|
||||
/* DMA defines */
|
||||
#define DMA_THRESH_MAX_COMMQ 31
|
||||
#define DMA_THRESH_MAX_BUF 127
|
||||
|
||||
/* BMI defines */
|
||||
#define BMI_MAX_NUM_OF_TASKS 128
|
||||
#define BMI_MAX_NUM_OF_DMAS 32
|
||||
#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)
|
||||
#define PORT_MAX_WEIGHT 16
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Enum for inter-module interrupts registration
|
||||
*//***************************************************************************/
|
||||
typedef enum e_FmEventModules{
|
||||
e_FM_MOD_PRS, /**< Parser event */
|
||||
e_FM_MOD_KG, /**< Keygen event */
|
||||
e_FM_MOD_PLCR, /**< Policer event */
|
||||
e_FM_MOD_10G_MAC, /**< 10G MAC error event */
|
||||
e_FM_MOD_1G_MAC, /**< 1G MAC error event */
|
||||
e_FM_MOD_TMR, /**< Timer event */
|
||||
e_FM_MOD_1G_MAC_TMR, /**< 1G MAC Timer event */
|
||||
e_FM_MOD_FMAN_CTRL, /**< FMAN Controller Timer event */
|
||||
e_FM_MOD_DUMMY_LAST
|
||||
} e_FmEventModules;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Enum for interrupts types
|
||||
*//***************************************************************************/
|
||||
typedef enum e_FmIntrType {
|
||||
e_FM_INTR_TYPE_ERR,
|
||||
e_FM_INTR_TYPE_NORMAL
|
||||
} e_FmIntrType;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Enum for inter-module interrupts registration
|
||||
*//***************************************************************************/
|
||||
typedef enum e_FmInterModuleEvent {
|
||||
e_FM_EV_PRS, /**< Parser event */
|
||||
e_FM_EV_ERR_PRS, /**< Parser error event */
|
||||
e_FM_EV_KG, /**< Keygen event */
|
||||
e_FM_EV_ERR_KG, /**< Keygen error event */
|
||||
e_FM_EV_PLCR, /**< Policer event */
|
||||
e_FM_EV_ERR_PLCR, /**< Policer error event */
|
||||
e_FM_EV_ERR_10G_MAC0, /**< 10G MAC 0 error event */
|
||||
e_FM_EV_ERR_1G_MAC0, /**< 1G MAC 0 error event */
|
||||
e_FM_EV_ERR_1G_MAC1, /**< 1G MAC 1 error event */
|
||||
e_FM_EV_ERR_1G_MAC2, /**< 1G MAC 2 error event */
|
||||
e_FM_EV_ERR_1G_MAC3, /**< 1G MAC 3 error event */
|
||||
e_FM_EV_TMR, /**< Timer event */
|
||||
e_FM_EV_1G_MAC0_TMR, /**< 1G MAC 0 Timer event */
|
||||
e_FM_EV_1G_MAC1_TMR, /**< 1G MAC 1 Timer event */
|
||||
e_FM_EV_1G_MAC2_TMR, /**< 1G MAC 2 Timer event */
|
||||
e_FM_EV_1G_MAC3_TMR, /**< 1G MAC 3 Timer event */
|
||||
e_FM_EV_FMAN_CTRL_0, /**< Fman controller event 0 */
|
||||
e_FM_EV_FMAN_CTRL_1, /**< Fman controller event 1 */
|
||||
e_FM_EV_FMAN_CTRL_2, /**< Fman controller event 2 */
|
||||
e_FM_EV_FMAN_CTRL_3, /**< Fman controller event 3 */
|
||||
e_FM_EV_DUMMY_LAST
|
||||
} e_FmInterModuleEvent;
|
||||
|
||||
#define GET_FM_MODULE_EVENT(mod, id, intrType, event) \
|
||||
switch(mod){ \
|
||||
case e_FM_MOD_PRS: \
|
||||
if (id) event = e_FM_EV_DUMMY_LAST; \
|
||||
else event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PRS:e_FM_EV_PRS; \
|
||||
break; \
|
||||
case e_FM_MOD_KG: \
|
||||
if (id) event = e_FM_EV_DUMMY_LAST; \
|
||||
else event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_KG:e_FM_EV_DUMMY_LAST; \
|
||||
break; \
|
||||
case e_FM_MOD_PLCR: \
|
||||
if (id) event = e_FM_EV_DUMMY_LAST; \
|
||||
else event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PLCR:e_FM_EV_PLCR; \
|
||||
break; \
|
||||
case e_FM_MOD_10G_MAC: \
|
||||
if (id) event = e_FM_EV_DUMMY_LAST; \
|
||||
else event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_10G_MAC0:e_FM_EV_DUMMY_LAST;\
|
||||
break; \
|
||||
case e_FM_MOD_1G_MAC: \
|
||||
switch(id){ \
|
||||
case(0): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_1G_MAC0:e_FM_EV_DUMMY_LAST; break; \
|
||||
case(1): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_1G_MAC1:e_FM_EV_DUMMY_LAST; break; \
|
||||
case(2): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_1G_MAC2:e_FM_EV_DUMMY_LAST; break; \
|
||||
case(3): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_1G_MAC3:e_FM_EV_DUMMY_LAST; break; \
|
||||
} \
|
||||
break; \
|
||||
case e_FM_MOD_TMR: \
|
||||
if (id) event = e_FM_EV_DUMMY_LAST; \
|
||||
else event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST:e_FM_EV_TMR; \
|
||||
break; \
|
||||
case e_FM_MOD_1G_MAC_TMR: \
|
||||
switch(id){ \
|
||||
case(0): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST:e_FM_EV_1G_MAC0_TMR; break; \
|
||||
case(1): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST:e_FM_EV_1G_MAC1_TMR; break; \
|
||||
case(2): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST:e_FM_EV_1G_MAC2_TMR; break; \
|
||||
case(3): event = (intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST:e_FM_EV_1G_MAC3_TMR; break; \
|
||||
} \
|
||||
break; \
|
||||
case e_FM_MOD_FMAN_CTRL: \
|
||||
if (intrType == e_FM_INTR_TYPE_ERR) event = e_FM_EV_DUMMY_LAST; \
|
||||
else switch(id){ \
|
||||
case(0): event = e_FM_EV_FMAN_CTRL_0; break; \
|
||||
case(1): event = e_FM_EV_FMAN_CTRL_1; break; \
|
||||
case(2): event = e_FM_EV_FMAN_CTRL_2; break; \
|
||||
case(3): event = e_FM_EV_FMAN_CTRL_3; break; \
|
||||
} \
|
||||
break; \
|
||||
default:event = e_FM_EV_DUMMY_LAST; \
|
||||
break;}
|
||||
|
||||
#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE
|
||||
|
||||
/* p4080-rev1 unique features */
|
||||
#define FM_PARTITION_ARRAY
|
||||
#define FM_PPPOE_NO_MTU_CHECK
|
||||
|
||||
/* p4080 unique features */
|
||||
#define FM_QMI_DEQ_OPTIONS_SUPPORT
|
||||
#define FM_NO_DISPATCH_RAM_ECC
|
||||
|
||||
/* FM erratas */
|
||||
#define FM_10G_MDIO_HOLD_ERRATA_XAUI3
|
||||
#define FM_10G_PCS_ALIGNMENT_ERRATA_XAUI4
|
||||
|
||||
#define FM_1G_SHORT_PAUSE_TIME_ERRATA_DTSEC1
|
||||
#define FM_1G_GRS_ERRATA_DTSEC_A002
|
||||
#define FM_1G_GTS_ERRATA_DTSEC_A004
|
||||
|
||||
#define FM_OP_PARTITION_ERRATA_FMAN16
|
||||
#define FM_1588_SRC_CLK_ERRATA_FMAN1
|
||||
#define FM_RAM_LIST_ERR_IRQ_ERRATA_FMAN8
|
||||
#define FM_BMI_PIPELINE_ERR_IRQ_ERRATA_FMAN9
|
||||
#define FM_PORT_SYNC_ERRATA_FMAN6
|
||||
#define FM_IEEE_BAD_TS_ERRATA_IEEE1588_A001
|
||||
#define FM_HALT_SIG_ERRATA_GEN12
|
||||
#define FM_SINGLE_MDIO_ERRATA_GEN8
|
||||
#define FM_PORT_COUNTERS_ERRATA_FMANx4
|
||||
#define FM_PORT_ALIGN_ERRATA_FMANx3
|
||||
#define FM_OP_PORT_QMAN_REJECT_ERRATA_FMANx7
|
||||
#define FM_PORT_EXCESSIVE_BUDGET_ERRATA_FMANx16
|
||||
#define FM_PORT_DISABLED_ERRATA_FMANx9
|
||||
#define FM_PORT_OTF_CHANGES_ERRATA_FMANx12 FM_PORT_EXCESSIVE_BUDGET_ERRATA_FMANx16
|
||||
#define FM_IM_LARGE_MRBLR_ERRATA_FMAN15
|
||||
#define FM_PRS_L4_SHELL_ERRATA_FMANe
|
||||
#define FM_ECC_HALT_NO_SYNC_TKT028214
|
||||
#define FM_10G_TX_ECC_FRMS_ERRATA_FMAN11
|
||||
#define FM_TX_LOCKUP_ERRATA_DTSEC6
|
||||
|
||||
#define FM_PRS_MEM_ERRATA
|
||||
#define BUP_FM_LEN_CHECK_ERRATA
|
||||
#define BUP_FM_10G_REM_N_LCL_FLT_EX_ERRATA
|
||||
|
||||
|
||||
/* @} */
|
||||
|
||||
|
||||
#endif /* __DPAA_INTEGRATION_EXT_H */
|
||||
+751
@@ -0,0 +1,751 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**
|
||||
|
||||
@File part_integration_ext.h
|
||||
|
||||
@Description P4080 external definitions and structures.
|
||||
*//***************************************************************************/
|
||||
#ifndef __PART_INTEGRATION_EXT_H
|
||||
#define __PART_INTEGRATION_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "dpaa_integration_ext.h"
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group P4080_chip_id P4080 Application Programming Interface
|
||||
|
||||
@Description P4080 Chip functions,definitions and enums.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
#define CORE_E500MC
|
||||
|
||||
#define INTG_MAX_NUM_OF_CORES 8
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Module types.
|
||||
*//***************************************************************************/
|
||||
typedef enum e_ModuleId
|
||||
{
|
||||
e_MODULE_ID_DUART_1 = 0,
|
||||
e_MODULE_ID_DUART_2,
|
||||
e_MODULE_ID_DUART_3,
|
||||
e_MODULE_ID_DUART_4,
|
||||
e_MODULE_ID_LA,
|
||||
e_MODULE_ID_LBC,
|
||||
e_MODULE_ID_PAMU,
|
||||
e_MODULE_ID_QM, /**< Queue manager module */
|
||||
e_MODULE_ID_BM, /**< Buffer manager module */
|
||||
e_MODULE_ID_QM_CE_PORTAL_0,
|
||||
e_MODULE_ID_QM_CI_PORTAL_0,
|
||||
e_MODULE_ID_QM_CE_PORTAL_1,
|
||||
e_MODULE_ID_QM_CI_PORTAL_1,
|
||||
e_MODULE_ID_QM_CE_PORTAL_2,
|
||||
e_MODULE_ID_QM_CI_PORTAL_2,
|
||||
e_MODULE_ID_QM_CE_PORTAL_3,
|
||||
e_MODULE_ID_QM_CI_PORTAL_3,
|
||||
e_MODULE_ID_QM_CE_PORTAL_4,
|
||||
e_MODULE_ID_QM_CI_PORTAL_4,
|
||||
e_MODULE_ID_QM_CE_PORTAL_5,
|
||||
e_MODULE_ID_QM_CI_PORTAL_5,
|
||||
e_MODULE_ID_QM_CE_PORTAL_6,
|
||||
e_MODULE_ID_QM_CI_PORTAL_6,
|
||||
e_MODULE_ID_QM_CE_PORTAL_7,
|
||||
e_MODULE_ID_QM_CI_PORTAL_7,
|
||||
e_MODULE_ID_QM_CE_PORTAL_8,
|
||||
e_MODULE_ID_QM_CI_PORTAL_8,
|
||||
e_MODULE_ID_QM_CE_PORTAL_9,
|
||||
e_MODULE_ID_QM_CI_PORTAL_9,
|
||||
e_MODULE_ID_BM_CE_PORTAL_0,
|
||||
e_MODULE_ID_BM_CI_PORTAL_0,
|
||||
e_MODULE_ID_BM_CE_PORTAL_1,
|
||||
e_MODULE_ID_BM_CI_PORTAL_1,
|
||||
e_MODULE_ID_BM_CE_PORTAL_2,
|
||||
e_MODULE_ID_BM_CI_PORTAL_2,
|
||||
e_MODULE_ID_BM_CE_PORTAL_3,
|
||||
e_MODULE_ID_BM_CI_PORTAL_3,
|
||||
e_MODULE_ID_BM_CE_PORTAL_4,
|
||||
e_MODULE_ID_BM_CI_PORTAL_4,
|
||||
e_MODULE_ID_BM_CE_PORTAL_5,
|
||||
e_MODULE_ID_BM_CI_PORTAL_5,
|
||||
e_MODULE_ID_BM_CE_PORTAL_6,
|
||||
e_MODULE_ID_BM_CI_PORTAL_6,
|
||||
e_MODULE_ID_BM_CE_PORTAL_7,
|
||||
e_MODULE_ID_BM_CI_PORTAL_7,
|
||||
e_MODULE_ID_BM_CE_PORTAL_8,
|
||||
e_MODULE_ID_BM_CI_PORTAL_8,
|
||||
e_MODULE_ID_BM_CE_PORTAL_9,
|
||||
e_MODULE_ID_BM_CI_PORTAL_9,
|
||||
e_MODULE_ID_FM1, /**< Frame manager #1 module */
|
||||
e_MODULE_ID_FM1_RTC, /**< FM Real-Time-Clock */
|
||||
e_MODULE_ID_FM1_MURAM, /**< FM Multi-User-RAM */
|
||||
e_MODULE_ID_FM1_BMI, /**< FM BMI block */
|
||||
e_MODULE_ID_FM1_QMI, /**< FM QMI block */
|
||||
e_MODULE_ID_FM1_PRS, /**< FM parser block */
|
||||
e_MODULE_ID_FM1_PORT_HO0, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM1_PORT_HO1, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM1_PORT_HO2, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM1_PORT_HO3, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM1_PORT_HO4, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM1_PORT_HO5, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM1_PORT_HO6, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM1_PORT_1GRx0, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_1GRx1, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_1GRx2, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_1GRx3, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_10GRx0, /**< FM Rx 10G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_1GTx0, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_1GTx1, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_1GTx2, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_1GTx3, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM1_PORT_10GTx0, /**< FM Tx 10G MAC port block */
|
||||
e_MODULE_ID_FM1_PLCR, /**< FM Policer */
|
||||
e_MODULE_ID_FM1_KG, /**< FM Keygen */
|
||||
e_MODULE_ID_FM1_DMA, /**< FM DMA */
|
||||
e_MODULE_ID_FM1_FPM, /**< FM FPM */
|
||||
e_MODULE_ID_FM1_IRAM, /**< FM Instruction-RAM */
|
||||
e_MODULE_ID_FM1_1GMDIO0, /**< FM 1G MDIO MAC 0*/
|
||||
e_MODULE_ID_FM1_1GMDIO1, /**< FM 1G MDIO MAC 1*/
|
||||
e_MODULE_ID_FM1_1GMDIO2, /**< FM 1G MDIO MAC 2*/
|
||||
e_MODULE_ID_FM1_1GMDIO3, /**< FM 1G MDIO MAC 3*/
|
||||
e_MODULE_ID_FM1_10GMDIO, /**< FM 10G MDIO */
|
||||
e_MODULE_ID_FM1_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
|
||||
e_MODULE_ID_FM1_1GMAC0, /**< FM 1G MAC #0 */
|
||||
e_MODULE_ID_FM1_1GMAC1, /**< FM 1G MAC #1 */
|
||||
e_MODULE_ID_FM1_1GMAC2, /**< FM 1G MAC #2 */
|
||||
e_MODULE_ID_FM1_1GMAC3, /**< FM 1G MAC #3 */
|
||||
e_MODULE_ID_FM1_10GMAC0, /**< FM 10G MAC #0 */
|
||||
|
||||
e_MODULE_ID_FM2, /**< Frame manager #2 module */
|
||||
e_MODULE_ID_FM2_RTC, /**< FM Real-Time-Clock */
|
||||
e_MODULE_ID_FM2_MURAM, /**< FM Multi-User-RAM */
|
||||
e_MODULE_ID_FM2_BMI, /**< FM BMI block */
|
||||
e_MODULE_ID_FM2_QMI, /**< FM QMI block */
|
||||
e_MODULE_ID_FM2_PRS, /**< FM parser block */
|
||||
e_MODULE_ID_FM2_PORT_HO0, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM2_PORT_HO1, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM2_PORT_HO2, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM2_PORT_HO3, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM2_PORT_HO4, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM2_PORT_HO5, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM2_PORT_HO6, /**< FM Host-command/offline-parsing port block */
|
||||
e_MODULE_ID_FM2_PORT_1GRx0, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_1GRx1, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_1GRx2, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_1GRx3, /**< FM Rx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_10GRx0, /**< FM Rx 10G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_1GTx0, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_1GTx1, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_1GTx2, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_1GTx3, /**< FM Tx 1G MAC port block */
|
||||
e_MODULE_ID_FM2_PORT_10GTx0, /**< FM Tx 10G MAC port block */
|
||||
e_MODULE_ID_FM2_PLCR, /**< FM Policer */
|
||||
e_MODULE_ID_FM2_KG, /**< FM Keygen */
|
||||
e_MODULE_ID_FM2_DMA, /**< FM DMA */
|
||||
e_MODULE_ID_FM2_FPM, /**< FM FPM */
|
||||
e_MODULE_ID_FM2_IRAM, /**< FM Instruction-RAM */
|
||||
e_MODULE_ID_FM2_1GMDIO0, /**< FM 1G MDIO MAC 0*/
|
||||
e_MODULE_ID_FM2_1GMDIO1, /**< FM 1G MDIO MAC 1*/
|
||||
e_MODULE_ID_FM2_1GMDIO2, /**< FM 1G MDIO MAC 2*/
|
||||
e_MODULE_ID_FM2_1GMDIO3, /**< FM 1G MDIO MAC 3*/
|
||||
e_MODULE_ID_FM2_10GMDIO, /**< FM 10G MDIO */
|
||||
e_MODULE_ID_FM2_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
|
||||
e_MODULE_ID_FM2_1GMAC0, /**< FM 1G MAC #0 */
|
||||
e_MODULE_ID_FM2_1GMAC1, /**< FM 1G MAC #1 */
|
||||
e_MODULE_ID_FM2_1GMAC2, /**< FM 1G MAC #2 */
|
||||
e_MODULE_ID_FM2_1GMAC3, /**< FM 1G MAC #3 */
|
||||
e_MODULE_ID_FM2_10GMAC0, /**< FM 10G MAC #0 */
|
||||
|
||||
e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */
|
||||
e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */
|
||||
e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */
|
||||
e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */
|
||||
e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */
|
||||
e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */
|
||||
e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */
|
||||
e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */
|
||||
e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */
|
||||
e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */
|
||||
e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */
|
||||
e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */
|
||||
|
||||
e_MODULE_ID_MPIC, /**< MPIC */
|
||||
e_MODULE_ID_GPIO, /**< GPIO */
|
||||
e_MODULE_ID_SERDES, /**< SERDES */
|
||||
e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */
|
||||
e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */
|
||||
e_MODULE_ID_DUMMY_LAST
|
||||
} e_ModuleId;
|
||||
|
||||
#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Transaction source id (for memory conrollers error reporting DDR,LBC,ECM).
|
||||
*//***************************************************************************/
|
||||
typedef enum e_TransSrc
|
||||
{
|
||||
e_TRANS_SRC_LBC = 0x4, /**< Enhanced local bus */
|
||||
e_TRANS_SRC_BOOTS = 0xA, /**< Boot sequencer */
|
||||
e_TRANS_SRC_DDR1 = 0xF, /**< DDR controller 1 */
|
||||
e_TRANS_SRC_CORE_INS_FETCH = 0x10, /**< Processor (instruction) */
|
||||
e_TRANS_SRC_CORE_DATA = 0x11, /**< Processor (data) */
|
||||
e_TRANS_SRC_DMA = 0x15 /**< DMA */
|
||||
} e_TransSrc;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Local Access Window Target interface ID
|
||||
*//***************************************************************************/
|
||||
typedef enum e_LaTgtId
|
||||
{
|
||||
e_LA_TARGET_BMAN = 0x18, /**< BMAN target interface ID */
|
||||
e_LA_TARGET_LBC = 0x1F, /**< Local Bus target interface ID */
|
||||
e_LA_TARGET_QMAN = 0x3C, /**< QMAN target interface ID */
|
||||
e_LA_TARGET_CPC_DDR1 = 0x10, /**< DDR controller 1 or CPC1 SRAM */
|
||||
e_LA_TARGET_CPC_DDR2 = 0x11, /**< DDR controller 2 or CPC2 SRAM */
|
||||
e_LA_TARGET_DDR_INTERLEAVED = 0x14, /**< DDR controller 1 or CPC1 SRAM */
|
||||
e_LA_TARGET_DCSR = 0x1D, /**< DCSR */
|
||||
e_LA_TARGET_NONE = 0xFF /**< None */
|
||||
} e_LaTgtId;
|
||||
|
||||
/***************************************************************
|
||||
P4080 general routines
|
||||
****************************************************************/
|
||||
/**************************************************************************//**
|
||||
@Group P4080_init_grp P4080 Initialization Unit
|
||||
|
||||
@Description P4080 initialization unit API functions, definitions and enums
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Part ID and revision number
|
||||
*//***************************************************************************/
|
||||
typedef enum e_P4080DeviceName
|
||||
{
|
||||
e_P4080_REV_INVALID = 0x00000000, /**< Invalid revision */
|
||||
e_P4080E_REV_1_0 = 0x82080010, /**< P4080E with security, revision 1.0 */
|
||||
e_P4080E_REV_2_0 = 0x82080020 /**< P4080E with security, revision 2.0 */
|
||||
} e_P4080DeviceName;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description structure representing P4080 initialization parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
uint64_t ccsrBaseAddress; /**< CCSR base address (virtual) */
|
||||
uint64_t bmPortalsBaseAddress; /**< Portals base address (virtual) */
|
||||
uint64_t qmPortalsBaseAddress; /**< Portals base address (virtual) */
|
||||
uint8_t serdesLanesBank2;
|
||||
uint8_t serdesLanesBank3;
|
||||
bool (*f_BoardIsValidSerDesConfigurationCB) (uint8_t val);
|
||||
uint8_t guestId; /**< Guest partition ID */
|
||||
} t_P4080Params;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description structure representing P4080 SERDES initialization parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
uint64_t baseAddress; /**< base address (virtual) */
|
||||
t_Handle h_P4080;
|
||||
uint8_t serdesLanesBank2;
|
||||
uint8_t serdesLanesBank3;
|
||||
} t_P4080SerdesParams;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description SERDES lanes activation
|
||||
*//***************************************************************************/
|
||||
typedef enum e_SerDesLaneActivation
|
||||
{
|
||||
e_SERDES_LANE_F, /**< */
|
||||
e_SERDES_LANE_H, /**< */
|
||||
e_SERDES_LANE_A_B, /**< */
|
||||
e_SERDES_LANE_C_D, /**< */
|
||||
e_SERDES_LANE_E_F, /**< */
|
||||
e_SERDES_LANE_G_H, /**< */
|
||||
e_SERDES_LANE_I_J, /**< */
|
||||
e_SERDES_LANE_A_B_C_D, /**< */
|
||||
e_SERDES_LANE_E_F_G_H, /**< */
|
||||
e_SERDES_LANE_A_B_C_D_E_F_G_H /**< */
|
||||
} e_SerDesLaneActivation;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description structure representing P4080 devices configuration
|
||||
*//***************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
bool en;
|
||||
uint8_t serdesBank;
|
||||
e_SerDesLaneActivation serdesLane;
|
||||
bool sgmii;
|
||||
} dtsecs[4];
|
||||
struct
|
||||
{
|
||||
bool en;
|
||||
uint8_t serdesBank;
|
||||
e_SerDesLaneActivation serdesLane;
|
||||
} tgec;
|
||||
} fms[2];
|
||||
} t_P4080DevParams;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_ConfigAndInit
|
||||
|
||||
@Description General initiation of the chip registers.
|
||||
|
||||
@Param[in] p_P4080Params - A pointer to data structure of parameters
|
||||
|
||||
@Return A handle to the P4080 data structure.
|
||||
*//***************************************************************************/
|
||||
t_Handle P4080_ConfigAndInit(t_P4080Params *p_P4080Params);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_Free
|
||||
|
||||
@Description Free all resources.
|
||||
|
||||
@Param[in] h_P4080 - The handle of the initialized P4080 object.
|
||||
|
||||
@Return E_OK on success; Other value otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error P4080_Free(t_Handle h_P4080);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_GetModulePhysBase
|
||||
|
||||
@Description returns the base address of a P4080 module's
|
||||
memory mapped registers.
|
||||
|
||||
@Param[in] h_P4080 - The handle of the initialized P4080 object.
|
||||
@Param[in] module - The module ID.
|
||||
|
||||
@Return Base address of module's memory mapped registers.
|
||||
ILLEGAL_BASE in case of non-existent module
|
||||
*//***************************************************************************/
|
||||
uint64_t P4080_GetModulePhysBase(t_Handle h_P4080, e_ModuleId module);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_GetRevInfo
|
||||
|
||||
@Description This routine enables access to chip and revision information.
|
||||
|
||||
@Param[in] h_P4080 - The handle of the initialized P4080 object.
|
||||
|
||||
@Return Part ID and revision.
|
||||
*//***************************************************************************/
|
||||
e_P4080DeviceName P4080_GetRevInfo(t_Handle h_P4080);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_GetE500Factor
|
||||
|
||||
@Description returns system multiplication factor.
|
||||
|
||||
@Param[in] h_P4080 - A handle to the P4080 object.
|
||||
@Param[in] coreIndex - core index.
|
||||
@Param[out] p_E500MulFactor - returns E500 to CCB multification factor.
|
||||
@Param[out] p_E500DivFactor - returns E500 to CCB division factor.
|
||||
|
||||
@Return E_OK on success; Other value otherwise.
|
||||
*
|
||||
*//***************************************************************************/
|
||||
t_Error P4080_GetE500Factor(t_Handle h_P4080, uint8_t coreIndex, uint32_t *p_E500MulFactor, uint32_t *p_E500DivFactor);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_GetCcbFactor
|
||||
|
||||
@Description returns system multiplication factor.
|
||||
|
||||
@Param[in] h_P4080 - The handle of the initialized P4080 object.
|
||||
|
||||
@Return System multiplication factor.
|
||||
*//***************************************************************************/
|
||||
uint32_t P4080_GetCcbFactor(t_Handle h_P4080);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_GetDdrFactor
|
||||
|
||||
@Description returns the multiplication factor of the clock in for the DDR clock.
|
||||
|
||||
@Param[in] h_P080 - a handle to the P4080 object.
|
||||
|
||||
@Return System multiplication factor.
|
||||
*//***************************************************************************/
|
||||
uint32_t P4080_GetDdrFactor(t_Handle h_P4080);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function P4080_GetDdrType
|
||||
|
||||
@Description returns the multiplication factor of the clock in for the DDR clock .
|
||||
|
||||
@Param[in] h_P080 - a handle to the P4080 object.
|
||||
@Param[out] p_DdrType - returns DDR type DDR2/DDR3.
|
||||
|
||||
@Return E_OK on success; Other value otherwise.
|
||||
*//***************************************************************************/
|
||||
/* t_Error P4080_GetDdrType(t_Handle h_P4080, e_DdrType *p_DdrType); */
|
||||
|
||||
/****************************************************************************
|
||||
@Function P4080_GetFmFactor
|
||||
|
||||
@Description returns FM multiplication factors. (This value is returned using
|
||||
two parameters to avoid using float parameter).
|
||||
|
||||
@Param[in] h_P4080 - The handle of the initialized P4080 object.
|
||||
@Param[in] fmIndex - fm index.
|
||||
@Param[out] p_FmMulFactor - returns E500 to CCB multification factor.
|
||||
@Param[out] p_FmDivFactor - returns E500 to CCB division factor.
|
||||
|
||||
@Return E_OK on success; Other value otherwise.
|
||||
****************************************************************************/
|
||||
t_Error P4080_GetFmFactor(t_Handle h_P4080, uint8_t fmIndex, uint32_t *p_FmMulFactor, uint32_t *p_FmDivFactor);
|
||||
|
||||
/****************************************************************************
|
||||
@Function P4080_LAWForce
|
||||
|
||||
@Description Allocation of a local access window in a specific address.
|
||||
|
||||
The routine allocates memory space window at the requested
|
||||
address, according to the requested size and owner.
|
||||
|
||||
@Param[in] h_P4080 - The handle of the initialized P4080 object.
|
||||
@Param[in] id - Target interface id.
|
||||
@Param[in] size - Size of window, at least 4KB and no more than
|
||||
2GB, must be a power of 2.
|
||||
@Param[in] address - Base address for the window.
|
||||
@Param[in] snoopId - Snoop ID for this window.
|
||||
@Param[in] entry - Entry number in la matrix.
|
||||
|
||||
@Return Number of allocated window (0-7) or LA83_ILLEGAL_LAW
|
||||
If either size or address are illegal, No window
|
||||
available or failed to allocate a block of the
|
||||
requested size.
|
||||
****************************************************************************/
|
||||
t_Error P4080_LAWForce(t_Handle h_P4080, e_LaTgtId id, uint64_t size, uint64_t address,uint8_t snoopId,uint8_t entry);
|
||||
|
||||
/****************************************************************************
|
||||
@Function P4080_LAWClear
|
||||
|
||||
@Description Release of a local access window.
|
||||
|
||||
The routine releases the memory block associated with a specific
|
||||
local access window, and disables this window. On termination,
|
||||
the routine modifies the current available window index to point
|
||||
to the freed window. This is useful in case all windows are busy.
|
||||
It may be of no significance or a little inefficient in other cases.
|
||||
|
||||
@Param h_P4080 - (In) The handle of the initialized P4080 object.
|
||||
@Param lawNum - (In) window number (0-9) as returned by the window
|
||||
allocation routine.
|
||||
|
||||
@Return E_OK on success; Other value otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error P4080_LAWClear(t_Handle h_P4080, uint8_t lawNum);
|
||||
|
||||
/****************************************************************************
|
||||
@Function P4080_LAWFindId
|
||||
|
||||
@Description The routine finds the target ID and window ID that matches a
|
||||
specific address.
|
||||
|
||||
It does that by going through all windows and comparing the
|
||||
address to their start address and size.
|
||||
|
||||
@Param h_P4080 - (In) The handle of the initialized P4080 object.
|
||||
@Param address - (In) Address for testing.
|
||||
@Param p_WinId - (Out) Receives the matching window ID.
|
||||
|
||||
@Return Target ID as defined in 'la_ext.h' (LA_ID_XXX) or LA_ID_NONE
|
||||
if no match.
|
||||
*//***************************************************************************/
|
||||
uint32_t P4080_LAWFindId(t_Handle h_P4080, uint64_t address, uint32_t *p_WinId);
|
||||
|
||||
bool P4080_LAWIsEnabled(t_Handle h_P4080, uint8_t lawNum);
|
||||
|
||||
/****************************************************************************
|
||||
@Function P4080_Reset
|
||||
|
||||
@Description Reset the chip.
|
||||
|
||||
@Param[in] h_P4080 - The handle of the initialized P4080 object.
|
||||
****************************************************************************/
|
||||
void P4080_Reset(t_Handle h_P4080);
|
||||
|
||||
t_Error P4080_CoreTimeBaseEnable(t_Handle h_P4080);
|
||||
t_Error P4080_CoreTimeBaseDisable(t_Handle h_P4080);
|
||||
|
||||
typedef enum e_SrdsPrtcl {
|
||||
SRDS_PRTCL_NONE = 0,
|
||||
SRDS_PRTCL_PCIE1,
|
||||
SRDS_PRTCL_PCIE2,
|
||||
SRDS_PRTCL_PCIE3,
|
||||
SRDS_PRTCL_SRIO1,
|
||||
SRDS_PRTCL_SRIO2,
|
||||
SRDS_PRTCL_SGMII_FM1,
|
||||
SRDS_PRTCL_SGMII_FM2,
|
||||
SRDS_PRTCL_XAUI_FM1,
|
||||
SRDS_PRTCL_XAUI_FM2,
|
||||
SRDS_PRTCL_AURORA
|
||||
} e_SrdsPrtcl;
|
||||
t_P4080DevParams * P4080_GetDevicesConfiguration(t_Handle h_P4080);
|
||||
t_Error P4080_DeviceEnable(t_Handle h_P4080,e_ModuleId module, bool enable);
|
||||
uint32_t P4080_GetRcwSrdsPrtcl(t_Handle h_P4080);
|
||||
bool P4080_IsDeviceConfiguredInRcw(t_Handle h_P4080, e_SrdsPrtcl device);
|
||||
bool P4080_IsSrdsLaneEnabledInRcw(t_Handle h_P4080, uint32_t lane);
|
||||
t_Error P4080_PamuDisableBypass(t_Handle h_P4080, uint8_t pamuId, bool disable);
|
||||
t_Error P4080_SetDevicesBankStatus(t_Handle h_P4080, uint8_t serdesBank, bool status);
|
||||
t_Error P4080_DumpDevicesConfiguration(t_Handle h_P4080);
|
||||
|
||||
/** @} */ /* end of P4080_init_grp group */
|
||||
/** @} */ /* end of P4080_grp group */
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
INTEGRATION-SPECIFIC MODULE CODES
|
||||
******************************************************************************/
|
||||
#define MODULE_UNKNOWN 0x00000000
|
||||
#define MODULE_MEM 0x00010000
|
||||
#define MODULE_MM 0x00020000
|
||||
#define MODULE_CORE 0x00030000
|
||||
#define MODULE_P4080 0x00040000
|
||||
#define MODULE_P4080_PLTFRM 0x00050000
|
||||
#define MODULE_PM 0x00060000
|
||||
#define MODULE_MMU 0x00070000
|
||||
#define MODULE_EPIC 0x00080000
|
||||
#define MODULE_CPC 0x00090000
|
||||
#define MODULE_DUART 0x000a0000
|
||||
#define MODULE_SERDES 0x000b0000
|
||||
#define MODULE_PIO 0x000c0000
|
||||
#define MODULE_QM 0x000d0000
|
||||
#define MODULE_BM 0x000e0000
|
||||
#define MODULE_SEC 0x000f0000
|
||||
#define MODULE_LA 0x00100000
|
||||
#define MODULE_LBC 0x00110000
|
||||
#define MODULE_PAMU 0x00120000
|
||||
#define MODULE_FM 0x00130000
|
||||
#define MODULE_FM_MURAM 0x00140000
|
||||
#define MODULE_FM_PCD 0x00150000
|
||||
#define MODULE_FM_RTC 0x00160000
|
||||
#define MODULE_FM_MAC 0x00170000
|
||||
#define MODULE_FM_PORT 0x00180000
|
||||
|
||||
/*****************************************************************************
|
||||
PAMU INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define PAMU_NUM_OF_PARTITIONS 5
|
||||
|
||||
#define PAMU_PICS_AVICS_ERRATA_PAMU3
|
||||
|
||||
/*****************************************************************************
|
||||
LA INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define LA_NUM_OF_WINDOWS 32 /**< Number of local access windows */
|
||||
|
||||
/*****************************************************************************
|
||||
LBC INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
/****************************************************************************
|
||||
@Group lbc_exception_grp LBC Exception Unit
|
||||
|
||||
@Description LBC Exception unit API functions, definitions and enums
|
||||
|
||||
@{
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
@Anchor lbc_exbm
|
||||
|
||||
@Collection LBC Errors Bit Mask
|
||||
|
||||
These errors are reported through the exceptions callback..
|
||||
The values can be or'ed in any combination in the errors mask
|
||||
parameter of the errors report structure.
|
||||
|
||||
These errors can also be passed as a bit-mask to
|
||||
LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
|
||||
for enabling or disabling error checking.
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */
|
||||
#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */
|
||||
#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */
|
||||
#define LBC_ERR_ATOMIC_WRITE 0x00800000 /**< Atomic write error */
|
||||
#define LBC_ERR_ATOMIC_READ 0x00400000 /**< Atomic read error */
|
||||
#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */
|
||||
|
||||
#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
|
||||
LBC_ERR_WRITE_PROTECT | LBC_ERR_ATOMIC_WRITE | \
|
||||
LBC_ERR_ATOMIC_READ | LBC_ERR_CHIP_SELECT)
|
||||
/**< All possible errors */
|
||||
/* @} */
|
||||
/** @} */ /* end of lbc_exception_grp group */
|
||||
|
||||
#define LBC_INCORRECT_ERROR_REPORT_ERRATA
|
||||
|
||||
#define LBC_NUM_OF_BANKS 8
|
||||
#define LBC_MAX_CS_SIZE 0x0000000100000000LL
|
||||
#define LBC_ATOMIC_OPERATION_SUPPORT
|
||||
#define LBC_PARITY_SUPPORT
|
||||
#define LBC_ADDRESS_HOLD_TIME_CTRL
|
||||
#define LBC_HIGH_CLK_DIVIDERS
|
||||
#define LBC_FCM_AVAILABLE
|
||||
|
||||
/*****************************************************************************
|
||||
GPIO INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define GPIO_NUM_OF_PORTS 1 /**< Number of ports in GPIO module;
|
||||
Each port contains up to 32 i/O pins. */
|
||||
|
||||
#define GPIO_VALID_PIN_MASKS \
|
||||
{ /* Port A */ 0xFFFFFFFF }
|
||||
|
||||
#define GPIO_VALID_INTR_MASKS \
|
||||
{ /* Port A */ 0xFFFFFFFF }
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
MPIC INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define EPIC_MODE_MPIC
|
||||
|
||||
#define EPIC_NUM_OF_EXT_INTRS 12
|
||||
#define EPIC_NUM_OF_INT_INTRS 112
|
||||
#define EPIC_NUM_OF_TIMERS 8
|
||||
#define EPIC_NUM_OF_MSG_INTRS 8
|
||||
#define EPIC_NUM_OF_SMSG_INTRS 24
|
||||
|
||||
/*****************************************************************************
|
||||
SerDes INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
#define SRDS_MAX_LANES 18
|
||||
#define SRDS_MAX_BANK 3
|
||||
|
||||
#define SRDS_LANES \
|
||||
{ \
|
||||
{ 0, 152, 0 }, \
|
||||
{ 1, 153, 0 }, \
|
||||
{ 2, 154, 0 }, \
|
||||
{ 3, 155, 0 }, \
|
||||
{ 4, 156, 0 }, \
|
||||
{ 5, 157, 0 }, \
|
||||
{ 6, 158, 0 }, \
|
||||
{ 7, 159, 0 }, \
|
||||
{ 8, 160, 0 }, \
|
||||
{ 9, 161, 0 }, \
|
||||
{ 16, 162, 1 }, \
|
||||
{ 17, 163, 1 }, \
|
||||
{ 18, 164, 1 }, \
|
||||
{ 19, 165, 1 }, \
|
||||
{ 20, 170, 2 }, \
|
||||
{ 21, 171, 2 }, \
|
||||
{ 22, 172, 2 }, \
|
||||
{ 23, 173, 2 }, \
|
||||
}
|
||||
|
||||
/* valid Prtcl : 0x2,0x5,0x8,0xd,0xe,0xf,0x10,0x13,0x16,0x19,0x1d,0x22,0x25 */
|
||||
#define SRDS_PRTCL_OPTIONS \
|
||||
{ \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE2, SRDS_PRTCL_PCIE2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_NONE, SRDS_PRTCL_NONE, SRDS_PRTCL_NONE, SRDS_PRTCL_NONE}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_NONE, SRDS_PRTCL_NONE, SRDS_PRTCL_NONE, SRDS_PRTCL_NONE}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, SRDS_PRTCL_SGMII_FM2, \
|
||||
SRDS_PRTCL_SGMII_FM1, SRDS_PRTCL_SGMII_FM1, SRDS_PRTCL_SGMII_FM1, SRDS_PRTCL_SGMII_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO2, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, \
|
||||
SRDS_PRTCL_SGMII_FM1, SRDS_PRTCL_SGMII_FM1, SRDS_PRTCL_SGMII_FM1, SRDS_PRTCL_SGMII_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, SRDS_PRTCL_NONE, SRDS_PRTCL_SRIO2, SRDS_PRTCL_NONE, SRDS_PRTCL_SRIO1, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
|
||||
{SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE1, SRDS_PRTCL_PCIE3, SRDS_PRTCL_PCIE3, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_SRIO1, SRDS_PRTCL_AURORA, SRDS_PRTCL_AURORA, \
|
||||
SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, SRDS_PRTCL_XAUI_FM2, \
|
||||
SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1, SRDS_PRTCL_XAUI_FM1} \
|
||||
}
|
||||
|
||||
#define SERDES_REIDL_RCTL_ERRATA_SERDES2
|
||||
#define SERDES_TEQ_TYPE_ERRATA_SERDES3
|
||||
#define SERDES_TX_CLK_ERRATA_SERDES4
|
||||
#define SERDES_PEX_PLL_BANDWIDTH_ERRATA_SERDES5
|
||||
#define SERDES_OPAD_CTL_ERRATA_SERDES6
|
||||
#define SERDES_PLL_JITTER_ERRATA_SERDES8
|
||||
#define SERDES_INTERMITTENT_LANE_ERRATA_SERDES9
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
CPC INTEGRATION-SPECIFIC DEFINITIONS
|
||||
******************************************************************************/
|
||||
|
||||
#define CPC_FLASH_INVALIDATE_ERRATA_CPC2
|
||||
#define CPC_MAX_SIZE_SRAM_ERRATA_CPC4
|
||||
#define CPC_MULTI_WAY_HITS_ERRATA_CPC6
|
||||
#define CPC_DATA_SINGLE_BIT_ECC_ERRATA_CPC7
|
||||
#define CPC_ECC_CHECKING_AND_CORRECTION_ERRATA_CPC9
|
||||
#define CPC_HARDWARE_FLUSH_ERRATA_CPC10
|
||||
#endif /* __PART_INTEGRATION_EXT_H */
|
||||
@@ -0,0 +1,56 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
|
||||
@File part_ext.h
|
||||
|
||||
@Description Definitions for the part (integration) module.
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __PART_EXT_H
|
||||
#define __PART_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "part_integration_ext.h"
|
||||
|
||||
|
||||
#if !(defined(MPC836x) || defined(MPC8569) || defined(P1020) || defined(P1021) || defined(P1022) || defined(P3041) || defined(P4080))
|
||||
#error "unable to proceed without chip-definition"
|
||||
#endif /* !(defined(MPC834x) || ... */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Part callback typedef for revision information.
|
||||
|
||||
@Param appId - (In) user's id as passed at init routine
|
||||
@Param event - (In) GPIO event register - may be used if a single routine
|
||||
is passed to all events. Otherwize - redundent.
|
||||
|
||||
*//***************************************************************************/
|
||||
typedef uint32_t (t_RevInfoCallback)(t_Handle h_Part);
|
||||
|
||||
/**************************************************************************//*
|
||||
@Description Part data structure - must be contained in any integration
|
||||
data structure.
|
||||
*//***************************************************************************/
|
||||
typedef struct t_Part
|
||||
{
|
||||
uint32_t (* f_GetRevInfo)(t_Handle h_Part);
|
||||
/**< Returns the revision number of the chip. */
|
||||
uint64_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
|
||||
/**< Returns the address of the module's memory map base. */
|
||||
e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uint64_t baseAddress);
|
||||
/**< Returns the module's ID according to its memory map base. */
|
||||
} t_Part;
|
||||
|
||||
|
||||
#endif /* __PART_EXT_H */
|
||||
@@ -0,0 +1,399 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File ncsw_ext.h
|
||||
|
||||
@Description General NetCommSw Standard Definitions
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __NCSW_EXT_H
|
||||
#define __NCSW_EXT_H
|
||||
|
||||
#include "memcpy_ext.h"
|
||||
|
||||
|
||||
#define WRITE_BLOCK IOMemSet32
|
||||
#define COPY_BLOCK Mem2IOCpy32
|
||||
|
||||
#define CAST_POINTER_TO_UINT32(val) ((uint32_t)((size_t)((void*)(val))))
|
||||
#define CAST_POINTER_TO_UINT64(val) ((uint64_t)((size_t)((void*)(val))))
|
||||
#define CAST_UINT32_TO_POINTER(val) ((void*)((size_t)((uint32_t)(val))))
|
||||
#define CAST_UINT64_TO_POINTER(val) ((void*)((size_t)((uint64_t)(val))))
|
||||
#define CAST_UINT32_TO_POINTER_TYPE(type,val) ((type*)((size_t)((uint32_t)(val))))
|
||||
#define CAST_UINT64_TO_POINTER_TYPE(type,val) ((type*)((size_t)((uint64_t)(val))))
|
||||
|
||||
#define WRITE_UINT8_UINT24(arg, data08, data24) WRITE_UINT32(arg,((uint32_t)(data08)<<24)|((uint32_t)(data24)&0x00FFFFFF))
|
||||
#define WRITE_UINT24_UINT8(arg, data24, data08) WRITE_UINT32(arg,((uint32_t)(data24)<< 8)|((uint32_t)(data08)&0x000000FF))
|
||||
|
||||
/* Little-Endian access macros */
|
||||
|
||||
#define WRITE_UINT16_LE(arg, data) \
|
||||
WRITE_UINT16((arg), SwapUint16(data))
|
||||
|
||||
#define WRITE_UINT32_LE(arg, data) \
|
||||
WRITE_UINT32((arg), SwapUint32(data))
|
||||
|
||||
#define WRITE_UINT64_LE(arg, data) \
|
||||
WRITE_UINT64((arg), SwapUint64(data))
|
||||
|
||||
#define GET_UINT16_LE(arg) \
|
||||
SwapUint16(GET_UINT16(arg))
|
||||
|
||||
#define GET_UINT32_LE(arg) \
|
||||
SwapUint32(GET_UINT32(arg))
|
||||
|
||||
#define GET_UINT64_LE(arg) \
|
||||
SwapUint64(GET_UINT64(arg))
|
||||
|
||||
/* Write and Read again macros */
|
||||
#define WRITE_UINT_SYNC(size, arg, data) \
|
||||
do { \
|
||||
uint##size##_t temp; \
|
||||
WRITE_UINT##size((arg), (data)); \
|
||||
temp = GET_UINT##size(arg); \
|
||||
} while (0)
|
||||
|
||||
#define WRITE_UINT8_SYNC(arg, data) WRITE_UINT_SYNC(8, (arg), (data))
|
||||
|
||||
#define WRITE_UINT16_SYNC(arg, data) WRITE_UINT_SYNC(16, (arg), (data))
|
||||
|
||||
#define WRITE_UINT32_SYNC(arg, data) WRITE_UINT_SYNC(32, (arg), (data))
|
||||
|
||||
#define MAKE_UINT64(high32, low32) (((uint64_t)high32 << 32) | (low32))
|
||||
|
||||
|
||||
/*----------------------*/
|
||||
/* Miscellaneous macros */
|
||||
/*----------------------*/
|
||||
|
||||
#define UNUSED(X) (X=X)
|
||||
|
||||
#define KILOBYTE 0x400 /* 1024 */
|
||||
#define MEGABYTE (KILOBYTE * KILOBYTE) /* 1024*1024 */
|
||||
#define GIGABYTE (KILOBYTE * MEGABYTE) /* 1024*1024*1024 */
|
||||
|
||||
#define NO_IRQ (-1)
|
||||
|
||||
#define NCSW_MASTER_ID (0)
|
||||
|
||||
/* Macro for checking if a number is a power of 2 */
|
||||
#define POWER_OF_2(n) (!((n) & ((n)-1)))
|
||||
|
||||
/* Macro for calculating log of base 2 */
|
||||
#define LOG2(num, log2Num) \
|
||||
do \
|
||||
{ \
|
||||
uint64_t tmp = (num); \
|
||||
log2Num = 0; \
|
||||
while(tmp > 1) \
|
||||
{ \
|
||||
log2Num++; \
|
||||
tmp = tmp >> 1; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/* Ceiling division - not the fastest way, but safer in terms of overflow */
|
||||
#define DIV_CEIL(x,y) ((uint32_t)((x)/(y)) + (((((uint32_t)((x)/(y)))*(y)) == (x)) ? 0 : 1))
|
||||
|
||||
/* Round up a number to be a multiple of a second number */
|
||||
/* Interpeak start */
|
||||
#ifndef ROUND_UP
|
||||
/* Interpeak End */
|
||||
#define ROUND_UP(x,y) ((((x) + (y) - 1) / (y)) * (y))
|
||||
/* Interpeak start */
|
||||
#endif
|
||||
/* Interpeak End */
|
||||
|
||||
/* Timing macro for converting usec units to number of ticks. */
|
||||
/* (number of usec * clock_Hz) / 1,000,000) - since */
|
||||
/* clk is in MHz units, no division needed. */
|
||||
#define USEC_TO_CLK(usec,clk) ((usec) * (clk))
|
||||
#define CYCLES_TO_USEC(cycles,clk) ((cycles) / (clk))
|
||||
|
||||
/* Timing macros for converting between nsec units and number of clocks. */
|
||||
#define NSEC_TO_CLK(nsec,clk) DIV_CEIL(((nsec) * (clk)), 1000)
|
||||
#define CYCLES_TO_NSEC(cycles,clk) (((cycles) * 1000) / (clk))
|
||||
|
||||
/* Timing macros for converting between psec units and number of clocks. */
|
||||
#define PSEC_TO_CLK(psec,clk) DIV_CEIL(((psec) * (clk)), 1000000)
|
||||
#define CYCLES_TO_PSEC(cycles,clk) (((cycles) * 1000000) / (clk))
|
||||
|
||||
/* Min, Max macros */
|
||||
#define MIN(a,b) ((a) < (b) ? (a) : (b))
|
||||
#define MAX(a,b) ((a) > (b) ? (a) : (b))
|
||||
#define IN_RANGE(min,val,max) ((min)<=(val) && (val)<=(max))
|
||||
|
||||
#if !(defined(ARRAY_SIZE))
|
||||
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
|
||||
#endif /* !defined(ARRAY_SIZE) */
|
||||
|
||||
|
||||
/* possible alignments */
|
||||
#define HALF_WORD_ALIGNMENT 2
|
||||
#define WORD_ALIGNMENT 4
|
||||
#define DOUBLE_WORD_ALIGNMENT 8
|
||||
#define BURST_ALIGNMENT 32
|
||||
|
||||
#define HALF_WORD_ALIGNED 0x00000001
|
||||
#define WORD_ALIGNED 0x00000003
|
||||
#define DOUBLE_WORD_ALIGNED 0x00000007
|
||||
#define BURST_ALIGNED 0x0000001f
|
||||
#ifndef IS_ALIGNED
|
||||
#define IS_ALIGNED(n,align) (!((uint32_t)(n) & (align - 1)))
|
||||
#endif /* IS_ALIGNED */
|
||||
|
||||
|
||||
#define LAST_BUF 1
|
||||
#define FIRST_BUF 2
|
||||
#define SINGLE_BUF (LAST_BUF | FIRST_BUF)
|
||||
#define MIDDLE_BUF 4
|
||||
|
||||
#define ARRAY_END -1
|
||||
|
||||
#define ILLEGAL_BASE (~0)
|
||||
|
||||
#define BUF_POSITION(first, last) state[(!!(last))<<1 | !!(first)]
|
||||
#define DECLARE_POSITION static uint8_t state[4] = { (uint8_t)MIDDLE_BUF, (uint8_t)FIRST_BUF, (uint8_t)LAST_BUF, (uint8_t)SINGLE_BUF };
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Timers operation mode
|
||||
*//***************************************************************************/
|
||||
typedef enum e_TimerMode
|
||||
{
|
||||
e_TIMER_MODE_INVALID = 0,
|
||||
e_TIMER_MODE_FREE_RUN, /**< Free run - counter continues to increase
|
||||
after reaching the reference value. */
|
||||
e_TIMER_MODE_PERIODIC, /**< Periodic - counter restarts counting from 0
|
||||
after reaching the reference value. */
|
||||
e_TIMER_MODE_SINGLE /**< Single (one-shot) - counter stops counting
|
||||
after reaching the reference value. */
|
||||
} e_TimerMode;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Enumeration (bit flags) of communication modes (Transmit,
|
||||
receive or both).
|
||||
*//***************************************************************************/
|
||||
typedef enum e_CommMode
|
||||
{
|
||||
e_COMM_MODE_NONE = 0, /**< No transmit/receive communication */
|
||||
e_COMM_MODE_RX = 1, /**< Only receive communication */
|
||||
e_COMM_MODE_TX = 2, /**< Only transmit communication */
|
||||
e_COMM_MODE_RX_AND_TX = 3 /**< Both transmit and receive communication */
|
||||
} e_CommMode;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description General Diagnostic Mode
|
||||
*//***************************************************************************/
|
||||
typedef enum e_DiagMode
|
||||
{
|
||||
e_DIAG_MODE_NONE = 0, /**< Normal operation; no diagnostic mode */
|
||||
e_DIAG_MODE_CTRL_LOOPBACK, /**< Loopback in the controller */
|
||||
e_DIAG_MODE_CHIP_LOOPBACK, /**< Loopback in the chip but not in the
|
||||
controller; e.g. IO-pins, SerDes, etc. */
|
||||
e_DIAG_MODE_PHY_LOOPBACK, /**< Loopback in the external PHY */
|
||||
e_DIAG_MODE_EXT_LOOPBACK, /**< Loopback in the external line (beyond the PHY) */
|
||||
e_DIAG_MODE_CTRL_ECHO, /**< Echo incoming data by the controller */
|
||||
e_DIAG_MODE_PHY_ECHO /**< Echo incoming data by the PHY */
|
||||
} e_DiagMode;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Possible RxStore callback responses.
|
||||
*//***************************************************************************/
|
||||
typedef enum e_RxStoreResponse
|
||||
{
|
||||
e_RX_STORE_RESPONSE_PAUSE /**< Pause invoking callback with received data;
|
||||
in polling mode, start again invoking callback
|
||||
only next time user invokes the receive routine;
|
||||
in interrupt mode, start again invoking callback
|
||||
only next time a receive event triggers an interrupt;
|
||||
in all cases, received data that are pending are not
|
||||
lost, rather, their processing is temporarily deferred;
|
||||
in all cases, received data are processed in the order
|
||||
in which they were received. */
|
||||
, e_RX_STORE_RESPONSE_CONTINUE /**< Continue invoking callback with received data. */
|
||||
} e_RxStoreResponse;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description General Handle
|
||||
*//***************************************************************************/
|
||||
typedef void * t_Handle; /**< handle, used as object's descriptor */
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description MUTEX type
|
||||
*//***************************************************************************/
|
||||
typedef uint32_t t_Mutex;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Error Code.
|
||||
|
||||
The high word of the error code is the code of the software
|
||||
module (driver). The low word is the error type (e_ErrorType).
|
||||
To get the values from the error code, use GET_ERROR_TYPE()
|
||||
and GET_ERROR_MODULE().
|
||||
*//***************************************************************************/
|
||||
typedef uint32_t t_Error;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description General prototype of interrupt service routine (ISR).
|
||||
|
||||
@Param[in] handle - Optional handle of the module handling the interrupt.
|
||||
|
||||
@Return None
|
||||
*//***************************************************************************/
|
||||
typedef void (t_Isr)(t_Handle handle);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Anchor mem_attr
|
||||
|
||||
@Collection Memory Attributes
|
||||
|
||||
Various attributes of memory partitions. These values may be
|
||||
or'ed together to create a mask of all memory attributes.
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
#define MEMORY_ATTR_CACHEABLE 0x00000001
|
||||
/**< Memory is cacheable */
|
||||
#define MEMORY_ATTR_QE_2ND_BUS_ACCESS 0x00000002
|
||||
/**< Memory can be accessed by QUICC Engine
|
||||
through its secondary bus interface */
|
||||
|
||||
/* @} */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function t_GetBufFunction
|
||||
|
||||
@Description User callback function called by driver to get data buffer.
|
||||
|
||||
User provides this function. Driver invokes it.
|
||||
|
||||
@Param[in] h_BufferPool - A handle to buffer pool manager
|
||||
@Param[out] p_BufContextHandle - Returns the user's private context that
|
||||
should be associated with the buffer
|
||||
|
||||
@Return Pointer to data buffer, NULL if error
|
||||
*//***************************************************************************/
|
||||
typedef uint8_t * (t_GetBufFunction)(t_Handle h_BufferPool,
|
||||
t_Handle *p_BufContextHandle);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function t_PutBufFunction
|
||||
|
||||
@Description User callback function called by driver to return data buffer.
|
||||
|
||||
User provides this function. Driver invokes it.
|
||||
|
||||
@Param[in] h_BufferPool - A handle to buffer pool manager
|
||||
@Param[in] p_Buffer - A pointer to buffer to return
|
||||
@Param[in] h_BufContext - The user's private context associated with
|
||||
the returned buffer
|
||||
|
||||
@Return E_OK on success; Error code otherwise
|
||||
*//***************************************************************************/
|
||||
typedef t_Error (t_PutBufFunction)(t_Handle h_BufferPool,
|
||||
uint8_t *p_Buffer,
|
||||
t_Handle h_BufContext);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function t_PhysToVirt
|
||||
|
||||
@Description Translates a physical address to the matching virtual address.
|
||||
|
||||
@Param[in] addr - The physical address to translate.
|
||||
|
||||
@Return Virtual address.
|
||||
*//***************************************************************************/
|
||||
typedef void * t_PhysToVirt(physAddress_t addr);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function t_VirtToPhys
|
||||
|
||||
@Description Translates a virtual address to the matching physical address.
|
||||
|
||||
@Param[in] addr - The virtual address to translate.
|
||||
|
||||
@Return Physical address.
|
||||
*//***************************************************************************/
|
||||
typedef physAddress_t t_VirtToPhys(void *addr);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Buffer Pool Information Structure.
|
||||
*//***************************************************************************/
|
||||
typedef struct t_BufferPoolInfo
|
||||
{
|
||||
t_Handle h_BufferPool; /**< A handle to the buffer pool manager */
|
||||
t_GetBufFunction *f_GetBuf; /**< User callback to get a free buffer */
|
||||
t_PutBufFunction *f_PutBuf; /**< User callback to return a buffer */
|
||||
uint16_t bufferSize; /**< Buffer size (in bytes) */
|
||||
|
||||
t_PhysToVirt *f_PhysToVirt; /**< User callback to translate pool buffers
|
||||
physical addresses to virtual addresses */
|
||||
t_VirtToPhys *f_VirtToPhys; /**< User callback to translate pool buffers
|
||||
virtual addresses to physical addresses */
|
||||
} t_BufferPoolInfo;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description User callback function called by driver when transmit completed.
|
||||
|
||||
User provides this function. Driver invokes it.
|
||||
|
||||
@Param[in] h_App - Application's handle, as was provided to the
|
||||
driver by the user
|
||||
@Param[in] queueId - Transmit queue ID
|
||||
@Param[in] p_Data - Pointer to the data buffer
|
||||
@Param[in] h_BufContext - The user's private context associated with
|
||||
the given data buffer
|
||||
@Param[in] status - Transmit status and errors
|
||||
@Param[in] flags - Driver-dependent information
|
||||
*//***************************************************************************/
|
||||
typedef void (t_TxConfFunction)(t_Handle h_App,
|
||||
uint32_t queueId,
|
||||
uint8_t *p_Data,
|
||||
t_Handle h_BufContext,
|
||||
uint16_t status,
|
||||
uint32_t flags);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description User callback function called by driver with receive data.
|
||||
|
||||
User provides this function. Driver invokes it.
|
||||
|
||||
@Param[in] h_App - Application's handle, as was provided to the
|
||||
driver by the user
|
||||
@Param[in] queueId - Receive queue ID
|
||||
@Param[in] p_Data - Pointer to the buffer with received data
|
||||
@Param[in] h_BufContext - The user's private context associated with
|
||||
the given data buffer
|
||||
@Param[in] length - Length of received data
|
||||
@Param[in] status - Receive status and errors
|
||||
@Param[in] position - Position of buffer in frame
|
||||
@Param[in] flags - Driver-dependent information
|
||||
|
||||
@Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
|
||||
operation for all ready data.
|
||||
@Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation.
|
||||
*//***************************************************************************/
|
||||
typedef e_RxStoreResponse (t_RxStoreFunction)(t_Handle h_App,
|
||||
uint32_t queueId,
|
||||
uint8_t *p_Data,
|
||||
t_Handle h_BufContext,
|
||||
uint32_t length,
|
||||
uint16_t status,
|
||||
uint8_t position,
|
||||
uint32_t flags);
|
||||
|
||||
|
||||
#endif /* __NCSW_EXT_H */
|
||||
@@ -0,0 +1,27 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
|
||||
@File std_ext.h
|
||||
|
||||
@Description General Standard Definitions
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __STD_EXT_H
|
||||
#define __STD_EXT_H
|
||||
|
||||
|
||||
#include "types_ext.h"
|
||||
#include "ncsw_ext.h"
|
||||
|
||||
|
||||
#endif /* __STD_EXT_H */
|
||||
@@ -0,0 +1,34 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __STRING_EXT_H
|
||||
#define __STRING_EXT_H
|
||||
|
||||
|
||||
#if defined(NCSW_LINUX) && defined(__KERNEL__)
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
extern char * strtok ( char * str, const char * delimiters );
|
||||
|
||||
#elif defined(__KERNEL__)
|
||||
#include "linux/types.h"
|
||||
#include "linux/posix_types.h"
|
||||
#include "linux/string.h"
|
||||
|
||||
#else
|
||||
#include <string.h>
|
||||
|
||||
#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
|
||||
|
||||
#include "std_ext.h"
|
||||
|
||||
|
||||
#endif /* __STRING_EXT_H */
|
||||
@@ -0,0 +1,173 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File types_dflt.h
|
||||
|
||||
@Description General types Standard Definitions
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __TYPES_DFLT_H
|
||||
#define __TYPES_DFLT_H
|
||||
|
||||
|
||||
#ifdef __GNUC__
|
||||
/* __inline__ is already valid in GNUC */
|
||||
#define inline __inline__
|
||||
#define _Packed
|
||||
#if defined(NCSW_VXWORKS)
|
||||
#define _PackedType
|
||||
#else
|
||||
#define _PackedType __attribute__ ((packed))
|
||||
#endif /* NCSW_VXWORKS */
|
||||
#else /* ! __GNUC__ */
|
||||
#define _PackedType
|
||||
#endif
|
||||
|
||||
|
||||
#if defined (_DIAB_TOOL) || defined (__DCC__)
|
||||
#define _Packed __packed__
|
||||
#define __asm__ asm
|
||||
#define __volatile__ volatile
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#define __inline__ inline
|
||||
#define _Packed
|
||||
#define _PackedType
|
||||
#endif
|
||||
|
||||
#ifdef _ENTERPRISE_C_
|
||||
#define __packed__ __PACK__
|
||||
#define _Packed __PACK__
|
||||
#define _PackedType
|
||||
#define __inline__
|
||||
#endif
|
||||
|
||||
/* type definitions */
|
||||
#if defined(__MWERKS__)
|
||||
#include <size_t.h>
|
||||
#endif /* defined (__MWERKS__) */
|
||||
|
||||
#ifdef __DCC__
|
||||
#include <types.h>
|
||||
#endif
|
||||
#ifdef __GNUC__
|
||||
#include <types.h>
|
||||
#endif
|
||||
|
||||
#if defined(NCSW_VXWORKS)
|
||||
#define NETCOMMSW_ALIASING
|
||||
#endif /* NCSW_VXWORKS */
|
||||
|
||||
#ifdef NETCOMMSW_ALIASING
|
||||
#define uint8_t _NETCOMMSW_UINT8_T_
|
||||
#define uint16_t _NETCOMMSW_UINT16_T_
|
||||
#define uint32_t _NETCOMMSW_UINT32_T_
|
||||
#define uint64_t _NETCOMMSW_UINT64_T_
|
||||
#define int8_t _NETCOMMSW_INT8_T_
|
||||
#define int16_t _NETCOMMSW_INT16_T_
|
||||
#define int32_t _NETCOMMSW_INT32_T_
|
||||
#define int64_t _NETCOMMSW_INT64_T_
|
||||
#define float_t _NETCOMMSW_FLOAT_T_
|
||||
#define double_t _NETCOMMSW_DOUBLE_T_
|
||||
#define bool _NETCOMMSW_BOOL_
|
||||
#endif /* NETCOMMSW_ALIASING */
|
||||
|
||||
typedef unsigned char uint8_t; /* Unsigned 8 bit */
|
||||
typedef unsigned short uint16_t; /* Unsigned 16 bit */
|
||||
typedef unsigned long uint32_t; /* Unsigned 32 bit */
|
||||
typedef signed char int8_t; /* Signed 8 bit */
|
||||
typedef signed short int16_t; /* Signed 16 bit */
|
||||
typedef signed long int32_t; /* Signed 32 bit */
|
||||
typedef float float_t; /* Single precision floating point */
|
||||
typedef double double_t; /* Double precision floating point */
|
||||
#if (defined(__GNUC__) || defined(__MWERKS__) || defined(_DIAB_TOOL))
|
||||
typedef unsigned long long uint64_t; /* Unsigned 64 bit */
|
||||
typedef signed long long int64_t; /* Signed 64 bit */
|
||||
#endif /* (defined(__GNUC__) || ... */
|
||||
|
||||
typedef uint32_t physAddress_t;
|
||||
|
||||
|
||||
#define UINT8_MAX 0xFF
|
||||
#define UINT8_MIN 0
|
||||
#define UINT16_MAX 0xFFFF
|
||||
#define UINT16_MIN 0
|
||||
#define UINT32_MAX 0xFFFFFFFF
|
||||
#define UINT32_MIN 0
|
||||
#define UINT64_MAX 0xFFFFFFFFFFFFFFFFLL
|
||||
#define UINT64_MIN 0
|
||||
#define INT8_MAX 0x7F
|
||||
#define INT8_MIN 0x80
|
||||
#define INT16_MAX 0x7FFF
|
||||
#define INT16_MIN 0x8000
|
||||
#define INT32_MAX 0x7FFFFFFF
|
||||
#define INT32_MIN 0x80000000
|
||||
#define INT64_MAX 0x7FFFFFFFFFFFFFFFLL
|
||||
#define INT64_MIN 0x8000000000000000LL
|
||||
|
||||
|
||||
#define ON 1
|
||||
#define OFF 0
|
||||
|
||||
|
||||
#if (defined(__cplusplus))
|
||||
#undef FALSE
|
||||
#undef TRUE
|
||||
#define FALSE false
|
||||
#define TRUE true
|
||||
/* bool is already defined */
|
||||
|
||||
#else
|
||||
#undef FALSE
|
||||
#undef TRUE
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
typedef char bool;
|
||||
#endif /* defined(__cplusplus) */
|
||||
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL ((0L))
|
||||
#endif /* NULL */
|
||||
|
||||
|
||||
/************************/
|
||||
/* Memory access macros */
|
||||
/************************/
|
||||
|
||||
#define GET_UINT32(arg) *(volatile uint32_t*)(&(arg))
|
||||
#define GET_UINT64(arg) *(volatile uint64_t*)(&(arg))
|
||||
|
||||
#define _WRITE_UINT32(arg, data) *(volatile uint32_t*)(&(arg)) = (data)
|
||||
#define _WRITE_UINT64(arg, data) *(volatile uint64_t*)(&(arg)) = (data)
|
||||
|
||||
|
||||
#define GET_UINT8(arg) *(volatile uint8_t *)(&(arg))
|
||||
#define GET_UINT16(arg) *(volatile uint16_t*)(&(arg))
|
||||
|
||||
#define _WRITE_UINT8(arg, data) *(volatile uint8_t *)(&(arg)) = (data)
|
||||
#define _WRITE_UINT16(arg, data) *(volatile uint16_t*)(&(arg)) = (data)
|
||||
|
||||
|
||||
|
||||
|
||||
#define WRITE_UINT8 _WRITE_UINT8
|
||||
#define WRITE_UINT16 _WRITE_UINT16
|
||||
#define WRITE_UINT32 _WRITE_UINT32
|
||||
#define WRITE_UINT64 _WRITE_UINT64
|
||||
|
||||
|
||||
|
||||
#endif /* __TYPES_DFLT_H */
|
||||
@@ -0,0 +1,138 @@
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File types_ext.h
|
||||
|
||||
@Description General types Standard Definitions
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __TYPES_EXT_H
|
||||
#define __TYPES_EXT_H
|
||||
|
||||
|
||||
#if defined(NCSW_LINUX)
|
||||
#include "types_linux.h"
|
||||
|
||||
#elif defined(NCSW_VXWORKS)
|
||||
|
||||
#ifdef __GNUC__
|
||||
/* __inline__ is already valid in GNUC */
|
||||
#define inline __inline__
|
||||
#define _Packed
|
||||
#if defined(NCSW_VXWORKS)
|
||||
#define _PackedType
|
||||
#else
|
||||
#define _PackedType __attribute__ ((packed))
|
||||
#endif /* NCSW_VXWORKS */
|
||||
#else /* ! __GNUC__ */
|
||||
#define _PackedType
|
||||
#endif
|
||||
|
||||
#if defined (_DIAB_TOOL) || defined (__DCC__)
|
||||
#define _Packed __packed__
|
||||
#define __asm__ asm
|
||||
#define __volatile__ volatile
|
||||
#endif
|
||||
|
||||
#include <types.h>
|
||||
#include <stdlib.h>
|
||||
#include <vxWorksCommon.h> /* For TRUE, FALSE */
|
||||
|
||||
typedef uint64_t physAddress_t;
|
||||
|
||||
#define ON 1
|
||||
#define OFF 0
|
||||
|
||||
typedef char bool;
|
||||
|
||||
#define UINT8_MIN 0
|
||||
#define UINT16_MIN 0
|
||||
#define UINT32_MIN 0
|
||||
#define UINT64_MIN 0
|
||||
|
||||
/************************/
|
||||
/* Memory access macros */
|
||||
/************************/
|
||||
|
||||
#define GET_UINT32(arg) *(volatile uint32_t*)(&(arg))
|
||||
#define GET_UINT64(arg) *(volatile uint64_t*)(&(arg))
|
||||
|
||||
#define _WRITE_UINT32(arg, data) *(volatile uint32_t*)(&(arg)) = (data)
|
||||
#define _WRITE_UINT64(arg, data) *(volatile uint64_t*)(&(arg)) = (data)
|
||||
|
||||
#define GET_UINT8(arg) *(volatile uint8_t *)(&(arg))
|
||||
#define GET_UINT16(arg) *(volatile uint16_t*)(&(arg))
|
||||
|
||||
#define _WRITE_UINT8(arg, data) *(volatile uint8_t *)(&(arg)) = (data)
|
||||
#define _WRITE_UINT16(arg, data) *(volatile uint16_t*)(&(arg)) = (data)
|
||||
|
||||
#define WRITE_UINT8 _WRITE_UINT8
|
||||
#define WRITE_UINT16 _WRITE_UINT16
|
||||
#define WRITE_UINT32 _WRITE_UINT32
|
||||
#define WRITE_UINT64 _WRITE_UINT64
|
||||
|
||||
|
||||
#elif defined(__MWERKS__) && defined(__GNUC__)
|
||||
#include "types_bb_gcc.h"
|
||||
|
||||
#else
|
||||
#include "types_dflt.h"
|
||||
#endif /* defined (__ROCOO__) */
|
||||
|
||||
|
||||
static __inline__ void TypesChecker(void)
|
||||
{
|
||||
#if defined(__MWERKS__) && !defined(__GNUC__)
|
||||
#pragma pack(push,1)
|
||||
#endif /* defined(__MWERKS__) && ... */
|
||||
#define MEM_MAP_START
|
||||
_Packed struct strct {
|
||||
__volatile__ int vi;
|
||||
} _PackedType;
|
||||
#define MEM_MAP_END
|
||||
#if defined(__MWERKS__) && !defined(__GNUC__)
|
||||
#pragma pack(pop)
|
||||
#endif /* defined(__MWERKS__) && ... */
|
||||
size_t size = 0;
|
||||
int on = ON, off = OFF;
|
||||
bool tr = TRUE, fls = FALSE;
|
||||
struct strct *p_Strct = NULL;
|
||||
physAddress_t addr = 0x100;
|
||||
|
||||
on = off;
|
||||
tr = fls;
|
||||
p_Strct = p_Strct;
|
||||
size++;
|
||||
|
||||
WRITE_UINT8(*((uint8_t*)((size_t)(addr))),
|
||||
GET_UINT8(*((uint8_t*)((size_t)(addr)))));
|
||||
|
||||
WRITE_UINT8(*((uint8_t*)((size_t)(UINT8_MAX))),
|
||||
GET_UINT8(*((uint8_t*)((size_t)(UINT8_MIN)))));
|
||||
WRITE_UINT16(*((uint16_t*)((size_t)(UINT16_MAX))),
|
||||
GET_UINT16(*((uint16_t*)((size_t)(UINT16_MIN)))));
|
||||
WRITE_UINT32(*((uint32_t*)((size_t)(UINT32_MAX))),
|
||||
GET_UINT32(*((uint32_t*)((size_t)(UINT32_MIN)))));
|
||||
WRITE_UINT64(*((uint64_t*)((size_t)(UINT64_MAX))),
|
||||
GET_UINT64(*((uint64_t*)((size_t)(UINT64_MIN)))));
|
||||
WRITE_UINT8(*((uint8_t*)((size_t)(INT8_MAX))),
|
||||
GET_UINT8(*((uint8_t*)((size_t)(INT8_MIN)))));
|
||||
WRITE_UINT16(*((uint16_t*)((size_t)(INT16_MAX))),
|
||||
GET_UINT16(*((uint16_t*)((size_t)(INT16_MIN)))));
|
||||
WRITE_UINT32(*((uint32_t*)((size_t)(INT32_MAX))),
|
||||
GET_UINT32(*((uint32_t*)((size_t)(INT32_MIN)))));
|
||||
WRITE_UINT64(*((uint64_t*)((size_t)(INT64_MAX))),
|
||||
GET_UINT64(*((uint64_t*)((size_t)(INT64_MIN)))));
|
||||
}
|
||||
|
||||
|
||||
#endif /* __TYPES_EXT_H */
|
||||
@@ -0,0 +1,857 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/**************************************************************************//**
|
||||
@File xx_ext.h
|
||||
|
||||
@Description Prototypes, externals and typedefs for system-supplied
|
||||
(external) routines
|
||||
*//***************************************************************************/
|
||||
|
||||
#ifndef __XX_EXT_H
|
||||
#define __XX_EXT_H
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "part_ext.h"
|
||||
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group xx_id XX Interface (System call hooks)
|
||||
|
||||
@Description Prototypes, externals and typedefs for system-supplied
|
||||
(external) routines
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
#if (defined(REPORT_EVENTS) && (REPORT_EVENTS > 0))
|
||||
/**************************************************************************//**
|
||||
@Function XX_EventById
|
||||
|
||||
@Description Event reporting routine - executed only when REPORT_EVENTS=1.
|
||||
|
||||
@Param[in] event - Event code (e_Event).
|
||||
@Param[in] appId - Application identifier.
|
||||
@Param[in] flags - Event flags.
|
||||
@Param[in] msg - Event message.
|
||||
|
||||
@Return None
|
||||
*//***************************************************************************/
|
||||
void XX_EventById(uint32_t event, t_Handle appId, uint16_t flags, char *msg);
|
||||
|
||||
#else /* not REPORT_EVENTS */
|
||||
#define XX_EventById(event, appId, flags, msg)
|
||||
#endif /* REPORT_EVENTS */
|
||||
|
||||
|
||||
|
||||
#ifdef DEBUG_XX_MALLOC
|
||||
void * XX_MallocDebug(uint32_t size, char *fname, int line);
|
||||
|
||||
void * XX_MallocSmartDebug(uint32_t size,
|
||||
int memPartitionId,
|
||||
uint32_t align,
|
||||
char *fname,
|
||||
int line);
|
||||
|
||||
#define XX_Malloc(sz) \
|
||||
XX_MallocDebug((sz), __FILE__, __LINE__)
|
||||
|
||||
#define XX_MallocSmart(sz, memt, al) \
|
||||
XX_MallocSmartDebug((sz), (memt), (al), __FILE__, __LINE__)
|
||||
|
||||
#else /* not DEBUG_XX_MALLOC */
|
||||
/**************************************************************************//**
|
||||
@Function XX_Malloc
|
||||
|
||||
@Description allocates contiguous block of memory.
|
||||
|
||||
@Param[in] size - Number of bytes to allocate.
|
||||
|
||||
@Return The address of the newly allocated block on success, NULL on failure.
|
||||
*//***************************************************************************/
|
||||
void * XX_Malloc(uint32_t size);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_MallocSmart
|
||||
|
||||
@Description Allocates contiguous block of memory in a specified
|
||||
alignment and from the specified segment.
|
||||
|
||||
@Param[in] size - Number of bytes to allocate.
|
||||
@Param[in] memPartitionId - Memory partition ID; The value zero must
|
||||
be mapped to the default heap partition.
|
||||
@Param[in] alignment - Required memory alignment.
|
||||
|
||||
@Return The address of the newly allocated block on success, NULL on failure.
|
||||
*//***************************************************************************/
|
||||
void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment);
|
||||
#endif /* not DEBUG_XX_MALLOC */
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_FreeSmart
|
||||
|
||||
@Description Frees the memory block pointed to by "p".
|
||||
Only for memory allocated by XX_MallocSmart
|
||||
|
||||
@Param[in] p_Memory - pointer to the memory block.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_FreeSmart(void *p_Memory);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_Free
|
||||
|
||||
@Description frees the memory block pointed to by "p".
|
||||
|
||||
@Param[in] p_Memory - pointer to the memory block.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_Free(void *p_Memory);
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_GetPartitionBase
|
||||
|
||||
@Description This routine gets the address of a memory segment according to
|
||||
the memory type.
|
||||
|
||||
@Param[in] memPartitionId - Memory partition ID; The value zero must
|
||||
be mapped to the default heap partition.
|
||||
|
||||
@Return The address of the required memory type.
|
||||
*//***************************************************************************/
|
||||
void * XX_GetMemPartitionBase(int memPartitionId);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_Print
|
||||
|
||||
@Description print a string.
|
||||
|
||||
@Param[in] str - string to print.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_Print(char *str, ...);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_GetChar
|
||||
|
||||
@Description Get character from console.
|
||||
|
||||
@Return Character is returned on success. Zero is returned otherwise.
|
||||
*//***************************************************************************/
|
||||
char XX_GetChar(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_SetIntr
|
||||
|
||||
@Description Set an interupt service routine for a specific interrupt source.
|
||||
|
||||
@Param[in] irq - Interrupt ID (system-specific number).
|
||||
@Param[in] f_Isr - Callback routine that will be called when the interupt occurs.
|
||||
@Param[in] handle - The argument for the user callback routine.
|
||||
|
||||
@Return E_OK on success; error code otherwise..
|
||||
*//***************************************************************************/
|
||||
t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_FreeIntr
|
||||
|
||||
@Description Free a specific interrupt and a specific callback routine.
|
||||
|
||||
@Param[in] irq - Interrupt ID (system-specific number).
|
||||
|
||||
@Return E_OK on success; error code otherwise..
|
||||
*//***************************************************************************/
|
||||
t_Error XX_FreeIntr(int irq);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_EnableIntr
|
||||
|
||||
@Description Enable a specific interrupt.
|
||||
|
||||
@Param[in] irq - Interrupt ID (system-specific number).
|
||||
|
||||
@Return E_OK on success; error code otherwise..
|
||||
*//***************************************************************************/
|
||||
t_Error XX_EnableIntr(int irq);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_DisableIntr
|
||||
|
||||
@Description Disable a specific interrupt.
|
||||
|
||||
@Param[in] irq - Interrupt ID (system-specific number).
|
||||
|
||||
@Return E_OK on success; error code otherwise..
|
||||
*//***************************************************************************/
|
||||
t_Error XX_DisableIntr(int irq);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_DisableAllIntr
|
||||
|
||||
@Description Disable all interrupts by masking them at the CPU.
|
||||
|
||||
@Return A value that represents the interrupts state before the
|
||||
operation, and should be passed to the matching
|
||||
XX_RestoreAllIntr() call.
|
||||
*//***************************************************************************/
|
||||
uint32_t XX_DisableAllIntr(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_RestoreAllIntr
|
||||
|
||||
@Description Restore previous state of interrupts level at the CPU.
|
||||
|
||||
@Param[in] flags - A value that represents the interrupts state to restore,
|
||||
as returned by the matching call for XX_DisableAllIntr().
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_RestoreAllIntr(uint32_t flags);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_Call
|
||||
|
||||
@Description Call a service in another task.
|
||||
|
||||
Activate the routine “f” via the queue identified by “IntrManagerId”. The
|
||||
parameter to “f” is Id - the handle of the destination object
|
||||
|
||||
@Param[in] intrManagerId - Queue ID.
|
||||
@Param[in] f - routine pointer.
|
||||
@Param[in] Id - the parameter to be passed to f().
|
||||
@Param[in] h_App - Application handle.
|
||||
@Param[in] flags - Unused,
|
||||
|
||||
@Return E_OK is returned on success. E_FAIL is returned otherwise (usually an operating system level failure).
|
||||
*//***************************************************************************/
|
||||
t_Error XX_Call( uint32_t intrManagerId,
|
||||
t_Error (* f)(t_Handle),
|
||||
t_Handle Id,
|
||||
t_Handle h_App,
|
||||
uint16_t flags );
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_Exit
|
||||
|
||||
@Description Stop execution and report status (where it is applicable)
|
||||
|
||||
@Param[in] status - exit status
|
||||
*//***************************************************************************/
|
||||
void XX_Exit(int status);
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Tasklet Service Routines */
|
||||
/*****************************************************************************/
|
||||
typedef t_Handle t_TaskletHandle;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_InitTasklet
|
||||
|
||||
@Description Create and initialize a tasklet object.
|
||||
|
||||
@Param[in] routine - A routine to be ran as a tasklet.
|
||||
@Param[in] data - An argument to pass to the tasklet.
|
||||
|
||||
@Return Tasklet handle is returned on success. NULL is returned otherwise.
|
||||
*//***************************************************************************/
|
||||
t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_FreeTasklet
|
||||
|
||||
@Description Free a tasklet object.
|
||||
|
||||
@Param[in] h_Tasklet - A handle to a tasklet to be free.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_FreeTasklet (t_TaskletHandle h_Tasklet);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_ScheduleTask
|
||||
|
||||
@Description Schedule a tasklet object.
|
||||
|
||||
@Param[in] h_Tasklet - A handle to a tasklet to be schedulded.
|
||||
@Param[in] immediate - Indicate whether to schedule this tasklet on
|
||||
the immediate queue or on the delayed one.
|
||||
|
||||
@Return 0 - on success. Error code - otherwise.
|
||||
*//***************************************************************************/
|
||||
int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_FlushScheduledTasks
|
||||
|
||||
@Description Flush all tasks there are in the scheduled tasks queue.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_FlushScheduledTasks(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_TaskletIsQueued
|
||||
|
||||
@Description Check if task is queued.
|
||||
|
||||
@Param[in] h_Tasklet - A handle to a tasklet to be schedulded.
|
||||
|
||||
@Return 1 - task is queued. 0 - otherwise.
|
||||
*//***************************************************************************/
|
||||
int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_SetTaskletData
|
||||
|
||||
@Description Set data to a scheduleded task. Used to change data of allready
|
||||
scheduled task.
|
||||
|
||||
@Param[in] h_Tasklet - A handle to a tasklet to be schedulded.
|
||||
@Param[in] data - Data to be set.
|
||||
*//***************************************************************************/
|
||||
void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_GetTaskletData
|
||||
|
||||
@Description Get the data of scheduled task.
|
||||
|
||||
@Param[in] h_Tasklet - A handle to a tasklet to be schedulded.
|
||||
|
||||
@Return handle to the data of the task.
|
||||
*//***************************************************************************/
|
||||
t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_BottomHalf
|
||||
|
||||
@Description Bottom half implementation, invoked by the interrupt handler.
|
||||
|
||||
This routine handles all bottom-half tasklets with interrupts
|
||||
enabled.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_BottomHalf(void);
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Spinlock Service Routines */
|
||||
/*****************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_InitSpinlock
|
||||
|
||||
@Description Creates a spinlock.
|
||||
|
||||
@Return Spinlock handle is returned on success; NULL otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Handle XX_InitSpinlock(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_FreeSpinlock
|
||||
|
||||
@Description Frees the memory allocated for the spinlock creation.
|
||||
|
||||
@Param[in] h_Spinlock - A handle to a spinlock.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_FreeSpinlock(t_Handle h_Spinlock);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_LockSpinlock
|
||||
|
||||
@Description Locks a spinlock.
|
||||
|
||||
@Param[in] h_Spinlock - A handle to a spinlock.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_LockSpinlock(t_Handle h_Spinlock);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_UnlockSpinlock
|
||||
|
||||
@Description Unlocks a spinlock.
|
||||
|
||||
@Param[in] h_Spinlock - A handle to a spinlock.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_UnlockSpinlock(t_Handle h_Spinlock);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_LockIntrSpinlock
|
||||
|
||||
@Description Locks a spinlock (interrupt safe).
|
||||
|
||||
@Param[in] h_Spinlock - A handle to a spinlock.
|
||||
|
||||
@Return A value that represents the interrupts state before the
|
||||
operation, and should be passed to the matching
|
||||
XX_UnlockIntrSpinlock() call.
|
||||
*//***************************************************************************/
|
||||
uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_UnlockIntrSpinlock
|
||||
|
||||
@Description Unlocks a spinlock (interrupt safe).
|
||||
|
||||
@Param[in] h_Spinlock - A handle to a spinlock.
|
||||
@Param[in] intrFlags - A value that represents the interrupts state to
|
||||
restore, as returned by the matching call for
|
||||
XX_LockIntrSpinlock().
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags);
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Timers Service Routines */
|
||||
/*****************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_CurrentTime
|
||||
|
||||
@Description Returns current system time.
|
||||
|
||||
@Return Current system time (in milliseconds).
|
||||
*//***************************************************************************/
|
||||
uint32_t XX_CurrentTime(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_CreateTimer
|
||||
|
||||
@Description Creates a timer.
|
||||
|
||||
@Return Timer handle is returned on success; NULL otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Handle XX_CreateTimer(void);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_FreeTimer
|
||||
|
||||
@Description Frees the memory allocated for the timer creation.
|
||||
|
||||
@Param[in] h_Timer - A handle to a timer.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_FreeTimer(t_Handle h_Timer);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_StartTimer
|
||||
|
||||
@Description Starts a timer.
|
||||
|
||||
The user can select to start the timer as periodic timer or as
|
||||
one-shot timer. The user should provide a callback routine that
|
||||
will be called when the timer expires.
|
||||
|
||||
@Param[in] h_Timer - A handle to a timer.
|
||||
@Param[in] msecs - Timer expiration period (in milliseconds).
|
||||
@Param[in] periodic - TRUE for a periodic timer;
|
||||
FALSE for a one-shot timer..
|
||||
@Param[in] f_TimerExpired - A callback routine to be called when the
|
||||
timer expires.
|
||||
@Param[in] h_Arg - The argument to pass in the timer-expired
|
||||
callback routine.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_StartTimer(t_Handle h_Timer,
|
||||
uint32_t msecs,
|
||||
bool periodic,
|
||||
void (*f_TimerExpired)(t_Handle h_Arg),
|
||||
t_Handle h_Arg);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_StopTimer
|
||||
|
||||
@Description Frees the memory allocated for the timer creation.
|
||||
|
||||
@Param[in] h_Timer - A handle to a timer.
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_StopTimer(t_Handle h_Timer);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_GetExpirationTime
|
||||
|
||||
@Description Returns the time (in milliseconds) remaining until the
|
||||
expiration of a timer.
|
||||
|
||||
@Param[in] h_Timer - A handle to a timer.
|
||||
|
||||
@Return The time left until the timer expires.
|
||||
*//***************************************************************************/
|
||||
uint32_t XX_GetExpirationTime(t_Handle h_Timer);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_ModTimer
|
||||
|
||||
@Description Updates the expiration time of a timer.
|
||||
|
||||
This routine adds the given time to the current system time,
|
||||
and sets this value as the new expiration time of the timer.
|
||||
|
||||
@Param[in] h_Timer - A handle to a timer.
|
||||
@Param[in] msecs - The new interval until timer expiration
|
||||
(in milliseconds).
|
||||
|
||||
@Return None.
|
||||
*//***************************************************************************/
|
||||
void XX_ModTimer(t_Handle h_Timer, uint32_t msecs);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_TimerIsActive
|
||||
|
||||
@Description Checks whether a timer is active (pending) or not.
|
||||
|
||||
@Param[in] h_Timer - A handle to a timer.
|
||||
|
||||
@Return 0 - the timer is inactive; Non-zero value - the timer is active;
|
||||
*//***************************************************************************/
|
||||
int XX_TimerIsActive(t_Handle h_Timer);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_Sleep
|
||||
|
||||
@Description Non-busy wait until the desired time (in milliseconds) has passed.
|
||||
|
||||
@Param[in] msecs - The requested sleep time (in milliseconds).
|
||||
|
||||
@Return None.
|
||||
|
||||
@Cautions This routine enables interrupts during its wait time.
|
||||
*//***************************************************************************/
|
||||
uint32_t XX_Sleep(uint32_t msecs);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_UDelay
|
||||
|
||||
@Description Busy-wait until the desired time (in microseconds) has passed.
|
||||
|
||||
@Param[in] usecs - The requested delay time (in microseconds).
|
||||
|
||||
@Return None.
|
||||
|
||||
@Cautions It is highly unrecommended to call this routine during interrupt
|
||||
time, because the system time may not be updated properly during
|
||||
the delay loop. The behavior of this routine during interrupt
|
||||
time is unexpected.
|
||||
*//***************************************************************************/
|
||||
void XX_UDelay(uint32_t usecs);
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Other Service Routines */
|
||||
/*****************************************************************************/
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_PhysToVirt
|
||||
|
||||
@Description Translates a physical address to the matching virtual address.
|
||||
|
||||
@Param[in] addr - The physical address to translate.
|
||||
|
||||
@Return Virtual address.
|
||||
*//***************************************************************************/
|
||||
void * XX_PhysToVirt(physAddress_t addr);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_VirtToPhys
|
||||
|
||||
@Description Translates a virtual address to the matching physical address.
|
||||
|
||||
@Param[in] addr - The virtual address to translate.
|
||||
|
||||
@Return Physical address.
|
||||
*//***************************************************************************/
|
||||
physAddress_t XX_VirtToPhys(void *addr);
|
||||
|
||||
/* NOTE - This MACRO is temporary and deprecated. Don't use it! */
|
||||
#define XXX_VirtToPhys(addr) XX_VirtToPhys(CAST_UINT32_TO_POINTER(addr))
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Group xx_ipc XX Inter-Partition-Communication API
|
||||
|
||||
@Description The following API is to be used when working with multiple
|
||||
partitions configuration.
|
||||
|
||||
@{
|
||||
*//***************************************************************************/
|
||||
|
||||
#define XX_IPC_MAX_ADDR_NAME_LENGTH 16 /**< Maximum length of an endpoint name string;
|
||||
The IPC service can use this constant to limit
|
||||
the storage space for IPC endpoint names. */
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function t_IpcMsgCompletion
|
||||
|
||||
@Description Callback function used upon IPC non-blocking transaction completion
|
||||
to return message buffer to the caller and to forward reply if available.
|
||||
|
||||
This callback function may be attached by the source endpoint to any outgoing
|
||||
IPC message to indicate a non-blocking send (see also XX_IpcSendMessage() routine).
|
||||
Upon completion of an IPC transaction (consisting of a message and an optional reply),
|
||||
the IPC service invokes this callback routine to return the message buffer to the sender
|
||||
and to provide the received reply, if requested.
|
||||
|
||||
User provides this function. Driver invokes it.
|
||||
|
||||
@Param[in] h_Module - Abstract handle to the sending module - the same handle as was passed
|
||||
in the XX_IpcSendMessage() function; This handle is typically used to point
|
||||
to the internal data structure of the source endpoint.
|
||||
@Param[in] p_Msg - Pointer to original (sent) message buffer;
|
||||
The source endpoint can free (or reuse) this buffer when message
|
||||
completion callback is called.
|
||||
@Param[in] p_Reply - Pointer to (received) reply buffer;
|
||||
This pointer is the same as was provided by the source endpoint in
|
||||
XX_IpcSendMessage().
|
||||
@Param[in] replyLength - Length (in bytes) of actual data in the reply buffer.
|
||||
@Param[in] status - Completion status - E_OK or failure indication, e.g. IPC transaction completion
|
||||
timeout.
|
||||
|
||||
@Return None
|
||||
*//***************************************************************************/
|
||||
typedef void (t_IpcMsgCompletion)(t_Handle h_Module,
|
||||
uint8_t *p_Msg,
|
||||
uint8_t *p_Reply,
|
||||
uint32_t replyLength,
|
||||
t_Error status);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function t_IpcMsgHandler
|
||||
|
||||
@Description Callback function used as IPC message handler.
|
||||
|
||||
The IPC service invokes message handlers for each IPC message received.
|
||||
The actual function pointer should be registered by each destination endpoint
|
||||
via the XX_IpcRegisterMsgHandler() routine.
|
||||
|
||||
User provides this function. Driver invokes it.
|
||||
|
||||
@Param[in] h_Module - Abstract handle to the message handling module - the same handle as
|
||||
was passed in the XX_IpcRegisterMsgHandler() function; this handle is
|
||||
typically used to point to the internal data structure of the destination
|
||||
endpoint.
|
||||
@Param[in] p_Msg - Pointer to message buffer with data received from peer.
|
||||
@Param[in] msgLength - Length (in bytes) of message data.
|
||||
@Param[in] p_Reply - Pointer to reply buffer, to be filled by the message handler and then sent
|
||||
by the IPC service;
|
||||
The reply buffer is allocated by the IPC service with size equals to the
|
||||
replyLength parameter provided in message handler registration (see
|
||||
XX_IpcRegisterMsgHandler() function);
|
||||
If replyLength was initially specified as zero during message handler registration,
|
||||
the IPC service may set this pointer to NULL and assume that a reply is not needed;
|
||||
The IPC service is also responsible for freeing the reply buffer after the
|
||||
reply has been sent or dismissed.
|
||||
@Param[in,out] p_ReplyLength - Pointer to reply length, which has a dual role in this function:
|
||||
[In] equals the replyLength parameter provided in message handler
|
||||
registration (see XX_IpcRegisterMsgHandler() function), and
|
||||
[Out] should be updated by message handler to the actual reply length; if
|
||||
this value is set to zero, the IPC service must assume that a reply should
|
||||
not be sent;
|
||||
Note: If p_Reply is not NULL, p_ReplyLength must not be NULL as well.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
typedef t_Error (t_IpcMsgHandler)(t_Handle h_Module,
|
||||
uint8_t *p_Msg,
|
||||
uint32_t msgLength,
|
||||
uint8_t *p_Reply,
|
||||
uint32_t *p_ReplyLength);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_IpcRegisterMsgHandler
|
||||
|
||||
@Description IPC mailbox registration.
|
||||
|
||||
This function is used for registering an IPC message handler in the IPC service.
|
||||
This function is called by each destination endpoint to indicate that it is ready
|
||||
to handle incoming messages. The IPC service invokes the message handler upon receiving
|
||||
a message addressed to the specified destination endpoint.
|
||||
|
||||
@Param[in] addr - The address name string associated with the destination endpoint;
|
||||
This address must be unique across the IPC service domain to ensure
|
||||
correct message routing.
|
||||
@Param[in] f_MsgHandler - Pointer to the message handler callback for processing incoming
|
||||
message; invoked by the IPC service upon receiving a message
|
||||
addressed to the destination endpoint specified by the addr
|
||||
parameter.
|
||||
@Param[in] h_Module - Abstract handle to the message handling module, passed unchanged
|
||||
to f_MsgHandler callback function.
|
||||
@Param[in] replyLength - The maximal data length (in bytes) of any reply that the specified message handler
|
||||
may generate; the IPC service provides the message handler with buffer
|
||||
for reply according to the length specified here (refer also to the description
|
||||
of #t_IpcMsgHandler callback function type);
|
||||
This size shall be zero if the message handler never generates replies.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error XX_IpcRegisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH],
|
||||
t_IpcMsgHandler *f_MsgHandler,
|
||||
t_Handle h_Module,
|
||||
uint32_t replyLength);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_IpcUnregisterMsgHandler
|
||||
|
||||
@Description Release IPC mailbox routine.
|
||||
|
||||
This function is used for unregistering an IPC message handler from the IPC service.
|
||||
This function is called by each destination endpoint to indicate that it is no longer
|
||||
capable of handling incoming messages.
|
||||
|
||||
@Param[in] addr - The address name string associated with the destination endpoint;
|
||||
This address is the same as was used when the message handler was
|
||||
registered via XX_IpcRegisterMsgHandler().
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH]);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_IpcInitSession
|
||||
|
||||
@Description This function is used for creating an IPC session between the source endpoint
|
||||
and the destination endpoint.
|
||||
|
||||
The actual implementation and representation of a session is left for the IPC service.
|
||||
The function returns an abstract handle to the created session. This handle shall be used
|
||||
by the source endpoint in subsequent calls to XX_IpcSendMessage().
|
||||
The IPC service assumes that before this function is called, no messages are sent from
|
||||
the specified source endpoint to the specified destination endpoint.
|
||||
|
||||
The IPC service may use a connection-oriented approach or a connectionless approach (or both)
|
||||
as described below.
|
||||
|
||||
@par Connection-Oriented Approach
|
||||
|
||||
The IPC service may implement a session in a connection-oriented approach - when this function is called,
|
||||
the IPC service should take the necessary steps to bring up a source-to-destination channel for messages
|
||||
and a destination-to-source channel for replies. The returned handle should represent the internal
|
||||
representation of these channels.
|
||||
|
||||
@par Connectionless Approach
|
||||
|
||||
The IPC service may implement a session in a connectionless approach - when this function is called, the
|
||||
IPC service should not perform any particular steps, but it must store the pair of source and destination
|
||||
addresses in some session representation and return it as a handle. When XX_IpcSendMessage() shall be
|
||||
called, the IPC service may use this handle to provide the necessary identifiers for routing the messages
|
||||
through the connectionless medium.
|
||||
|
||||
@Param[in] destAddr - The address name string associated with the destination endpoint.
|
||||
@Param[in] srcAddr - The address name string associated with the source endpoint.
|
||||
|
||||
@Return Abstract handle to the initialized session, or NULL on error.
|
||||
*//***************************************************************************/
|
||||
t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH],
|
||||
char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH]);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_IpcFreeSession
|
||||
|
||||
@Description This function is used for terminating an existing IPC session between a source endpoint
|
||||
and a destination endpoint.
|
||||
|
||||
The IPC service assumes that after this function is called, no messages shall be sent from
|
||||
the associated source endpoint to the associated destination endpoint.
|
||||
|
||||
@Param[in] h_Session - Abstract handle to the IPC session - the same handle as was originally
|
||||
returned by the XX_IpcInitSession() function.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error XX_IpcFreeSession(t_Handle h_Session);
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function XX_IpcSendMessage
|
||||
|
||||
@Description IPC message send routine.
|
||||
|
||||
This function may be used by a source endpoint to send an IPC message to a destination
|
||||
endpoint. The source endpoint cannot send a message to the destination endpoint without
|
||||
first initiating a session with that destination endpoint via XX_IpcInitSession() routine.
|
||||
|
||||
The source endpoint must provide the buffer pointer and length of the outgoing message.
|
||||
Optionally, it may also provide a buffer for an expected reply. In the latter case, the
|
||||
transaction is not considered complete by the IPC service until the reply has been received.
|
||||
If the source endpoint does not provide a reply buffer, the transaction is considered
|
||||
complete after the message has been sent. The source endpoint must keep the message (and
|
||||
optional reply) buffers valid until the transaction is complete.
|
||||
|
||||
@par Non-blocking mode
|
||||
|
||||
The source endpoint may request a non-blocking send by providing a non-NULL pointer to a message
|
||||
completion callback function (f_Completion). Upon completion of the IPC transaction (consisting of a
|
||||
message and an optional reply), the IPC service invokes this callback routine to return the message
|
||||
buffer to the sender and to provide the received reply, if requested.
|
||||
|
||||
@par Blocking mode
|
||||
|
||||
The source endpoint may request a blocking send by setting f_Completion to NULL. The function is
|
||||
expected to block until the IPC transaction is complete - either the reply has been received or (if no reply
|
||||
was requested) the message has been sent.
|
||||
|
||||
@Param[in] h_Session - Abstract handle to the IPC session - the same handle as was originally
|
||||
returned by the XX_IpcInitSession() function.
|
||||
@Param[in] p_Msg - Pointer to message buffer to send.
|
||||
@Param[in] msgLength - Length (in bytes) of actual data in the message buffer.
|
||||
@Param[in] p_Reply - Pointer to reply buffer - if this buffer is not NULL, the IPC service
|
||||
fills this buffer with the received reply data;
|
||||
In blocking mode, the reply data must be valid when the function returns;
|
||||
In non-blocking mode, the reply data is valid when f_Completion is called;
|
||||
If this pointer is NULL, no reply is expected.
|
||||
@Param[in,out] p_ReplyLength - Pointer to reply length, which has a dual role in this function:
|
||||
[In] specifies the maximal length (in bytes) of the reply buffer pointed by
|
||||
p_Reply, and
|
||||
[Out] in non-blocking mode this value is updated by the IPC service to the
|
||||
actual reply length (in bytes).
|
||||
@Param[in] f_Completion - Pointer to a completion callback to be used in non-blocking send mode;
|
||||
The completion callback is invoked by the IPC service upon
|
||||
completion of the IPC transaction (consisting of a message and an optional
|
||||
reply);
|
||||
If this pointer is NULL, the function is expected to block until the IPC
|
||||
transaction is complete.
|
||||
@Param[in] h_Arg - Abstract handle to the sending module; passed unchanged to the f_Completion
|
||||
callback function as the first argument.
|
||||
|
||||
@Return E_OK on success; Error code otherwise.
|
||||
*//***************************************************************************/
|
||||
t_Error XX_IpcSendMessage(t_Handle h_Session,
|
||||
uint8_t *p_Msg,
|
||||
uint32_t msgLength,
|
||||
uint8_t *p_Reply,
|
||||
uint32_t *p_ReplyLength,
|
||||
t_IpcMsgCompletion *f_Completion,
|
||||
t_Handle h_Arg);
|
||||
|
||||
|
||||
/** @} */ /* end of xx_ipc group */
|
||||
/** @} */ /* end of xx_id group */
|
||||
|
||||
|
||||
#endif /* __XX_EXT_H */
|
||||
@@ -0,0 +1,40 @@
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
/* Module names for debug messages */
|
||||
const char *moduleStrings[] =
|
||||
{
|
||||
"???" /* MODULE_UNKNOWN */
|
||||
,"MEM" /* MODULE_ */
|
||||
,"MM" /* MODULE_MM */
|
||||
,"CORE" /* MODULE_CORE */
|
||||
,"P4080" /* MODULE_P4080 */
|
||||
,"P4080-Pltaform" /* MODULE_P4080_PLTFRM */
|
||||
,"PM" /* MODULE_PM */
|
||||
,"MMU" /* MODULE_MMU */
|
||||
,"MPIC" /* MODULE_MPIC */
|
||||
,"L3 cache (CPC)" /* MODULE_CPC */
|
||||
,"DUART" /* MODULE_DUART */
|
||||
,"SerDes" /* MODULE_SERDES */
|
||||
,"PIO" /* MODULE_PIO */
|
||||
,"QM" /* MODULE_QM */
|
||||
,"BM" /* MODULE_BM */
|
||||
,"SEC" /* MODULE_SEC */
|
||||
,"LA" /* MODULE_LA */
|
||||
,"LBC" /* MODULE_LBC */
|
||||
,"PAMU" /* MODULE_PAMU */
|
||||
,"FM" /* MODULE_FM */
|
||||
,"FM-MURAM" /* MODULE_FM_MURAM */
|
||||
,"FM-PCD" /* MODULE_FM_PCD */
|
||||
,"FM-RTC" /* MODULE_FM_RTC */
|
||||
,"FM-MAC" /* MODULE_FM_MAC */
|
||||
,"FM-Port" /* MODULE_FM_PORT */
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,297 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: Sec4Driver.h,v $ $Revision: 1.7.12.1 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/Sec4Driver.h,v $
|
||||
* $Author: jsheng $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Sec4Driver.h - Private/local include file for SEC4 security driver
|
||||
* Based on Sec2Driver.h for SEC2 security driver
|
||||
****************************************************************************
|
||||
* Copyright (c) 2003, 2004 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Mar 11,2011 Based on Sec2Driver.h v1.2
|
||||
* 1.1 Added IPSec using shared descriptors and queue interface
|
||||
*/
|
||||
|
||||
#ifndef SEC4DRIVER_H
|
||||
#define SEC4DRIVER_H
|
||||
|
||||
/* assume VXWORKS */
|
||||
|
||||
#include "iosLib.h"
|
||||
#include "msgQLib.h"
|
||||
#include "semLib.h"
|
||||
#include "signal.h"
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
#include <wrhv/vbi.h>
|
||||
#endif /* _WRS_CONFIG_WRHV_GUEST */
|
||||
|
||||
#define IVEC_TO_INUM(intVec) ((int) (intVec))
|
||||
#define INUM_TO_IVEC(intNum) ((VOIDFUNCPTR *) (intNum))
|
||||
|
||||
#define __vpa(pa) (pa)
|
||||
|
||||
|
||||
#include "Sec4.h"
|
||||
|
||||
#define VERSION "1.1"
|
||||
|
||||
#define SEC4_DEVNAME "sec4"
|
||||
/* Name for Processing Complete task */
|
||||
#define SEC4_PC_TASKNAME "tSEC4_pc"
|
||||
|
||||
/* Interrupt for Job queues of the SEC4 */
|
||||
#ifdef _WRS_CONFIG_BSP_FSL_P1010_RDB
|
||||
#define INUM_SEC4_BASE (12 + 29) /* Job queue 0 in SEC4 core is wired to #29 within the P1010 */
|
||||
#elif defined(_WRS_CONFIG_BSP_FSL_P4080_DS) || defined(_WRS_CONFIG_BSP_WRSBCP4080)
|
||||
#define INUM_SEC4_BASE (16 + 72) /* Job queue 0 in SEC4 core is wired to #72 within the P4080 */
|
||||
#define INUM_SEC4_JQ0 (INUM_SEC4_BASE)
|
||||
#define INUM_SEC4_JQ1 (INUM_SEC4_BASE + 1)
|
||||
#define INUM_SEC4_JQ2 (INUM_SEC4_BASE + 2)
|
||||
#define INUM_SEC4_JQ3 (INUM_SEC4_BASE + 3)
|
||||
#endif
|
||||
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* When we are on top of a hypervisor, this can't be extracted by sysGetPeripheralBase() */
|
||||
/* This address should correspond to the CCSBAR */
|
||||
#define PERIPHERAL_BASE (0xFE000000ULL)
|
||||
#endif
|
||||
|
||||
/* Define an offset from the peripheral base register where the core */
|
||||
/* should be located relative to */
|
||||
#ifdef _WRS_CONFIG_BSP_FSL_P1010_RDB
|
||||
#define SEC4X_BASE_OFFSET (0x00030000)
|
||||
#elif defined(_WRS_CONFIG_BSP_FSL_P4080_DS) || defined(_WRS_CONFIG_BSP_WRSBCP4080)
|
||||
#define SEC4X_BASE_OFFSET (0x00300000)
|
||||
#endif
|
||||
|
||||
/* Offset relative to SEC4X_BASE_OFFSET for job queues */
|
||||
#define SEC4X_JQ_BASE_SIZE (0x1000)
|
||||
#define SEC4X_JQ0_BASE_OFFSET (0x1000)
|
||||
#define SEC4X_JQ1_BASE_OFFSET (SEC4X_JQ0_BASE_OFFSET + (1 * SEC4X_JQ_BASE_SIZE))
|
||||
#define SEC4X_JQ2_BASE_OFFSET (SEC4X_JQ0_BASE_OFFSET + (2 * SEC4X_JQ_BASE_SIZE))
|
||||
#define SEC4X_JQ3_BASE_OFFSET (SEC4X_JQ0_BASE_OFFSET + (3 * SEC4X_JQ_BASE_SIZE))
|
||||
#define SEC4X_NOOF_JOB_QUEUES (4)
|
||||
|
||||
/* Offset relative to SEC4X_BASE_OFFSET for queue interface */
|
||||
#define SEC4X_QI_BASE_OFFSET (0x00007000)
|
||||
/* SEC 4 Job Queue ID */
|
||||
#define SEC4X_JQ0_ID (0)
|
||||
#define SEC4X_JQ1_ID (1)
|
||||
#define SEC4X_JQ2_ID (2)
|
||||
#define SEC4X_JQ3_ID (3)
|
||||
|
||||
/* Maximum number of cores using SEC4 */
|
||||
#define SEC4_MAXNOOF_CORES (7)
|
||||
|
||||
/* Spin lock IDs to protect shared between cores objects */
|
||||
#ifdef SEC4_USE_QI
|
||||
#define SEC4_SA_CACHE_SPINLOCK_ID (3)
|
||||
#endif
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
#define SEC4_SH_JQ_SPINLOCK_ID (4)
|
||||
#endif
|
||||
|
||||
/* Default IPsec SA cache size (may be altered during run-time) */
|
||||
#define SEC4_IPSEC_NOOF_SA_CACHE_ENTRIES_DEFAULT (256)
|
||||
/*
|
||||
* Debug message type enabler switches for SEC4DebugLevel:
|
||||
* DBGTXT_SETRQ - all messages from request setups
|
||||
* DBGTXT_SVCRQ - all messages from request servicing
|
||||
* DBGTXT_INITDEV - all messages from initialization
|
||||
* DBGTXT_DESCSHOW - content of each DPD before it's queued
|
||||
* DBGTXT_INFO - general driver information messages
|
||||
*/
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DBGTXT_SETRQ ((unsigned long)0x00000001)
|
||||
#define DBGTXT_SVCRQ ((unsigned long)0x00000002)
|
||||
#define DBGTXT_INITDEV ((unsigned long)0x00000004)
|
||||
#define DBGTXT_DESCSHOW ((unsigned long)0x00000008)
|
||||
#define DBGTXT_INFO ((unsigned long)0x00000010)
|
||||
#define DBGTXT_INTERPEAK ((unsigned long)0x00000020)
|
||||
#define DBGTXT_ERROR ((unsigned long)0x00000040)
|
||||
extern unsigned long SEC4DebugLevel;
|
||||
|
||||
#define SEC4Dump(LEVEL,STRING) \
|
||||
do { \
|
||||
unsigned long _level = (LEVEL); \
|
||||
if ((_level == 0)||(SEC4DebugLevel & _level)) { \
|
||||
printf STRING; \
|
||||
} \
|
||||
} while (0)
|
||||
#define SEC4DbgDo(LEVEL,FUNCTION) \
|
||||
do { \
|
||||
unsigned long _level = (LEVEL); \
|
||||
if ((_level == 0)||(SEC4DebugLevel & _level)) { \
|
||||
FUNCTION; \
|
||||
} \
|
||||
} while (0)
|
||||
#else
|
||||
#define SEC4Dump(LEVEL,STRING)
|
||||
#define SEC4DbgDo(LEVEL,FUNCTION)
|
||||
#endif
|
||||
|
||||
#define IOLockJobEnqueue() (void) semTake(JobEnqueueSemId, WAIT_FOREVER)
|
||||
#define IOUnLockJobEnqueue() (void) semGive(JobEnqueueSemId)
|
||||
|
||||
#define IO_STATUS int
|
||||
|
||||
/*! \def PROCESSING_COMPLETE_PRIORITY
|
||||
\brief #ProcessingComplete() Task priority
|
||||
*/
|
||||
#define PROCESSING_COMPLETE_PRIORITY (3)
|
||||
|
||||
/*! \def PROCESSING_COMPLETE_STACKSIZE
|
||||
\brief #ProcessingComplete() Task stack size
|
||||
*/
|
||||
/* #define PROCESSING_COMPLETE_STACKSIZE (2048) */
|
||||
#define PROCESSING_COMPLETE_STACKSIZE (4096)
|
||||
|
||||
#ifdef SEC4_POLLED_MODE
|
||||
/*! \def POLL_COMPLETE_PRIORITY
|
||||
\brief #PollComplete() Task priority
|
||||
*/
|
||||
#define POLL_COMPLETE_PRIORITY (3)
|
||||
/*! \def POLL_COMPLETE_STACKSIZE
|
||||
\brief #PollComplete() Task stack size
|
||||
*/
|
||||
#define POLL_COMPLETE_STACKSIZE (4096)
|
||||
#endif
|
||||
|
||||
/* SEC4 core values as presented in version register (SECVID) */
|
||||
#define SEC4_COREID (0x00000a10)
|
||||
|
||||
|
||||
typedef struct completed_job{
|
||||
int jobStatus;
|
||||
GENERIC_REQ *req;
|
||||
} COMPLETED_JOB;
|
||||
|
||||
|
||||
/* SEC4_GLOBAL
|
||||
A definition used to control allocation and referencing
|
||||
of global variables.
|
||||
|
||||
When the definition is not set it is considered
|
||||
to be used as a reference (extern is prepended).
|
||||
|
||||
When the definition is set (to nothing) it is considered to be
|
||||
allocating the global variable. This is done in one place
|
||||
only. In init.c
|
||||
*/
|
||||
|
||||
#ifndef SEC4_GLOBAL
|
||||
#define SEC4_GLOBAL extern
|
||||
#endif
|
||||
|
||||
/*! \var SEM_ID JobEnqueueSemId
|
||||
\brief A global variable which is used as a mutual exclusion
|
||||
semaphore for enqueueing jobs to the SEC4 engine.
|
||||
|
||||
The variable is not used directly. It used by calling
|
||||
#IOLockJobEnqueue() to lock and #IOUnLockJobEnqueue()
|
||||
to unlock.
|
||||
*/
|
||||
SEC4_GLOBAL SEM_ID JobEnqueueSemId;
|
||||
|
||||
/* The queue identifier is used to queue register values read by the
|
||||
ISR (#InterruptServiceRoutine()) to the deferred interrupt process
|
||||
routine (#ProcessingComplete())
|
||||
*/
|
||||
SEC4_GLOBAL MSG_Q_ID IsrMsgQId;
|
||||
|
||||
/* OS's identification of the device*/
|
||||
SEC4_GLOBAL int driverNum;
|
||||
|
||||
/*! \var DEV_HDR vxworksDrvDev
|
||||
\brief Used in driver startup.
|
||||
*/
|
||||
SEC4_GLOBAL DEV_HDR vxworksDrvDev;
|
||||
|
||||
/* coremask holds the core ID register for version/feature control */
|
||||
SEC4_GLOBAL unsigned long coremask;
|
||||
|
||||
/* Register driver and it's handlers with the OS */
|
||||
IO_STATUS IORegisterDriver(void);
|
||||
|
||||
/* Set up internal driver semaphores */
|
||||
void IOInitSemaphores(void);
|
||||
|
||||
/* Initialize driver queues */
|
||||
IO_STATUS IOInitQs(uint16_t size);
|
||||
|
||||
/* Enable/Disable the hardware interrupt */
|
||||
IO_STATUS IOConnectInterrupt(void);
|
||||
void IODisconnectInterrupt(void);
|
||||
|
||||
/* Open a new connection to this driver */
|
||||
int SEC4Open(DEV_HDR *, int, int);
|
||||
|
||||
/* Close a connection to this driver */
|
||||
int SEC4Close(int);
|
||||
|
||||
/* Request a driver operation*/
|
||||
int SEC4_ioctl(int, register int, register void *);
|
||||
|
||||
/* Driver's top level ISR handler */
|
||||
void InterruptServiceRoutine(t_Handle h_App,
|
||||
void* p_JobDesc,
|
||||
t_Handle h_Context,
|
||||
uint32_t jobStatus);
|
||||
|
||||
/* ISR's Deferred processing (bottom half) handler */
|
||||
extern void ProcessingComplete(void);
|
||||
|
||||
#ifdef SEC4_POLLED_MODE
|
||||
extern void PollComplete(void);
|
||||
#endif
|
||||
|
||||
/* Take a user request, build a job descriptor, and submit it for processing */
|
||||
int ProcessRequest(GENERIC_REQ *req, int callingTaskId);
|
||||
|
||||
/* Get current values of SEC4 status registers. */
|
||||
int GetStatus(STATUS_REQ *pStatus, int callingTaskId);
|
||||
|
||||
#ifdef SEC4_USE_QI
|
||||
int SEC4_ipsec_esp_encrypt(uint16_t sa_index, uint8_t *buf, uint16_t inOffset, uint16_t pktlen,
|
||||
uint16_t outOffset, uint8_t poolId);
|
||||
int SEC4_ipsec_esp_decrypt(uint16_t sa_index, uint8_t *buf, uint16_t inOffset, uint16_t pktlen,
|
||||
uint16_t outOffset, uint8_t poolId);
|
||||
void SEC4_qportal_set(void *qportal);
|
||||
void SEC4_bportal_set(void *bportal, uint32_t poolId);
|
||||
void SEC4_qman_enqueue_fqix_base_set(uint32_t ixBase);
|
||||
void SEC4_qman_dequeue_fqix_set(uint32_t ixBaseEncrypt, uint32_t ixBaseDecrypt);
|
||||
int SEC4_populate_sa(uint32_t spi, uint8_t ipsecVer, uint8_t proto,
|
||||
e_IpsecAuthenAlg authAlg, e_IpsecCryptoAlg cryptoAlg,
|
||||
uint8_t *authKey, uint8_t authKeySize, uint8_t *cryptoKey,
|
||||
uint8_t cryptoKeySize, uint8_t *iv, uint16_t sa_index, int enc);
|
||||
void SEC4_ipsec_set_sa_cache_size(uint32_t noofEntries);
|
||||
void SEC4_ipsec_set_shm(void *p, uint32_t size);
|
||||
#endif /* SEC4_USE_QI */
|
||||
|
||||
#endif /* SEC4DRIVER_H */
|
||||
@@ -0,0 +1,116 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: Sec4Notify.h,v $ $Revision: 1.5 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/Sec4Notify.h,v $
|
||||
* $Author: dhessing $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Sec4Notify.h - ISR register transfer definitions for the SEC4.x
|
||||
* security core family
|
||||
* Based on Sec2Notify.h for SEC2.x family
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2000. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* Revision History:
|
||||
* 1.0 Mar 11,2011 - Based on Sec2Notify.h v1.2
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef SEC4NOTIFY_H
|
||||
#define SEC4NOTIFY_H
|
||||
|
||||
/*! \struct device_regs
|
||||
\brief A grouping of status and error indication registers
|
||||
*/
|
||||
typedef struct device_regs
|
||||
{
|
||||
/* Copy of status regs defined in t_SecStatRegs in sec_regs.h */
|
||||
uint64_t req_deq ; /* Number of Requests Dequeued */
|
||||
uint64_t ob_enc_req ; /* Number of Outbound Encrypt Requests */
|
||||
uint64_t ib_dec_req ; /* Number of Inbound Decrypt Requests */
|
||||
uint64_t ob_encrypt ; /* Number of Outbound Bytes Encrypted */
|
||||
uint64_t ob_protect ; /* Number of Outbound Bytes Protected */
|
||||
uint64_t ib_decrypt ; /* Number of Inbound Bytes Decrypted */
|
||||
uint64_t ib_validated ; /* Number of Inbound Bytes Validated */
|
||||
/* uint8_t reserved0[104]; */ /* Offset+0x0038: Reserved */
|
||||
uint64_t crnr ; /* CHA Revision Number Register */
|
||||
uint64_t ctpr ; /* Compile Time Parameters Register */
|
||||
/* uint8_t reserved1[16] ; */ /* Offset+0x00B0: Reserved */
|
||||
uint64_t far ; /* Fault Address Register */
|
||||
uint32_t falr ; /* Fault Address LIODN Register */
|
||||
uint32_t fadr ; /* Fault Address Detail Register */
|
||||
/* uint8_t reserved2[4] ; */ /* Offset+0x00D0: Reserved */
|
||||
uint32_t sstar ; /* SEC 4.0 Status Register */
|
||||
/* uint8_t reserved3[8] ; */ /* Offset+0x00D8: Reserved */
|
||||
uint32_t rvidr ; /* RTIC Version ID Register */
|
||||
uint32_t ccbvidr ; /* CCB Version ID Register */
|
||||
uint64_t chavidr ; /* CHA Version ID Register */
|
||||
uint64_t chanumr ; /* CHA Number Register */
|
||||
uint64_t secvidr ; /* SEC 4.0 Version ID Register */
|
||||
|
||||
/* TODO: Include any info from t_SecJqRegs? */
|
||||
} DEVICE_REGS;
|
||||
|
||||
|
||||
/*! \struct STATUS_REQ
|
||||
\brief structure used to indicate the state of the SEC4 as well as the
|
||||
driver. Returned as a pointer by GetStatus()
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
DEVICE_REGS deviceregs;
|
||||
} STATUS_REQ;
|
||||
|
||||
typedef STATUS_REQ SEC4_STATUS;
|
||||
|
||||
typedef void* PSEC4_NOTIFY_CTX;
|
||||
|
||||
/*! \struct SEC4_NOTIFY_ON_ERROR_CTX
|
||||
\brief structure used in all requests to indicate the nature
|
||||
of errors.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
unsigned long errorcode; /*!< Error that
|
||||
the request generated
|
||||
*/
|
||||
void *request; /*!< Pointer to
|
||||
original request
|
||||
*/
|
||||
/* STATUS_REQ driverstatus; TODO: Should we provide info to the user here, as in SEC2? */ /*!< Detailed information
|
||||
as to the state of the
|
||||
hardware and the driver
|
||||
at the time of an error
|
||||
*/
|
||||
} SEC4_NOTIFY_ON_ERROR_CTX, *PSEC4_NOTIFY_ON_ERROR_CTX;
|
||||
|
||||
|
||||
typedef void (*PSEC4_NOTIFY_ROUTINE) (PSEC4_NOTIFY_CTX pCtx);
|
||||
|
||||
typedef void (*PSEC4_NOTIFY_ON_ERROR_ROUTINE) (PSEC4_NOTIFY_ON_ERROR_CTX pErrCtx);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,655 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: sec4_init.c,v $ $Revision: 1.7 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/sec4_init.c,v $
|
||||
* $Author: dhessing $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* sec4_init.c -- The Initialization code for SEC4 Driver
|
||||
* Based on sec2_init.c for SEC2 Driver
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Mar 11,2011 - Based on sec2_init.c v1.2
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
#include <taskLib.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#include "Sec4Driver.h"
|
||||
#include <sec_dcl_ext.h>
|
||||
#include <sec_jq_ext.h>
|
||||
#ifdef SEC4_USE_QI
|
||||
#include <sec_qi_ext.h>
|
||||
t_Error sec4_qi_init(void);
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Define module for errors reported from this file (as used in Netcomm SEC4 driver) */
|
||||
#define __ERR_MODULE__ MODULE_SEC
|
||||
|
||||
#ifdef DEBUG
|
||||
/*unsigned long SEC4DebugLevel = (DBGTXT_ERROR | DBGTXT_SETRQ | DBGTXT_SVCRQ | DBGTXT_INITDEV | DBGTXT_DESCSHOW | DBGTXT_INFO);*/
|
||||
unsigned long SEC4DebugLevel = (DBGTXT_INFO | DBGTXT_ERROR);
|
||||
/*unsigned long SEC4DebugLevel = (DBGTXT_INFO | DBGTXT_INITDEV | DBGTXT_ERROR);*/
|
||||
/*unsigned long SEC4DebugLevel = (DBGTXT_ERROR | DBGTXT_SETRQ | DBGTXT_SVCRQ | DBGTXT_INITDEV | DBGTXT_INFO);*/
|
||||
#else
|
||||
unsigned long SEC4DebugLevel = 0x0;
|
||||
#endif
|
||||
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* The packets shared memory area is retrieved and depends on the Hypervisor configuration
|
||||
* This name must match the name in that configuration */
|
||||
#define SEC4_WRHV_SHMEM_PACKETS_NAME "packets"
|
||||
/* The shared memory area for shared descriptors is retrieved and depends on the Hypervisor configuration
|
||||
* This name must match the name in that configuration */
|
||||
#define SEC4_WRHV_SHMEM_SHDESC_NAME "numa1"
|
||||
#endif
|
||||
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
/* Settings for pre-allocated memory buffers for descriptors and descriptor buffers */
|
||||
#define SEC_DCL_DESC_MEM_BUFSIZE (32)
|
||||
#define SEC_DCL_DESCBUF_MEM_BUFSIZE (128)
|
||||
#endif /* #ifdef SEC4_PREALLOC_DESC_BUF */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
t_Error sec4_jq_init(t_Handle *p_SecJobQueue, uint32_t jqId, uint8_t jqIrqCoalCnt,
|
||||
uint16_t jqIrqCoalTime, uint16_t jqIRSize, uint16_t jqORSize);
|
||||
#ifdef SEC4_USE_QI
|
||||
t_Error sec4_qi_init(void);
|
||||
t_Error sec4_fq_map_init(uint32_t coreIx);
|
||||
t_Error sec4_shm_init(uint32_t coreIx);
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Global handles */
|
||||
t_Handle h_Sec4;
|
||||
t_Handle h_SecDcl;
|
||||
t_Handle h_SecJobQueue;
|
||||
uint32_t sec4CoreId; /* Current core SEC4 ID */
|
||||
#ifdef SEC4_USE_QI
|
||||
t_Handle h_SecDclQi;
|
||||
t_Handle h_SecQi;
|
||||
|
||||
t_Handle h_sec4Shm; /* Handle to start of shared memory for objects needed during init */
|
||||
t_Handle h_sec4IpsecSaCache; /* IPsec SA cache handle*/
|
||||
t_Handle *p_sec4IpsecCacheHandle; /* pointer to IPsec SA cache handle */
|
||||
uint32_t sec4IpsecSaCacheNoofEntries = SEC4_IPSEC_NOOF_SA_CACHE_ENTRIES_DEFAULT;
|
||||
uint32_t **sec4IpsecSaFqMap; /* IPsec SA to frame queue per core map */
|
||||
uint32_t **p_sec4IpsecSaFqMap;
|
||||
#endif
|
||||
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
t_Handle **p_sec4JobQueueHandle = NULL; /* Pointer to shared job queue handle */
|
||||
t_sec4IpcMsg *sec4IpcVector = NULL; /* Used for master core to guest core messaging of job status */
|
||||
t_sec4IpcMsg **p_sec4IpcVector = NULL; /* For every core to find sec4IpcVector during init */
|
||||
#endif
|
||||
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* If we are on top of a Hypervisor we need to map physical to virtual addresses */
|
||||
/* The offset is retrieved during SEC4DriverInit() */
|
||||
physAddress_t sec4VirtualOffset = 0;
|
||||
/* Memory area for packets may have another offset.*/
|
||||
physAddress_t sec4VirtualOffsetPackets = 0;
|
||||
physAddress_t sec4PacketsBase = 0; /* Used to differentiate when to use sec4VirtualOffset vs sec4VirtualOffsetPackets */
|
||||
/* Memory area for shared descriptors may have another offset.*/
|
||||
physAddress_t sec4VirtualOffsetShDesc = 0;
|
||||
physAddress_t sec4ShDescBase = 0; /* Used to differentiate when to use sec4VirtualOffsetShDesc vs sec4VirtualOffsetPackets */
|
||||
#endif
|
||||
|
||||
static uint64_t sec4DeviceBaseAddr;
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 LOCAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
#ifdef SEC4_USE_QI
|
||||
/*************************************************************************
|
||||
* Function Name: sec4_qi_init
|
||||
* Purpose: Configures and initializes the SEC4 queue interface.
|
||||
*
|
||||
* Return: E_OK if everything passed, otherwise the error code
|
||||
*************************************************************************/
|
||||
t_Error sec4_qi_init(void)
|
||||
{
|
||||
t_SecQiParam secQiParam;
|
||||
t_SecQiCmdParam secQiCmdParam;
|
||||
t_Error status;
|
||||
|
||||
/* Config SEC4 QI (Queue Interface) */
|
||||
secQiParam.baseAddr = sec4DeviceBaseAddr + ((uint64_t) SEC4X_QI_BASE_OFFSET);
|
||||
secQiParam.h_Sec = h_Sec4;
|
||||
secQiParam.nonSeqLiodnBase = 0;
|
||||
secQiParam.nonSeqLiodnMask = 0;
|
||||
secQiParam.seqLiodnBase = 0;
|
||||
h_SecQi = SEC_QI_Config(&secQiParam);
|
||||
if(h_SecQi == NULL)
|
||||
{
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
|
||||
/* Configure SEC4 QI Commands */
|
||||
secQiCmdParam.deqByteCountThr = 0xffff; /* Don't limit no. of bytes to dequeue */
|
||||
secQiCmdParam.deqFrameCount = e_SEC_QI_FRAME_COUNT_MAXIMUM_3;
|
||||
secQiCmdParam.deqScheduling = e_SEC_QI_SCHEDULING_PRI_WITH_IC;
|
||||
secQiCmdParam.deqSpfCountThr = 0x7; /* Don't limit no. of frames for each sub-portal */
|
||||
secQiCmdParam.enqFrameColor = e_SEC_QI_FRAME_COLOR_OVERRIDE;
|
||||
status = SEC_QI_ConfigCommands(h_SecQi, &secQiCmdParam);
|
||||
if(E_OK != status)
|
||||
return status;
|
||||
|
||||
status = SEC_QI_Init(h_SecQi);
|
||||
if(E_OK != status)
|
||||
return status;
|
||||
|
||||
return SEC4_SUCCESS;
|
||||
}
|
||||
|
||||
/*************************************************************************
|
||||
* Function Name: sec4_shm_init
|
||||
* Purpose: Configures and initializes the SEC4 shared memory.
|
||||
* IPsec SA frame queue to core map, IPsec SA cache,
|
||||
* shared job queue handle.
|
||||
*
|
||||
* Return: E_OK if everything passed, otherwise the error code
|
||||
*************************************************************************/
|
||||
t_Error sec4_shm_init(uint32_t coreIx)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Pointers to handles in dedicated place in shared memory*/
|
||||
p_sec4IpsecCacheHandle = (t_Handle *) h_sec4Shm;
|
||||
p_sec4IpsecSaFqMap = (uint32_t **) ((uint32_t)h_sec4Shm + sizeof(h_sec4Shm));
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
p_sec4JobQueueHandle = (t_Handle **) ((uint32_t)p_sec4IpsecSaFqMap + sizeof(p_sec4IpsecSaFqMap));
|
||||
p_sec4IpcVector = (t_sec4IpcMsg **) ((uint32_t)p_sec4JobQueueHandle + sizeof(p_sec4JobQueueHandle));
|
||||
#endif
|
||||
|
||||
if(coreIx == NCSW_MASTER_ID)
|
||||
{
|
||||
/* IPsec SA cache */
|
||||
h_sec4IpsecSaCache = (t_Handle) XX_MallocSmart(sec4IpsecSaCacheNoofEntries * sizeof(t_sec4IpsecSa), 1, 1);
|
||||
if(h_sec4IpsecSaCache == NULL)
|
||||
{
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
memset(h_sec4IpsecSaCache, 0, sec4IpsecSaCacheNoofEntries * sizeof(t_sec4IpsecSa));
|
||||
*p_sec4IpsecCacheHandle = h_sec4IpsecSaCache;
|
||||
|
||||
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
/* Initiate core to core message communication vector */
|
||||
sec4IpcVector = (t_sec4IpcMsg *) XX_MallocSmart(SEC4_MAXNOOF_CORES * sizeof(t_sec4IpcMsg), 1, 1);
|
||||
if(sec4IpcVector == NULL)
|
||||
{
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
for(i=0; i < SEC4_MAXNOOF_CORES; i++)
|
||||
{
|
||||
sec4IpcVector[i].state = SEC4_IPC_STATE_IDLE;
|
||||
sec4IpcVector[i].req = NULL;
|
||||
}
|
||||
*p_sec4IpcVector = sec4IpcVector;
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4 : sec4IpcVector initiated at 0x%x\n", sec4IpcVector));
|
||||
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/**/
|
||||
h_sec4IpsecSaCache = *p_sec4IpsecCacheHandle;
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4 : sec4IpsecSaCache is at 0x%x\n", h_sec4IpsecSaCache));
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
sec4IpcVector = *p_sec4IpcVector;
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4 : sec4IpcVector is at is at 0x%x\n", sec4IpcVector));
|
||||
#endif
|
||||
}
|
||||
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4 : IPsec SA cache is at 0x%x for %d entries\n",\
|
||||
h_sec4IpsecSaCache, sec4IpsecSaCacheNoofEntries));
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
/*************************************************************************
|
||||
* Function Name: sec4_fq_map_init
|
||||
* Purpose: Configures and initializes the SEC4 IPsec SA frame queue to
|
||||
* core map.
|
||||
*
|
||||
* Return: E_OK if everything passed, otherwise the error code
|
||||
*************************************************************************/
|
||||
t_Error sec4_fq_map_init(uint32_t coreIx)
|
||||
{
|
||||
int i;
|
||||
|
||||
if(coreIx == NCSW_MASTER_ID)
|
||||
{
|
||||
/* Allocate core local map of SA->FQ ID */
|
||||
if((sec4IpsecSaFqMap = XX_MallocSmart(sec4IpsecSaCacheNoofEntries * sizeof(uint32_t *), 1, 1)) == NULL)
|
||||
{
|
||||
SEC4Dump(DBGTXT_ERROR,("SEC4_populate_sa() :: Could not allocate memory for SA-> FQID map\n"));
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set global shared MAP */
|
||||
*p_sec4IpsecSaFqMap = sec4IpsecSaFqMap;
|
||||
|
||||
for(i = 0; i < sec4IpsecSaCacheNoofEntries; i++)
|
||||
{
|
||||
if((sec4IpsecSaFqMap[i] = XX_MallocSmart(SEC4_MAXNOOF_CORES * sizeof(uint32_t), 1, 1)) == NULL)
|
||||
{
|
||||
SEC4Dump(DBGTXT_ERROR,("SEC4_populate_sa() :: Could not allocate memory for SA-> FQID map core array\n"));
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
/* Clear map */
|
||||
memset(sec4IpsecSaFqMap[i], 0, SEC4_MAXNOOF_CORES * sizeof(uint32_t));
|
||||
}
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4 : IPsec SA to FQID map initiated at 0x%x\n", sec4IpsecSaFqMap));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set global shared MAP has been set and alloocated by master core */
|
||||
sec4IpsecSaFqMap = *p_sec4IpsecSaFqMap;
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4 : IPsec SA to FQID map at 0x%x\n", sec4IpsecSaFqMap));
|
||||
}
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/*************************************************************************
|
||||
* Function Name: sec4_jq_config
|
||||
* Purpose: Configure and init a SEC4 job queue handle.
|
||||
*
|
||||
* Return: E_OK if everything passed, otherwise the error code
|
||||
*************************************************************************/
|
||||
t_Error sec4_jq_init(t_Handle *p_SecJobQueue, uint32_t jqId, uint8_t jqIrqCoalCnt,
|
||||
uint16_t jqIrqCoalTime, uint16_t jqIRSize, uint16_t jqORSize)
|
||||
{
|
||||
t_SecJqParam jQParam;
|
||||
t_SecJqRingParam jQRingParam;
|
||||
t_SecJqIntrParam jQIntrParam;
|
||||
t_Error status;
|
||||
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
/* Only set up job queue 0 (needs to be done first!)
|
||||
* Everyone will share the same job queue */
|
||||
if(jqId != 0)
|
||||
{
|
||||
/* Assign shared handle */
|
||||
*p_SecJobQueue = *p_sec4JobQueueHandle;
|
||||
SEC4Dump(DBGTXT_INITDEV, ("sec4_jq_init() :: Using shared job queue at 0x%x\n", *p_SecJobQueue));
|
||||
return E_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Configure job queue parameters */
|
||||
jQParam.h_Sec = h_Sec4;
|
||||
jQParam.baseAddr = sec4DeviceBaseAddr + ((uint64_t) (SEC4X_JQ0_BASE_OFFSET + (jqId * SEC4X_JQ_BASE_SIZE)));
|
||||
jQParam.jobQueueId = jqId;
|
||||
jQParam.seqLiodnVal = 0;
|
||||
jQParam.nonSeqLiodnVal = 0;
|
||||
jQParam.f_Cbr = &InterruptServiceRoutine;
|
||||
jQParam.h_App = NULL; /* Not used */
|
||||
#ifdef SEC4_POLLED_MODE
|
||||
jQParam.irq = NO_IRQ;
|
||||
#else
|
||||
jQParam.irq = INUM_SEC4_BASE + jqId;
|
||||
#endif
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
jQParam.memId = 1;
|
||||
#else
|
||||
jQParam.memId = 0;
|
||||
#endif
|
||||
|
||||
SEC4Dump(DBGTXT_INFO, ("sec4_jq_init() :: Using SEC4 job queue %d\n", jQParam.jobQueueId));
|
||||
|
||||
/* Configure and init SEC4 job queue */
|
||||
*p_SecJobQueue = SEC_JQ_Config(&jQParam);
|
||||
if(NULL == *p_SecJobQueue)
|
||||
{
|
||||
SEC4Dump(DBGTXT_INITDEV, ("sec4_jq_init() :: SEC_JQ_Config() failed\n"));
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
SEC4Dump(DBGTXT_INITDEV, ("sec4_jq_init() :: *p_SecJobQueue=0x%x\n", *p_SecJobQueue));
|
||||
|
||||
/* Input ring configuration */
|
||||
jQRingParam.len = jqIRSize;
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
/* Job queue rings in shared memory */
|
||||
jQRingParam.memId = 1;
|
||||
#else
|
||||
/* Job queue rings in private memory */
|
||||
jQRingParam.memId = 0;
|
||||
#endif
|
||||
status = SEC_JQ_ConfigInputRing(*p_SecJobQueue, &jQRingParam);
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
SEC4Dump(DBGTXT_INITDEV, ("sec4_jq_init() :: Job queue input ring size=%d\n", jQRingParam.len));
|
||||
/* Output ring configuration */
|
||||
jQRingParam.len = jqORSize;
|
||||
status = SEC_JQ_ConfigOutputRing(*p_SecJobQueue, &jQRingParam);
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
SEC4Dump(DBGTXT_INITDEV, ("sec4_jq_init() :: Job queue output ring size=%d\n", jQRingParam.len));
|
||||
/* Interrupt coalescing configuration */
|
||||
jQIntrParam.jobCountThr = jqIrqCoalCnt;
|
||||
jQIntrParam.ticCountThr = jqIrqCoalTime;
|
||||
status = SEC_JQ_ConfigInterrupts(*p_SecJobQueue, &jQIntrParam);
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Init SEC4 job queue Interface */
|
||||
status = SEC_JQ_Init(*p_SecJobQueue);
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
*p_sec4JobQueueHandle = *p_SecJobQueue;
|
||||
#endif
|
||||
|
||||
SEC4Dump(DBGTXT_INITDEV, ("sec4_jq_init() :: Job queue irq coalescing: num=%d, time=%d SEC4 clock cycles\n", jQIntrParam.jobCountThr, jQIntrParam.ticCountThr * SEC_JQ_INTR_TIC_COUNT_THR_UNITS));
|
||||
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*************************************************************************
|
||||
* Function Name: SEC4DriverInit
|
||||
* Purpose: Configures and initializes the SEC4 driver and the SEC4 engine.
|
||||
*
|
||||
* Input: cpuId - Selects SEC4 job queue to use. Should be 0-3 (if not using shared job queue).
|
||||
* cpuId should be 0 for the core that should own the SEC4 and perform basic initialization
|
||||
* (corresponding to NCSW_MASTER_ID). For a single core system cpuId should always be 0.
|
||||
*
|
||||
* Return: SEC4_SUCCESS if everything passed, otherwise the error code
|
||||
*************************************************************************/
|
||||
int SEC4DriverInit(uint32_t cpuId, uint8_t jqIrqCoalCnt, uint16_t jqIrqCoalTime,
|
||||
uint16_t jqIRSize, uint16_t jqORSize)
|
||||
{
|
||||
t_SecParam sec4Param;
|
||||
t_SecDclParam secDclParam;
|
||||
t_SecDclParam secDclQiParam;
|
||||
t_Error status;
|
||||
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* For physical to virtual address translation when running on top of a hypervisor */
|
||||
void *vbPhys;
|
||||
uint32_t attr;
|
||||
uint32_t length;
|
||||
vbiStatus_t ret;
|
||||
vbiPhysAddr_t paddr;
|
||||
#endif
|
||||
|
||||
/* Check prior initialization, and initialize driver per OS convention */
|
||||
if (taskIdVerify (taskNameToId (SEC4_PC_TASKNAME)) == OK) {
|
||||
SEC4Dump(DBGTXT_INFO, ("Security Processor already initialized\n"));
|
||||
return SEC4_SUCCESS;
|
||||
}
|
||||
|
||||
/* Init SEC4 parameters */
|
||||
|
||||
/* Set guestId. Only one core may "own" the SEC4 for init etc. */
|
||||
#ifndef SEC4_USE_SHARED_JOB_QUEUE
|
||||
if(cpuId > (SEC4X_NOOF_JOB_QUEUES - 1))
|
||||
{
|
||||
SEC4Dump(DBGTXT_ERROR, ("SEC4DriverInit() :: No job queue available for cpuId=%d\n", cpuId));
|
||||
return SEC4_JQ_NOT_AVAIL;
|
||||
}
|
||||
#endif
|
||||
if(cpuId == NCSW_MASTER_ID)
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: This core is master of the SEC4\n"));
|
||||
else
|
||||
{
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: This core has SEC4 guestId %d\n", cpuId));
|
||||
}
|
||||
sec4CoreId = cpuId;
|
||||
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* If we are on top of a Hypervisor we need to map virtual to physical addresses */
|
||||
/* Get virtual to physical address offset */
|
||||
vbPhys = (void *) 1; /* Use any address here as VxWorks has the same offset for any address */
|
||||
ret = vbiGuestDmaAddrGet((vbiGuestPhysAddr_t)vbPhys, &paddr);
|
||||
sec4VirtualOffset = (uint32_t)((uint64_t)paddr - (uint64_t)vbPhys);
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: Using 0x%x offset for virtual to physical address translation\n",((uint32_t)sec4VirtualOffset)));
|
||||
|
||||
/* Another offset is needed for packets TODO: Improve this solution!*/
|
||||
char *name = SEC4_WRHV_SHMEM_PACKETS_NAME;
|
||||
vbiShmemRegionFind((int8_t *)name, &vbPhys, &length, &attr);
|
||||
sec4PacketsBase = (physAddress_t) vbPhys;
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: Base address for packets is 0x%x\n",((uint32_t)sec4PacketsBase)));
|
||||
ret = vbiGuestDmaAddrGet((vbiGuestPhysAddr_t)vbPhys, &paddr);
|
||||
sec4VirtualOffsetPackets = (physAddress_t)((uint64_t)vbPhys - (uint64_t)paddr);
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: Using 0x%x offset for virtual to physical address translation for packets\n",((uint32_t)sec4VirtualOffsetPackets)));
|
||||
|
||||
/* Another offset is needed for shared descriptors TODO: Improve this solution!*/
|
||||
char name2[] = SEC4_WRHV_SHMEM_SHDESC_NAME;
|
||||
vbiShmemRegionFind((int8_t *)name2, &vbPhys, &length, &attr);
|
||||
sec4ShDescBase = (physAddress_t) vbPhys;
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: Base address for shared descriptors is 0x%x\n",((uint32_t)sec4ShDescBase)));
|
||||
ret = vbiGuestDmaAddrGet((vbiGuestPhysAddr_t)vbPhys, &paddr);
|
||||
sec4VirtualOffsetShDesc = (physAddress_t)((uint64_t)vbPhys - (uint64_t)paddr);
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: Using 0x%x offset for virtual to physical address translation for shared descriptors\n",((uint32_t)sec4VirtualOffsetShDesc)));
|
||||
|
||||
/* We need to get the address for accessing the Pheripheral IO devices as we are on top of a hypervisor*/
|
||||
sec4DeviceBaseAddr = ((uint64_t) PERIPHERAL_BASE) + ((uint64_t)SEC4X_BASE_OFFSET);
|
||||
#else
|
||||
/* sysGetPeripheralBase() gets the CCSBAR from the OS */
|
||||
sec4DeviceBaseAddr = ((uint64_t) sysGetPeripheralBase()) + ((uint64_t)SEC4X_BASE_OFFSET);
|
||||
#endif
|
||||
|
||||
sec4Param.guestId = sec4CoreId;
|
||||
sec4Param.baseAddr = sec4DeviceBaseAddr;
|
||||
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4DriverInit() :: SEC4 Base Address=0x%08lx\n", (uint32_t) sec4Param.baseAddr));
|
||||
|
||||
h_Sec4 = SEC_Config(&sec4Param);
|
||||
if (NULL == h_Sec4)
|
||||
{
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4DriverInit() :: Error. SEC_Config() failed\n"));
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
status = SEC_Init(h_Sec4);
|
||||
if (E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
if(sec4Param.guestId != NCSW_MASTER_ID)
|
||||
{
|
||||
/* Wait for Master to initialize SEC4 before proceeding */
|
||||
while (SEC_GetPtrSize(h_Sec4) != sizeof(uint64_t)); /* TODO Better way for this!! */
|
||||
}
|
||||
|
||||
#if defined(SEC4_USE_QI) || defined (SEC4_USE_SHARED_JOB_QUEUE)
|
||||
/* Initialize shared memory */
|
||||
if((status = sec4_shm_init(sec4Param.guestId)) != E_OK)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Config and init DCL for jobs for job queue */
|
||||
secDclParam.alignment = 4;
|
||||
secDclParam.h_Sec = h_Sec4;
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
/* All descriptors must be accessible from master core as well (during job dequeue from SEC4) */
|
||||
secDclParam.memId = 1;
|
||||
#else
|
||||
secDclParam.memId = 0;
|
||||
#endif
|
||||
secDclParam.postfixSize = 0; /* No additional data after the actual descriptor */
|
||||
secDclParam.prefixSize = sizeof(t_Handle); /* Needed For h_Sec4 Handle (driver internal sec_jq.c) */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
secDclParam.descSize = SEC_DCL_DESC_MEM_BUFSIZE;
|
||||
secDclParam.descBufSize = SEC_DCL_DESCBUF_MEM_BUFSIZE;
|
||||
secDclParam.noofBuf = 16 + (jqIRSize + jqORSize); /* Total queue capabillities and some additional */
|
||||
#endif
|
||||
h_SecDcl = SEC_DCL_Config(&secDclParam);
|
||||
status = SEC_DCL_Init(h_SecDcl);
|
||||
if (E_OK != status)
|
||||
{
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4DriverInit() :: SEC_DCL_Init() failed\n"));
|
||||
return status;
|
||||
}
|
||||
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC 4.x Security Processor Core\n"));
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC 4.x Driver Version %s %s %s\n", VERSION, __DATE__,__TIME__));
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC 4 version: %d.%d\n", SEC_GetMajRevNum(h_Sec4), SEC_GetMinRevNum(h_Sec4)));
|
||||
SEC4DbgDo(DBGTXT_INITDEV, SEC_DumpRegisters(h_Sec4));
|
||||
|
||||
/* Initialize job queue */
|
||||
status = sec4_jq_init(&h_SecJobQueue, sec4Param.guestId, jqIrqCoalCnt, jqIrqCoalTime, jqIRSize, jqORSize);
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4DriverInit() :: h_SecJobQueue=0x%x\n", h_SecJobQueue));
|
||||
SEC4DbgDo(DBGTXT_INITDEV, SEC_JQ_DumpRegisters(h_SecJobQueue));
|
||||
|
||||
#ifdef SEC4_USE_QI
|
||||
/* Setup IPsec SA frame queue to core map */
|
||||
if((status = sec4_fq_map_init(sec4Param.guestId)) != E_OK)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Config and init DCL to be used for QI related descriptors */
|
||||
secDclQiParam.alignment = 4;
|
||||
secDclQiParam.h_Sec = h_Sec4;
|
||||
secDclQiParam.memId = 1; /* Use shared memory for shared descriptors */
|
||||
secDclQiParam.postfixSize = 0; /* No additional data after the actual descriptor */
|
||||
secDclQiParam.prefixSize = sizeof(t_SecPreHeader); /* Needed For pre-header, before shared descriptor */
|
||||
#ifdef SEC4_PREALLOC_DESC_BUF
|
||||
secDclQiParam.descSize = SEC_DCL_DESC_MEM_BUFSIZE;
|
||||
secDclQiParam.descBufSize = SEC_DCL_DESCBUF_MEM_BUFSIZE;
|
||||
secDclQiParam.noofBuf = sec4IpsecSaCacheNoofEntries + 8;
|
||||
#endif
|
||||
h_SecDclQi = SEC_DCL_Config(&secDclQiParam);
|
||||
status = SEC_DCL_Init(h_SecDclQi);
|
||||
if (E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Configure SEC Queue manager interface */
|
||||
if(sec4Param.guestId == NCSW_MASTER_ID)
|
||||
{
|
||||
status = sec4_qi_init();
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: SEC4 Queue Interface initiated\n"));
|
||||
SEC4DbgDo(DBGTXT_INITDEV, SEC_QI_DumpRegisters(h_SecQi));
|
||||
|
||||
/* Enable SEC Queue Interface */
|
||||
status = SEC_QI_Enable(h_SecQi);
|
||||
if(E_OK != status)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
SEC4Dump(DBGTXT_INFO, ("SEC4DriverInit() :: SEC_QI_Enabled\n"));
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Init semaphores */
|
||||
IOInitSemaphores();
|
||||
|
||||
/* Msg queue for completed jobs */
|
||||
if ((status = IOInitQs(jqIRSize + jqORSize)) != SEC4_SUCCESS)
|
||||
return status;
|
||||
|
||||
if ((status = IORegisterDriver()) != SEC4_SUCCESS)
|
||||
return status;
|
||||
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4DriverInit() return SEC4_SUCCESS!\n"));
|
||||
|
||||
return SEC4_SUCCESS;
|
||||
} /* end of DriverInit */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,152 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name $ $RCSfile $ $Revision $
|
||||
* $Source $
|
||||
* $Author $
|
||||
* $State $ $Locker $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
/****************************************************************************
|
||||
* sec4_io.c -- bus operations for SEC4 Driver.
|
||||
* Based on sec2_io.c for SEC2 Driver.
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003, 2004 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Mar 11,2011 - Based on sec2_io.c v1.2
|
||||
*/
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
#include <taskLib.h>
|
||||
#include "Sec4Driver.h"
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
SEM_ID JobEnqueueSemId;
|
||||
MSG_Q_ID IsrMsgQId;
|
||||
int driverNum;
|
||||
DEV_HDR vxworksDrvDev;
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 LOCAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
IO_STATUS IOInitQs(uint16_t size)
|
||||
{
|
||||
/* set up ISR/ProcessingComplete message queue */
|
||||
IsrMsgQId = msgQCreate(size, sizeof(COMPLETED_JOB), MSG_Q_FIFO);
|
||||
if (IsrMsgQId == NULL)
|
||||
return SEC4_VXWORKS_CANNOT_CREATE_QUEUE;
|
||||
|
||||
return SEC4_SUCCESS;
|
||||
}
|
||||
|
||||
IO_STATUS IORegisterDriver()
|
||||
{
|
||||
/* start ProcessComplete task, with high priority */
|
||||
if (taskSpawn (SEC4_PC_TASKNAME,
|
||||
PROCESSING_COMPLETE_PRIORITY,
|
||||
0,
|
||||
PROCESSING_COMPLETE_STACKSIZE,
|
||||
(FUNCPTR)ProcessingComplete,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0) == TASK_ID_ERROR)
|
||||
return (SEC4_UNKNOWN_ERROR);
|
||||
#ifdef SEC4_POLLED_MODE
|
||||
if (taskSpawn ("tSec4PT",
|
||||
POLL_COMPLETE_PRIORITY,
|
||||
0,
|
||||
POLL_COMPLETE_STACKSIZE,
|
||||
(FUNCPTR)PollComplete,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0) == TASK_ID_ERROR)
|
||||
return (SEC4_UNKNOWN_ERROR);
|
||||
#endif
|
||||
|
||||
/* add the driver to the driver table */
|
||||
driverNum = iosDrvInstall(SEC4Open, NULL, SEC4Open, SEC4Close, NULL, NULL, SEC4_ioctl);
|
||||
if (driverNum < 0)
|
||||
return (SEC4_IO_VXWORKS_DRIVER_TABLE_ADD_ERROR);
|
||||
|
||||
(void) iosDevAdd(&vxworksDrvDev, vxworksDrvName, driverNum);
|
||||
|
||||
return (SEC4_SUCCESS);
|
||||
}
|
||||
|
||||
void IOInitSemaphores()
|
||||
{
|
||||
/* initialize semaphores */
|
||||
/* JobEnqueueSemId is for enqueueing jobs to the SEC4 Engine */
|
||||
JobEnqueueSemId = semBCreate(SEM_Q_PRIORITY, SEM_FULL);
|
||||
}
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,140 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: sec4_ioctl.c,v $ $Revision: 1.5 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/sec4_ioctl.c,v $
|
||||
* $Author: dhessing $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* sec4_ioctl.c - Driver service hooks for the SEC4.x security core
|
||||
* Based on sec2_ioctl.c for SEC2.x security core
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Mar 11,2011 - Based on sec2_ioctl.c v1.2
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <taskLib.h>
|
||||
#include "Sec4Driver.h"
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 LOCAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
int SEC4Open(DEV_HDR *pDevHdr, int mode, int flags)
|
||||
{
|
||||
return((int)pDevHdr);
|
||||
}
|
||||
|
||||
|
||||
int SEC4Close(int devDesc)
|
||||
{
|
||||
SEC4Dump(DBGTXT_INITDEV, ("SEC4Close() called\n"));
|
||||
return SEC4_SUCCESS;
|
||||
}
|
||||
|
||||
int SEC4_ioctl(int devDesc, register int ioctlCode, register void *param)
|
||||
{
|
||||
int status;
|
||||
|
||||
switch (ioctlCode)
|
||||
{
|
||||
case IOCTL_PROC_REQ:
|
||||
if (param == (int)NULL)
|
||||
{
|
||||
status = SEC4_INVALID_ADDRESS;
|
||||
break;
|
||||
}
|
||||
status = ProcessRequest((GENERIC_REQ *)param, (int)taskIdSelf());
|
||||
break;
|
||||
|
||||
case IOCTL_GET_STATUS:
|
||||
status = GetStatus((STATUS_REQ *)param, (int)taskIdSelf());
|
||||
break;
|
||||
|
||||
default:
|
||||
/* invalide IOCTL code, return an error */
|
||||
/* need OS-specific error value here */
|
||||
return (S_ioLib_UNKNOWN_REQUEST);
|
||||
} /* end switch (ioctlCode) */
|
||||
|
||||
return (status);
|
||||
}
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,798 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: sec4_request.c,v $ $Revision: 1.8.12.1 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/sec4_request.c,v $
|
||||
* $Author: jsheng $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* sec4_request.c - request/response handler
|
||||
* Based on sec2_request.c for SEC2 driver.
|
||||
****************************************************************************
|
||||
* Copyright (c) 2003-2005 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
/* Revision History:
|
||||
* 1.0 Mar 11,2011 - Based on sec2_request.c v1.2
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
#include <sec_ext.h>
|
||||
#include <sec_jq_ext.h>
|
||||
#include <sec_dcl_cmd.h>
|
||||
#include <sec_dcl.h>
|
||||
#include <sec_dcl_ipfreescale.h>
|
||||
#include "sec.h"
|
||||
#include "Sec4Driver.h"
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Define module for errors reported from this file (as used in SEC4 driver) */
|
||||
#define __ERR_MODULE__ MODULE_SEC
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
/* Global handles */
|
||||
SEC4_GLOBAL t_Handle h_Sec4;
|
||||
SEC4_GLOBAL t_Handle h_SecDcl;
|
||||
SEC4_GLOBAL t_Handle h_SecJobQueue;
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
SEC4_GLOBAL t_sec4IpcMsg *sec4IpcVector;
|
||||
SEC4_GLOBAL uint32_t sec4CoreId;
|
||||
#endif
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 LOCAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/********************************************************************************/
|
||||
/* Function Name: ProcessRequest */
|
||||
/* Purpose: To handle the IO request routine */
|
||||
/* Input: req - the pointer of the IO request */
|
||||
/* callingTaskId - the task Id */
|
||||
/* Output: req - the pointer of the IO request buffer */
|
||||
/* Return: SEC4_SUCCESS if success, otherwise error code */
|
||||
/********************************************************************************/
|
||||
int ProcessRequest(GENERIC_REQ *req, int callingTaskId)
|
||||
{
|
||||
t_Error status;
|
||||
t_Handle h_JobDesc;
|
||||
t_Handle h_Context;
|
||||
t_JobDescParam jobDescParam;
|
||||
t_IpsecJobDescParam ipsecJobDescParam;
|
||||
bool jobIsIpsec = FALSE;
|
||||
t_sec4SgtEntry *p_sec4Sgt;
|
||||
|
||||
SEC4Dump(DBGTXT_SETRQ, ("ProcessRequest(): taskId = 0x%x, opId = 0x%x\n", callingTaskId, req->opId));
|
||||
|
||||
/* Prepare parameters for SEC job descriptor */
|
||||
memset(&jobDescParam, 0, sizeof(t_JobDescParam));
|
||||
switch (req->opId)
|
||||
{
|
||||
case DPD_RNG_GETRN:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_RANDNUM;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((RNG_REQ *)req)->rngBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((RNG_REQ *)req)->rngData;
|
||||
break;
|
||||
case DPD_MD5_LDCTX_IDGS_HASH_PAD_ULCTX:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_MD5_DIGEST;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((HASH_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((HASH_REQ *)req)->inData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((HASH_REQ *)req)->outBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((HASH_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_MD5_LDCTX_HMAC_PAD_ULCTX:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_MD5_HMAC;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((HMAC_PAD_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((HMAC_PAD_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((HMAC_PAD_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((HMAC_PAD_REQ *)req)->inData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((HMAC_PAD_REQ *)req)->outBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((HMAC_PAD_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_SHA_LDCTX_IDGS_HASH_PAD_ULCTX:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_SHA1_DIGEST;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((HASH_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((HASH_REQ *)req)->inData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((HASH_REQ *)req)->outBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((HASH_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_SHA_LDCTX_HMAC_PAD_ULCTX:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_SHA1_HMAC;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((HMAC_PAD_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((HMAC_PAD_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((HMAC_PAD_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((HMAC_PAD_REQ *)req)->inData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((HMAC_PAD_REQ *)req)->outBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((HMAC_PAD_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_SDES_CBC_CTX_ENCRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_DES_CBC_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_SDES_CBC_CTX_DECRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_DES_CBC_DECRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_SDES_ECB_ENCRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_DES_ECB_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_SDES_ECB_DECRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_DES_ECB_DECRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_TDES_CBC_CTX_ENCRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_TDES_CBC_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_TDES_CBC_CTX_DECRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_TDES_CBC_DECRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->inIvData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_LOADCTX_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_TDES_ECB_ENCRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_TDES_ECB_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_TDES_ECB_DECRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_TDES_ECB_DECRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((DES_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DES_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DES_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.outData = (uint8_t *) ((DES_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_AESA_CBC_ENCRYPT_CRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_AES_CBC_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->inIvBytes;
|
||||
jobDescParam.outCtxDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->outCtxBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->inIvData;
|
||||
jobDescParam.outData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->outData;
|
||||
jobDescParam.outCtxData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->outCtxData;
|
||||
break;
|
||||
case DPD_AESA_CBC_DECRYPT_CRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_AES_CBC_DECRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->inIvBytes;
|
||||
jobDescParam.outCtxDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->outCtxBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->inIvData;
|
||||
jobDescParam.outData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->outData;
|
||||
jobDescParam.outCtxData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->outCtxData;
|
||||
break;
|
||||
case DPD_AESA_ECB_ENCRYPT_CRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_AES_ECB_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.outData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
case DPD_AESA_ECB_DECRYPT_CRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_AES_ECB_DECRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((AESA_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.outData = (uint8_t *) ((AESA_CRYPT_REQ *)req)->outData;
|
||||
break;
|
||||
/* RC4 stream cipher */
|
||||
case DPD_RC4_LDKEY_CRYPT_ULCTX:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_RC4_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((ARC4_LOADCTX_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) 0;
|
||||
jobDescParam.inData = (uint8_t *) ((ARC4_LOADCTX_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) NULL;
|
||||
jobDescParam.outData = (uint8_t *) ((ARC4_LOADCTX_CRYPT_REQ *)req)->outData;
|
||||
jobDescParam.outCtxDataBytes = (uint32_t) ((ARC4_LOADCTX_CRYPT_REQ *)req)->outCtxBytes;
|
||||
jobDescParam.outCtxData = (uint8_t *) ((ARC4_LOADCTX_CRYPT_REQ *)req)->outCtxData;
|
||||
break;
|
||||
case DPD_RC4_LDCTX_CRYPT_ULCTX:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_RC4_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) 0;
|
||||
jobDescParam.keyData = (uint8_t *) NULL;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((ARC4_LOADCTX_CRYPT_REQ *)req)->inBytes;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((ARC4_LOADCTX_CRYPT_REQ *)req)->inCtxBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((ARC4_LOADCTX_CRYPT_REQ *)req)->inData;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((ARC4_LOADCTX_CRYPT_REQ *)req)->inCtxData;
|
||||
jobDescParam.outData = (uint8_t *) ((ARC4_LOADCTX_CRYPT_REQ *)req)->outData;
|
||||
jobDescParam.outCtxDataBytes = (uint32_t) ((ARC4_LOADCTX_CRYPT_REQ *)req)->outCtxBytes;
|
||||
jobDescParam.outCtxData = (uint8_t *) ((ARC4_LOADCTX_CRYPT_REQ *)req)->outCtxData;
|
||||
break;
|
||||
case DPD_MM_SS_RSA_EXP:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_MODEXP;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((MOD_SS_EXP_REQ *)req)->expBytes;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((MOD_SS_EXP_REQ *)req)->aDataBytes;
|
||||
jobDescParam.modDataBytes = (uint32_t) ((MOD_SS_EXP_REQ *)req)->modBytes;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((MOD_SS_EXP_REQ *)req)->bDataBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((MOD_SS_EXP_REQ *)req)->expData;
|
||||
jobDescParam.inData = (uint8_t *) ((MOD_SS_EXP_REQ *)req)->aData;
|
||||
jobDescParam.modData = (uint8_t *) ((MOD_SS_EXP_REQ *)req)->modData;
|
||||
jobDescParam.outData = (uint8_t *) ((MOD_SS_EXP_REQ *)req)->bData;
|
||||
break;
|
||||
case DPD_802_11_CCMP_OUTBOUND:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_CCMP_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((CCMP_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((CCMP_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((CCMP_REQ *)req)->FrameDataBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((CCMP_REQ *)req)->FrameData;
|
||||
jobDescParam.MICDataBytes = (uint32_t) ((CCMP_REQ *)req)->MICBytes;
|
||||
jobDescParam.inMICData = (uint8_t *) ((CCMP_REQ *)req)->MICData;
|
||||
jobDescParam.AADDataBytes = (uint32_t) ((CCMP_REQ *)req)->AADBytes;
|
||||
jobDescParam.AADData = (uint8_t *) ((CCMP_REQ *)req)->AADData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((CCMP_REQ *)req)->cryptDataBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((CCMP_REQ *)req)->cryptDataOut;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((CCMP_REQ *)req)->ctxBytes;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((CCMP_REQ *)req)->context;
|
||||
break;
|
||||
case DPD_802_11_CCMP_INBOUND:
|
||||
/* TODO: Should this be supported? */
|
||||
break;
|
||||
case DPD_CHKSUM_CRC:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_CHKSUM_CRC;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((CHKSUM_CRC_REQ *)req)->inDataBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((CHKSUM_CRC_REQ *)req)->inData;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((CHKSUM_CRC_REQ *)req)->inCtxDataBytes;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((CHKSUM_CRC_REQ *)req)->inCtxData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((CHKSUM_CRC_REQ *)req)->crcOutBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((CHKSUM_CRC_REQ *)req)->crcOut;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((CHKSUM_CRC_REQ *)req)->crcOutBytes; /* Polynomial is always same size as crcOut */
|
||||
jobDescParam.keyData = (uint8_t *) ((CHKSUM_CRC_REQ *)req)->polynomialData;
|
||||
jobDescParam.options = (uint32_t) ((CHKSUM_CRC_REQ *)req)->crcOptions;
|
||||
break;
|
||||
case DPD_DMA:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_MOVE_DATA;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((DMA_REQ *)req)->inDataBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((DMA_REQ *)req)->inData;
|
||||
jobDescParam.outData = (uint8_t *) ((DMA_REQ *)req)->outData;
|
||||
jobDescParam.options = (uint32_t) ((DMA_REQ *)req)->options;
|
||||
break;
|
||||
case DPD_AESCCM_ENCRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_AESCCM_ENCRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((AESCCM_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((AESCCM_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((AESCCM_REQ *)req)->inDataBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((AESCCM_REQ *)req)->inData;
|
||||
jobDescParam.MICDataBytes = (uint32_t) ((AESCCM_REQ *)req)->MICBytes;
|
||||
jobDescParam.inMICData = (uint8_t *) ((AESCCM_REQ *)req)->inMICData;
|
||||
jobDescParam.outMICData = (uint8_t *) ((AESCCM_REQ *)req)->outMICData;
|
||||
jobDescParam.AADDataBytes = (uint32_t) ((AESCCM_REQ *)req)->AADBytes;
|
||||
jobDescParam.AADData = (uint8_t *) ((AESCCM_REQ *)req)->AADData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((AESCCM_REQ *)req)->outDataBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((AESCCM_REQ *)req)->outData;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((AESCCM_REQ *)req)->ctxBytes;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((AESCCM_REQ *)req)->ctx;
|
||||
jobDescParam.options = (uint32_t) ((AESCCM_REQ *)req)->options;
|
||||
break;
|
||||
case DPD_AESCCM_DECRYPT:
|
||||
jobDescParam.jobTypeId = e_DCL_JOB_AESCCM_DECRYPT;
|
||||
jobDescParam.keyDataBytes = (uint32_t) ((AESCCM_REQ *)req)->keyBytes;
|
||||
jobDescParam.keyData = (uint8_t *) ((AESCCM_REQ *)req)->keyData;
|
||||
jobDescParam.inDataBytes = (uint32_t) ((AESCCM_REQ *)req)->inDataBytes;
|
||||
jobDescParam.inData = (uint8_t *) ((AESCCM_REQ *)req)->inData;
|
||||
jobDescParam.MICDataBytes = (uint32_t) ((AESCCM_REQ *)req)->MICBytes;
|
||||
jobDescParam.inMICData = (uint8_t *) ((AESCCM_REQ *)req)->inMICData;
|
||||
jobDescParam.outMICData = (uint8_t *) ((AESCCM_REQ *)req)->outMICData;
|
||||
jobDescParam.AADDataBytes = (uint32_t) ((AESCCM_REQ *)req)->AADBytes;
|
||||
jobDescParam.AADData = (uint8_t *) ((AESCCM_REQ *)req)->AADData;
|
||||
jobDescParam.outDataBytes = (uint32_t) ((AESCCM_REQ *)req)->outDataBytes;
|
||||
jobDescParam.outData = (uint8_t *) ((AESCCM_REQ *)req)->outData;
|
||||
jobDescParam.inCtxDataBytes = (uint32_t) ((AESCCM_REQ *)req)->ctxBytes;
|
||||
jobDescParam.inCtxData = (uint8_t *) ((AESCCM_REQ *)req)->ctx;
|
||||
jobDescParam.options = (uint32_t) ((AESCCM_REQ *)req)->options;
|
||||
break;
|
||||
#ifdef IPIPSEC2
|
||||
case DPD_IPSEC_CBC_SDES_DECRYPT_MD5_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_DEC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
break;
|
||||
case DPD_IPSEC_CBC_SDES_ENCRYPT_MD5_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_ENC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
break;
|
||||
case DPD_IPSEC_CBC_SDES_DECRYPT_SHA_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_DEC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
break;
|
||||
case DPD_IPSEC_CBC_SDES_ENCRYPT_SHA_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_ENC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
break;
|
||||
case DPD_IPSEC_CBC_TDES_DECRYPT_MD5_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_DEC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_3DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
break;
|
||||
case DPD_IPSEC_CBC_TDES_ENCRYPT_MD5_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_ENC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_3DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
break;
|
||||
case DPD_IPSEC_CBC_TDES_DECRYPT_SHA_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_DEC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_3DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
break;
|
||||
case DPD_IPSEC_CBC_TDES_ENCRYPT_SHA_PAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_ENC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_3DES;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
break;
|
||||
case DPD_IPSEC_AES_CBC_DECRYPT_MD5_APAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_DEC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_AES_CBC;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
break;
|
||||
case DPD_IPSEC_AES_CBC_ENCRYPT_MD5_APAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_ENC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_AES_CBC;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
|
||||
break;
|
||||
case DPD_IPSEC_AES_CBC_DECRYPT_SHA_APAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_DEC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_AES_CBC;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
break;
|
||||
case DPD_IPSEC_AES_CBC_ENCRYPT_SHA_APAD:
|
||||
jobIsIpsec = TRUE;
|
||||
ipsecJobDescParam.jobTypeId = e_DCL_JOB_IPSEC;
|
||||
ipsecJobDescParam.jobDirection = e_DCL_JOB_ENC;
|
||||
ipsecJobDescParam.cryptoAlg = e_IPSEC_CRYPTO_ALG_AES_CBC;
|
||||
ipsecJobDescParam.authAlg = e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return ERROR_CODE(E_NOT_SUPPORTED);
|
||||
}
|
||||
|
||||
/* Create job descriptor */
|
||||
if(jobIsIpsec == TRUE)
|
||||
{
|
||||
ipsecJobDescParam.cryptoKeyData = ((IPSEC_CBC_REQ *)req)->cryptKeyData;
|
||||
ipsecJobDescParam.cryptoKeyDataBytes = ((IPSEC_CBC_REQ *)req)->cryptKeyBytes;
|
||||
ipsecJobDescParam.hashKeyDataBytes = ((IPSEC_CBC_REQ *)req)->hashKeyBytes;
|
||||
ipsecJobDescParam.hashKeyData = ((IPSEC_CBC_REQ *)req)->hashKeyData;
|
||||
ipsecJobDescParam.hashInDataBytes = ((IPSEC_CBC_REQ *)req)->hashInDataBytes;
|
||||
ipsecJobDescParam.hashInData = ((IPSEC_CBC_REQ *)req)->hashInData;
|
||||
ipsecJobDescParam.hashOutDataBytes = ((IPSEC_CBC_REQ *)req)->hashDataOutBytes;
|
||||
ipsecJobDescParam.hashOutData = ((IPSEC_CBC_REQ *)req)->hashDataOut;
|
||||
ipsecJobDescParam.inCtxData = ((IPSEC_CBC_REQ *)req)->cryptCtxInData;
|
||||
ipsecJobDescParam.inCtxDataBytes = ((IPSEC_CBC_REQ *)req)->cryptCtxInBytes;
|
||||
ipsecJobDescParam.outCtxData = NULL; /* Next packet IV is currently handled by caller */
|
||||
ipsecJobDescParam.outCtxDataBytes = 0;
|
||||
ipsecJobDescParam.inData = ((IPSEC_CBC_REQ *)req)->inData;
|
||||
ipsecJobDescParam.inDataBytes = ((IPSEC_CBC_REQ *)req)->inDataBytes;
|
||||
ipsecJobDescParam.outData = ((IPSEC_CBC_REQ *)req)->cryptDataOut - ipsecJobDescParam.hashInDataBytes;
|
||||
SEC4Dump(DBGTXT_SETRQ, ("SEC4 IPsec Job request params:\n"\
|
||||
" jobDirection: %u\n"\
|
||||
" cryptoAlg: %u\n"\
|
||||
" authAlg: %u\n"\
|
||||
" cryptoKeyDataBytes: %u\n"\
|
||||
" hashKeyDataBytes: %u\n"\
|
||||
" hashInDataBytes: %u\n"\
|
||||
" hashOutDataBytes: %u\n"\
|
||||
" inCtxDataBytes: %u\n"\
|
||||
" outCtxDataBytes: %u\n"\
|
||||
" inDataBytes: %u\n",\
|
||||
ipsecJobDescParam.jobDirection,\
|
||||
ipsecJobDescParam.cryptoAlg,\
|
||||
ipsecJobDescParam.authAlg,\
|
||||
ipsecJobDescParam.cryptoKeyDataBytes,\
|
||||
ipsecJobDescParam.hashKeyDataBytes,\
|
||||
ipsecJobDescParam.hashInDataBytes,\
|
||||
ipsecJobDescParam.hashOutDataBytes,\
|
||||
ipsecJobDescParam.inCtxDataBytes,\
|
||||
ipsecJobDescParam.outCtxDataBytes,\
|
||||
ipsecJobDescParam.inDataBytes));
|
||||
|
||||
h_JobDesc = SEC_DCL_InitIpsecJobDesc(h_SecDcl, &ipsecJobDescParam);
|
||||
}
|
||||
else
|
||||
{
|
||||
SEC4Dump(DBGTXT_SETRQ, ("SEC4 Job request params:\n"\
|
||||
" jobTypeId: %u\n"\
|
||||
" inDataBytes: %u\n"\
|
||||
" outDataBytes: %u\n"\
|
||||
" keyDataBytes: %u\n"\
|
||||
" inCtxDataBytes: %u\n"\
|
||||
" outCtxDataBytes: %u\n"\
|
||||
" modDataBytes: %u\n"\
|
||||
" MICDataBytes: %u\n"\
|
||||
" AADDataBytes: %u\n",
|
||||
jobDescParam.jobTypeId,\
|
||||
jobDescParam.inDataBytes,\
|
||||
jobDescParam.outDataBytes,\
|
||||
jobDescParam.keyDataBytes,\
|
||||
jobDescParam.inCtxDataBytes,\
|
||||
jobDescParam.outCtxDataBytes,\
|
||||
jobDescParam.modDataBytes,\
|
||||
jobDescParam.MICDataBytes,\
|
||||
jobDescParam.AADDataBytes));
|
||||
|
||||
h_JobDesc = SEC_DCL_InitJobDesc(h_SecDcl, &jobDescParam);
|
||||
}
|
||||
if(NULL == h_JobDesc)
|
||||
{
|
||||
SEC4Dump(DBGTXT_SETRQ,("SEC_JQ_Enqueue() :: Error creating jobDescriptor\n"));
|
||||
return ERROR_CODE(E_NO_MEMORY);
|
||||
}
|
||||
req->jobDesc = h_JobDesc;
|
||||
|
||||
/* Print descriptor */
|
||||
SEC4DbgDo(DBGTXT_DESCSHOW, SEC_DCL_DebugPrintDescriptor((t_Desc *)h_JobDesc));
|
||||
|
||||
/* Enqueue job to SEC engine*/
|
||||
h_Context = (t_Handle) req;
|
||||
IOLockJobEnqueue();
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
sec4IpcVector[sec4CoreId].state = SEC4_IPC_STATE_PENDING;
|
||||
sec4IpcVector[sec4CoreId].req = req;
|
||||
/* Update core ID in request to be able to get the job back to the same core */
|
||||
req->coreId = sec4CoreId;
|
||||
/* Protect the shared job queue while enqueueing job */
|
||||
sec4spinLockLock(SEC4_SH_JQ_SPINLOCK_ID);
|
||||
#endif
|
||||
status = SEC_JQ_Enqueue(h_SecJobQueue, (void *) ((t_Desc *)h_JobDesc)->p_Buffer, h_Context);
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
sec4spinLockUnlock(SEC4_SH_JQ_SPINLOCK_ID);
|
||||
#endif
|
||||
IOUnLockJobEnqueue();
|
||||
if(E_OK != status)
|
||||
{
|
||||
SEC4Dump(DBGTXT_SETRQ,("SEC_JQ_Enqueue() :: Error: 0x%x, from SEC_JQ_Enqueue\n", status));
|
||||
SEC_DCL_FreeDesc(h_JobDesc);
|
||||
return status;
|
||||
}
|
||||
|
||||
SEC4Dump(DBGTXT_SETRQ, ("SEC_JQ_Enqueue() :: h_Context=0x%x, h_JobDesc=0x%x, JobDescBuffer=0x%x\n", (uint32_t) h_Context, (uint32_t) h_JobDesc, ((t_Desc *)h_JobDesc)->p_Buffer));
|
||||
|
||||
return SEC4_SUCCESS;
|
||||
} /* end of ProcessRequest() */
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ProcessingComplete
|
||||
*===========================================================================
|
||||
* Description: Process completed jobs that is sent by the ISR.
|
||||
* Parameters:
|
||||
* Returns:
|
||||
*
|
||||
*/
|
||||
void ProcessingComplete(void)
|
||||
{
|
||||
static COMPLETED_JOB completedJob;
|
||||
GENERIC_REQ *pReq;
|
||||
static int jobStatus;
|
||||
COMPLETED_JOB *pCompletedJob = &completedJob;
|
||||
int i;
|
||||
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
/* Wait for vector to be initialized */
|
||||
while((volatile)(sec4IpcVector) == NULL)
|
||||
{
|
||||
taskDelay(10);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* we sit here forever, waiting for job completion messages from the ISR */
|
||||
for(;;)
|
||||
{
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
/* Poll shared vector for completed jobs */
|
||||
while((volatile)(sec4IpcVector[sec4CoreId].state) != SEC4_IPC_STATE_DONE)
|
||||
{
|
||||
taskDelay(1); /* TODO */
|
||||
}
|
||||
pReq = (GENERIC_REQ *)sec4IpcVector[sec4CoreId].req;
|
||||
jobStatus = pReq->status;
|
||||
/* Clear shared vector */
|
||||
sec4IpcVector[sec4CoreId].req = NULL;
|
||||
sec4IpcVector[sec4CoreId].state = SEC4_IPC_STATE_IDLE;
|
||||
#else
|
||||
/* Wait for job completion message from the ISR */
|
||||
if (msgQReceive(IsrMsgQId,
|
||||
(char*)pCompletedJob,
|
||||
sizeof(COMPLETED_JOB),
|
||||
WAIT_FOREVER) != sizeof(COMPLETED_JOB))
|
||||
{
|
||||
SEC4Dump(DBGTXT_ERROR,("ProcessingComplete() :: Error: msgQReceive errno = %d\n", errno));
|
||||
continue;
|
||||
}
|
||||
if(pCompletedJob == NULL)
|
||||
{
|
||||
SEC4Dump(DBGTXT_ERROR, ("ProcessingComplete() :: job error: pCompletedJob=NULL\n"));
|
||||
return;
|
||||
}
|
||||
pReq = pCompletedJob->req;
|
||||
if(pReq == NULL)
|
||||
{
|
||||
SEC4Dump(DBGTXT_ERROR, ("ProcessingComplete() :: job error: pReq=NULL\n"));
|
||||
pCompletedJob->jobStatus = SEC4_JOB_ERROR;
|
||||
return;
|
||||
}
|
||||
jobStatus = pCompletedJob->jobStatus;
|
||||
pReq->status = jobStatus;
|
||||
#endif
|
||||
|
||||
if((0 == jobStatus) && (pReq->jobDesc != NULL))
|
||||
{
|
||||
/* Job executed without errors */
|
||||
SEC4Dump(DBGTXT_SVCRQ, ("ProcessingComplete() :: job ok: jobDesc=0x%x, notifyCtx=0x%x, jobStatus=0x%x\n", pReq->jobDesc, pReq->pNotifyCtx, jobStatus));
|
||||
SEC4DbgDo(DBGTXT_DESCSHOW, SEC_DCL_DebugPrintDescriptor((t_Desc *) pReq->jobDesc));
|
||||
|
||||
/* Free job descriptor as its job is done*/
|
||||
SEC_DCL_FreeDesc((t_Handle *) (pReq->jobDesc));
|
||||
pReq->jobDesc = NULL;
|
||||
|
||||
/* Notify waiting context, that may now continue */
|
||||
if (pReq->notifyFlags & NOTIFY_IS_PID)
|
||||
{
|
||||
kill((long)(pReq->notify), SIGUSR1);
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((pReq->notify) != NULL)
|
||||
pReq->notify(pReq->pNotifyCtx);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Job had errors */
|
||||
pReq->status = SEC4_JOB_ERROR;
|
||||
SEC4Dump(DBGTXT_ERROR, ("ProcessingComplete() :: job error: jobDesc=0x%x, notifyCtx=0x%x, jobStatus=0x%x\n", (uint32_t) pReq->jobDesc, (uint32_t) pReq->pNotifyCtx, jobStatus));
|
||||
|
||||
SEC4DbgDo(DBGTXT_ERROR, SEC_PrintJobStatus(jobStatus));
|
||||
if(pReq->jobDesc != NULL)
|
||||
{
|
||||
SEC4DbgDo(DBGTXT_DESCSHOW, SEC_DCL_DebugPrintDescriptor((t_Desc *)pReq->jobDesc));
|
||||
/* Free job descriptor as its job is done*/
|
||||
SEC_DCL_FreeDesc((t_Handle *) (pReq->jobDesc));
|
||||
pReq->jobDesc = NULL;
|
||||
}
|
||||
|
||||
/* Notify waiting context, that may now continue */
|
||||
if (pReq->notifyFlags & NOTIFY_ERROR_IS_PID)
|
||||
{
|
||||
kill((long)(pReq->notify_on_error), SIGUSR2);
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((pReq->notify_on_error) != NULL)
|
||||
{
|
||||
/* (Error code may be decoded using SEC_DecodeJobStatus() )*/
|
||||
pReq->ctxNotifyOnErr.errorcode = jobStatus;
|
||||
pReq->ctxNotifyOnErr.request = pReq;
|
||||
|
||||
/* Call the handler */
|
||||
pReq->notify_on_error(&(pReq->ctxNotifyOnErr));
|
||||
}
|
||||
else
|
||||
{
|
||||
SEC4Dump(DBGTXT_ERROR, ("ProcessingComplete() :: Error: pReq->notify_on_error=NULL. Can not notify calling context\n"));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Dump job queue registers */
|
||||
SEC4DbgDo(DBGTXT_DESCSHOW, SEC_JQ_DumpRegisters(h_SecJobQueue));
|
||||
SEC4Dump(DBGTXT_SVCRQ, ("ProcessingComplete Done\n"));
|
||||
} /* if (message from queue) */
|
||||
} /* End of ProcessingComplete */
|
||||
|
||||
#ifdef SEC4_POLLED_MODE
|
||||
/*
|
||||
*===========================================================================
|
||||
* PollComplete
|
||||
*===========================================================================
|
||||
* Description: Poll SEC4 engine job queue for completed jobs.
|
||||
* They will call their job completion callback function.
|
||||
* Parameters:
|
||||
* Returns:
|
||||
*
|
||||
*/
|
||||
void PollComplete(void)
|
||||
{
|
||||
t_Error jobStatus;
|
||||
|
||||
/* we sit here forever, looking for job completion from the SEC job queue */
|
||||
for(;;)
|
||||
{
|
||||
taskDelay(1); /* TODO: What delay to use here? */
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
/* Only master core polls for completed jobs */
|
||||
if(sec4CoreId == NCSW_MASTER_ID)
|
||||
#endif
|
||||
{
|
||||
if(h_SecJobQueue != NULL)
|
||||
{
|
||||
jobStatus = SEC_JQ_Dequeue(h_SecJobQueue);
|
||||
if(jobStatus != E_OK)
|
||||
{
|
||||
SEC4DbgDo(DBGTXT_ERROR, ("PollComplete: Error: SEC_JQ_Dequeue returned %d\n", jobStatus));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif /* #ifdef SEC4_POLLED_MODE */
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* GetStatus
|
||||
*===========================================================================
|
||||
* Description: Get current values of SEC4 status registers.
|
||||
* Parameters:
|
||||
* Returns:
|
||||
*
|
||||
*/
|
||||
int GetStatus(STATUS_REQ *pStatus, int callingTaskId)
|
||||
{
|
||||
t_Sec* p_Sec = (t_Sec*)h_Sec4;
|
||||
t_SecStatRegs* p_SecStatCopy = (t_SecStatRegs*) pStatus;
|
||||
|
||||
/* Copy device registers */
|
||||
p_SecStatCopy->ccbvidr = p_Sec->p_MemMap->stat.ccbvidr;
|
||||
p_SecStatCopy->chanumr = p_Sec->p_MemMap->stat.chanumr;
|
||||
p_SecStatCopy->chavidr = p_Sec->p_MemMap->stat.chavidr;
|
||||
p_SecStatCopy->crnr = p_Sec->p_MemMap->stat.crnr;
|
||||
p_SecStatCopy->ctpr = p_Sec->p_MemMap->stat.ctpr;
|
||||
p_SecStatCopy->fadr = p_Sec->p_MemMap->stat.fadr;
|
||||
p_SecStatCopy->falr = p_Sec->p_MemMap->stat.falr;
|
||||
p_SecStatCopy->far = p_Sec->p_MemMap->stat.far;
|
||||
p_SecStatCopy->ib_dec_req = p_Sec->p_MemMap->stat.ib_dec_req;
|
||||
p_SecStatCopy->ib_decrypt = p_Sec->p_MemMap->stat.ib_decrypt;
|
||||
p_SecStatCopy->ib_validated = p_Sec->p_MemMap->stat.ib_validated;
|
||||
p_SecStatCopy->ob_enc_req = p_Sec->p_MemMap->stat.ob_enc_req;
|
||||
p_SecStatCopy->ob_encrypt = p_Sec->p_MemMap->stat.ob_encrypt;
|
||||
p_SecStatCopy->ob_protect = p_Sec->p_MemMap->stat.ob_protect;
|
||||
p_SecStatCopy->req_deq = p_Sec->p_MemMap->stat.req_deq;
|
||||
p_SecStatCopy->rvidr = p_Sec->p_MemMap->stat.rvidr;
|
||||
p_SecStatCopy->secvidr = p_Sec->p_MemMap->stat.secvidr;
|
||||
p_SecStatCopy->sstar = p_Sec->p_MemMap->stat.sstar;
|
||||
|
||||
return SEC4_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,147 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: sec4isr.c,v $ $Revision: 1.5 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/sec4isr.c,v $
|
||||
* $Author: dhessing $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* sec4isr.c -- The Interrupt Service code for SEC4 Driver
|
||||
* Based on sec2isr.c for SEC2 driver
|
||||
****************************************************************************
|
||||
* Copyright (c) Certicom Corp. 1996-2002. All rights reserved
|
||||
* Copyright (c) 2003, 2004 Freescale Semiconductor
|
||||
* All Rights Reserved. Proprietary and Confidential.
|
||||
*
|
||||
* NOTICE: The information contained in this file is proprietary
|
||||
* to Freescale Semiconductor, and is being made available to
|
||||
* Freescale's customers under strict license agreements.
|
||||
* Use or disclosure of this information is permissible only
|
||||
* under the terms of the existing license agreement.
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* Revision History:
|
||||
* 1.0 Mar 11,2011 - Based on sec2isr.c v1.2
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
#include "Sec4Driver.h"
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
SEC4_GLOBAL t_sec4IpcMsg *sec4IpcVector;
|
||||
SEC4_GLOBAL uint8_t sec4CoreId;
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 LOCAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/**************************************************************************
|
||||
* Function Name: InterruptServiceRoutine
|
||||
* Purpose: To handle interrupt from the SEC4 job queue
|
||||
* and call ProcessRequestDone routine
|
||||
* Input: Interrupt - PKINTERRUPT
|
||||
* Context - PVOID the request Context
|
||||
*
|
||||
|
||||
*************************************************************************/
|
||||
void InterruptServiceRoutine(t_Handle h_App,
|
||||
void* p_JobDesc,
|
||||
t_Handle h_Context,
|
||||
uint32_t jobStatus)
|
||||
{
|
||||
static COMPLETED_JOB completedJob;
|
||||
COMPLETED_JOB *pCompletedJob = &completedJob;
|
||||
STATUS msgQStatus;
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
uint32_t submittingCoreID = 0;
|
||||
#endif
|
||||
|
||||
pCompletedJob->jobStatus = jobStatus;
|
||||
pCompletedJob->req = (GENERIC_REQ *) h_Context;
|
||||
if(pCompletedJob->req == NULL)
|
||||
{
|
||||
/* TODO: If using a shared job queue, the calling task on that core could hang forever */
|
||||
pCompletedJob->jobStatus = E_INVALID_HANDLE;
|
||||
}
|
||||
#ifdef SEC4_USE_SHARED_JOB_QUEUE
|
||||
else
|
||||
{
|
||||
submittingCoreID = (uint32_t) pCompletedJob->req->coreId;
|
||||
pCompletedJob->req->status = jobStatus;
|
||||
/* Update shared IPC vector */
|
||||
sec4IpcVector[submittingCoreID].state = SEC4_IPC_STATE_DONE;
|
||||
}
|
||||
#else
|
||||
/* Send signal with completed job */
|
||||
msgQStatus = msgQSend(IsrMsgQId, (char*) pCompletedJob, sizeof(COMPLETED_JOB), NO_WAIT, MSG_PRI_NORMAL);
|
||||
#endif
|
||||
|
||||
} /* end of SEC4InterruptService */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,281 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: sec_dcl_api_ipfreescale.h,v $ $Revision: 1.4.12.1 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/sec_dcl_api_ipfreescale.h,v $
|
||||
* $Author: jsheng $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
* Ipfreescale extensions to the Freescale Netcomm SEC/DCL library.
|
||||
*/
|
||||
|
||||
#ifndef __SEC_DCL_API_IPFREESCALE_H
|
||||
#define __SEC_DCL_API_IPFREESCALE_H
|
||||
|
||||
#include <sec_dcl_ext.h>
|
||||
|
||||
#define SEC4_CRC32_POLY_IEEE802 (0x04C11DB7)
|
||||
#define SEC4_CRC32_POLY_IETF3385 (0x1EDC6F41)
|
||||
|
||||
|
||||
uint32_t InitRandNumJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t dataLength,
|
||||
uint8_t* data);
|
||||
|
||||
|
||||
uint32_t InitMd5DigestJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inDataBytes,
|
||||
uint32_t outDataBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitSha1DigestJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inDataBytes,
|
||||
uint32_t outDataBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitMd5HmacJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitSha1HmacJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitDesCbcEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t inIvBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* inIvData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitDesCbcDecryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t inIvBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* inIvData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitDesEcbEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitDesEcbDecryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitTdesCbcEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t inIvBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* inIvData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitTdesCbcDecryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t inIvBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* inIvData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitTdesEcbEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitTdesEcbDecryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitAesCbcEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t inIvBytes,
|
||||
uint32_t outCtxBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* inIvData,
|
||||
uint8_t* outData,
|
||||
uint8_t* outCtxData);
|
||||
|
||||
uint32_t InitAesCbcDecryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t inIvBytes,
|
||||
uint32_t outCtxBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* inIvData,
|
||||
uint8_t* outData,
|
||||
uint8_t* outCtxData);
|
||||
|
||||
uint32_t InitAesEcbEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitAesEcbDecryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* keyData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitModExpJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t aBytes,
|
||||
uint32_t expBytes,
|
||||
uint32_t modBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t* aData,
|
||||
uint8_t* expData,
|
||||
uint8_t* modData,
|
||||
uint8_t* outData);
|
||||
|
||||
uint32_t InitRc4EncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t inCtxBytes,
|
||||
uint32_t outCtxBytes,
|
||||
uint8_t *inData,
|
||||
uint8_t *keyData,
|
||||
uint8_t *inCtxData,
|
||||
uint8_t *outData,
|
||||
uint8_t *outCtxData);
|
||||
|
||||
uint32_t InitCcmpEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t AADBytes,
|
||||
uint32_t MICDataBytes,
|
||||
uint32_t inCtxBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t *inData,
|
||||
uint8_t *keyData,
|
||||
uint8_t *AADData,
|
||||
uint8_t *MICData,
|
||||
uint8_t *inCtxData,
|
||||
uint8_t *outData);
|
||||
|
||||
uint32_t InitAesCcmEncryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t AADBytes,
|
||||
uint32_t MICDataBytes,
|
||||
uint32_t inCtxBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t *inData,
|
||||
uint8_t *keyData,
|
||||
uint8_t *AADData,
|
||||
uint8_t *inMICData,
|
||||
uint8_t *outMICData,
|
||||
uint8_t *inCtxData,
|
||||
uint8_t *outData,
|
||||
uint32_t options);
|
||||
|
||||
uint32_t InitAesCcmDecryptJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inBytes,
|
||||
uint32_t keyBytes,
|
||||
uint32_t AADBytes,
|
||||
uint32_t MICDataBytes,
|
||||
uint32_t inCtxBytes,
|
||||
uint32_t outBytes,
|
||||
uint8_t *inData,
|
||||
uint8_t *keyData,
|
||||
uint8_t *AADData,
|
||||
uint8_t *inMICData,
|
||||
uint8_t *outMICData,
|
||||
uint8_t *inCtxData,
|
||||
uint8_t *outData,
|
||||
uint32_t options);
|
||||
|
||||
uint32_t InitCRCJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inDataBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t outDataBytes,
|
||||
uint8_t* outData,
|
||||
uint32_t inCtxBytes,
|
||||
uint8_t* inCtxData,
|
||||
uint8_t* polynomialData,
|
||||
uint32_t crcOptions);
|
||||
|
||||
uint32_t InitMoveDataJobDesc(uint32_t* p_Desc,
|
||||
uint32_t ptrSize,
|
||||
uint32_t inDataBytes,
|
||||
uint8_t* inData,
|
||||
uint8_t* outData,
|
||||
uint32_t options);
|
||||
|
||||
#ifdef IPIPSEC2
|
||||
uint32_t InitIpsecJobDesc(uint32_t* p_Desc, uint32_t ptrSize, t_IpsecJobDescParam *param);
|
||||
#endif
|
||||
|
||||
#endif /* #ifndef __SEC_DCL_API_IPFREESCALE_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,170 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: sec_dcl_ipfreescale.h,v $ $Revision: 1.4 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/sec_dcl_ipfreescale.h,v $
|
||||
* $Author: dhessing $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
* Ipfreescale extensions to the Freescale Netcomm SEC/DCL library.
|
||||
*/
|
||||
|
||||
#ifndef __SEC_DCL_IPFREESCALE_H
|
||||
#define __SEC_DCL_IPFREESCALE_H
|
||||
|
||||
#include <sec_dcl.h>
|
||||
|
||||
|
||||
|
||||
typedef enum e_JobType
|
||||
{
|
||||
e_DCL_JOB_RANDNUM,
|
||||
e_DCL_JOB_MD5_DIGEST,
|
||||
e_DCL_JOB_SHA1_DIGEST,
|
||||
e_DCL_JOB_MD5_HMAC,
|
||||
e_DCL_JOB_SHA1_HMAC,
|
||||
e_DCL_JOB_DES_CBC_ENCRYPT,
|
||||
e_DCL_JOB_DES_CBC_DECRYPT,
|
||||
e_DCL_JOB_DES_ECB_ENCRYPT,
|
||||
e_DCL_JOB_DES_ECB_DECRYPT,
|
||||
e_DCL_JOB_TDES_CBC_ENCRYPT,
|
||||
e_DCL_JOB_TDES_CBC_DECRYPT,
|
||||
e_DCL_JOB_TDES_ECB_ENCRYPT,
|
||||
e_DCL_JOB_TDES_ECB_DECRYPT,
|
||||
e_DCL_JOB_AES_CBC_ENCRYPT,
|
||||
e_DCL_JOB_AES_CBC_DECRYPT,
|
||||
e_DCL_JOB_AES_ECB_ENCRYPT,
|
||||
e_DCL_JOB_AES_ECB_DECRYPT,
|
||||
e_DCL_JOB_RC4_ENCRYPT,
|
||||
e_DCL_JOB_MODEXP,
|
||||
e_DCL_JOB_CCMP_ENCRYPT,
|
||||
e_DCL_JOB_IPSEC,
|
||||
e_DCL_JOB_CHKSUM_CRC,
|
||||
e_DCL_JOB_MOVE_DATA,
|
||||
e_DCL_JOB_AESCCM_ENCRYPT,
|
||||
e_DCL_JOB_AESCCM_DECRYPT
|
||||
}
|
||||
e_JobType;
|
||||
|
||||
typedef enum e_JobDirection
|
||||
{
|
||||
e_DCL_JOB_ENC,
|
||||
e_DCL_JOB_DEC
|
||||
} e_JobDirection;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description SEC4 Scatter Gather Table Entry
|
||||
*//***************************************************************************/
|
||||
typedef _Packed struct {
|
||||
uint32_t reserved:28; /* Always 0 */
|
||||
uint64_t address:36; /* Address to buffer */
|
||||
uint8_t ext:1; /* Data is another SGT */
|
||||
uint8_t final:1; /* This entry is last in this SGT */
|
||||
uint32_t length:30; /* Length of valid data */
|
||||
uint8_t reserved2; /* Always 0 */
|
||||
uint8_t bpid; /* Buffer Pool ID */
|
||||
uint8_t reserved3:3; /* Always 0 */
|
||||
uint16_t offset:13; /* Offset to valid data */
|
||||
} _PackedType t_SGTEntry;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Job-Descriptor Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_JobDescParam
|
||||
{
|
||||
t_Handle h_Desc;
|
||||
uint32_t jobTypeId; /* Job type */
|
||||
uint8_t *inData; /* Input data */
|
||||
uint8_t *outData; /* Output data */
|
||||
uint8_t *keyData; /* Encrypt,Decrypt or Auth key*/
|
||||
uint8_t *inCtxData; /* Input context data, e.g. IV data */
|
||||
uint8_t *outCtxData; /* Output context data, e.g. IV data */
|
||||
uint8_t *modData;
|
||||
uint8_t *inMICData;
|
||||
uint8_t *outMICData;
|
||||
uint8_t *AADData;
|
||||
uint32_t inDataBytes; /* Number of bytes in inData */
|
||||
uint32_t outDataBytes; /* Number of bytes in outData */
|
||||
uint32_t keyDataBytes; /* Number of bytes in keyData */
|
||||
uint32_t inCtxDataBytes; /* Number of bytes in inCtxData */
|
||||
uint32_t outCtxDataBytes; /* Number of bytes in outCtxData */
|
||||
uint32_t modDataBytes; /* Number of bytes in modData */
|
||||
uint32_t MICDataBytes; /* Number of bytes in MICData */
|
||||
uint32_t AADDataBytes; /* Number of bytes in AADData */
|
||||
uint32_t options; /* Operation specific options bitmask */
|
||||
}
|
||||
t_JobDescParam;
|
||||
|
||||
/**************************************************************************//**
|
||||
@Description Job-Descriptor Parameters
|
||||
*//***************************************************************************/
|
||||
typedef struct t_IpsecJobDescParam
|
||||
{
|
||||
t_Handle h_Desc;
|
||||
e_JobType jobTypeId; /* Job type */
|
||||
e_JobDirection jobDirection; /* Encrypt/Decrypt */
|
||||
e_IpsecCryptoAlg cryptoAlg; /* Crypto algorithm */
|
||||
e_IpsecAuthenAlg authAlg; /* Authentication algorithm */
|
||||
uint8_t *inData; /* Input data (start of ESP pkt) */
|
||||
uint8_t *outData; /* Output data (start of ESP pkt) */
|
||||
uint8_t *cryptoKeyData; /* Crypto key data */
|
||||
uint8_t *hashKeyData; /* Hash(authentication) key data */
|
||||
uint8_t *hashInData; /* Input data where hash should be performed */
|
||||
uint8_t *hashOutData; /* Output data where hash output is stored */
|
||||
uint8_t *inCtxData; /* Input context data e.g. IV data */
|
||||
uint8_t *outCtxData; /* Output context data */
|
||||
uint32_t inDataBytes;
|
||||
uint32_t outDataBytes;
|
||||
uint32_t cryptoKeyDataBytes;
|
||||
uint32_t hashKeyDataBytes;
|
||||
uint32_t hashInDataBytes;
|
||||
uint32_t hashOutDataBytes;
|
||||
uint32_t inCtxDataBytes;
|
||||
uint32_t outCtxDataBytes;
|
||||
}
|
||||
t_IpsecJobDescParam;
|
||||
|
||||
|
||||
/**************************************************************************//**
|
||||
@Function SEC_DCL_InitIpsecEncapDesc
|
||||
|
||||
@Description Creates an IPSEC-Encapsulation Descriptor.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_ShrDescParam - Shared-Descriptor parameters.
|
||||
@Param[in] p_EncapParam - Encapsulation parameters.
|
||||
|
||||
@Return Shared-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitIpsecJobDesc(t_Handle h_SecDcl,
|
||||
t_IpsecJobDescParam *param);
|
||||
|
||||
|
||||
/****************************************************************************//**
|
||||
@Function InitJobDesc
|
||||
|
||||
@Description Creates a Job-Descriptor for random number generation.
|
||||
|
||||
@Param[in] h_SecDcl - SEC DCL object.
|
||||
@Param[in] p_JobDescParam - Job-Descriptor parameters.
|
||||
|
||||
@Return Job-Descriptor object.
|
||||
*//***************************************************************************/
|
||||
t_Handle SEC_DCL_InitJobDesc(t_Handle h_SecDcl,
|
||||
t_JobDescParam *param);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void SEC_DCL_DebugPrintDescriptor(t_Desc* jobDescHandle);
|
||||
|
||||
|
||||
|
||||
#endif /* __SEC_DCL_IPFREESCALE_H */
|
||||
@@ -0,0 +1,303 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: xx.c,v $ $Revision: 1.7 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/xx.c,v $
|
||||
* $Author: dhessing $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
|
||||
� 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
|
||||
#include <memLib.h> /* For memalign */
|
||||
#include <intLib.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdarg.h>
|
||||
#include <stdio.h>
|
||||
#include <spinLockLib.h>
|
||||
|
||||
#include "error_ext.h"
|
||||
/*#include "xx.h"*/
|
||||
#include <Sec4Driver.h>
|
||||
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
#include <ipcom_shared_mem.h> /* TODO Should not have ipcom stuff here */
|
||||
#include <ipcom_vxworks_p4080_forwarder.h>
|
||||
|
||||
#include <wrhv/vbi.h>
|
||||
|
||||
/* If we are on top of a Hypervisor we need to map physical to virtual addresses */
|
||||
SEC4_GLOBAL physAddress_t sec4VirtualOffset;
|
||||
SEC4_GLOBAL physAddress_t sec4VirtualOffsetPackets;
|
||||
SEC4_GLOBAL physAddress_t sec4VirtualOffsetShDesc;
|
||||
|
||||
SEC4_GLOBAL physAddress_t sec4PacketsBase;
|
||||
SEC4_GLOBAL physAddress_t sec4ShDescBase;
|
||||
#endif
|
||||
|
||||
#ifdef DEBUG_XX_MALLOC
|
||||
|
||||
/*****************************************************************************/
|
||||
void * XX_MallocDebug(uint32_t size, char *fname, int line)
|
||||
{
|
||||
void *p;
|
||||
|
||||
p = malloc(size);
|
||||
XX_Print("XX_MallocDebug: p=0x%x, size=%d, %s, [%d]\n",
|
||||
p,
|
||||
size,
|
||||
fname,
|
||||
line);
|
||||
return p;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
void * XX_MallocSmartDebug(uint32_t size,
|
||||
int partitionId,
|
||||
uint32_t alignment,
|
||||
char *fname,
|
||||
int line)
|
||||
{
|
||||
void *p;
|
||||
p = memalign((unsigned) alignment, (unsigned) size);
|
||||
XX_Print("XX_MallocSmartDebug: p=0x%x, size=%d, align=%d, (partId=%d(unused)), %s, [%d]\n",
|
||||
p,
|
||||
size,
|
||||
alignment,
|
||||
partitionId,
|
||||
fname,
|
||||
line);
|
||||
return p;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
void XX_Free(void *p_Memory)
|
||||
{
|
||||
free(p_Memory);
|
||||
}
|
||||
|
||||
#else /* not DEBUG_XX_MALLOC */
|
||||
|
||||
/*****************************************************************************/
|
||||
void * XX_Malloc(uint32_t size)
|
||||
{
|
||||
return malloc(size);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
void * XX_MallocSmart(uint32_t size, int partitionId, uint32_t alignment)
|
||||
{
|
||||
void *p;
|
||||
switch(partitionId)
|
||||
{
|
||||
case 0:
|
||||
p = memalign(alignment, size);
|
||||
break;
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
case 1:
|
||||
p = ipcom_shm_alloc_aligned(alignment, size);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
/* Not valid partition ID */
|
||||
p = NULL;
|
||||
}
|
||||
return p;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
void XX_Free(void *p_Memory)
|
||||
{
|
||||
free(p_Memory);
|
||||
}
|
||||
|
||||
#endif /* not DEBUG_XX_MALLOC */
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
void XX_FreeSmart(void *p_Memory)
|
||||
{
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
if(p_Memory > (void *)sec4VirtualOffsetPackets) /* TODO: Clean this up */
|
||||
ipcom_shm_free(p_Memory);
|
||||
else
|
||||
#endif
|
||||
XX_Free(p_Memory);
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle)
|
||||
{
|
||||
#ifdef DEBUG
|
||||
XX_Print("XX_SetIntr() :: Assigning interrupt irq=%d, handler=0x%x, handle=0x%x\n", irq, f_Isr, handle);
|
||||
#endif
|
||||
if(intConnect(INUM_TO_IVEC(irq), (VOIDFUNCPTR)f_Isr, (int) handle) == ERROR)
|
||||
return E_INVALID_INTR_QUEUE;
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
t_Error XX_EnableIntr(int irq)
|
||||
{
|
||||
#ifdef DEBUG
|
||||
XX_Print("XX_EnableIntr() :: Enabling interrupt irq=%d\n", irq);
|
||||
#endif
|
||||
if(intEnable(irq)==ERROR)
|
||||
return E_NOT_AVAILABLE;
|
||||
return E_OK;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
uint32_t XX_DisableAllIntr(void)
|
||||
{
|
||||
return (uint32_t) intCpuLock();
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
void XX_RestoreAllIntr(uint32_t flags)
|
||||
{
|
||||
intCpuUnlock((int)flags);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
void XX_Exit(int status)
|
||||
{
|
||||
#ifdef DEBUG
|
||||
XX_Print("XX_Exit() called.\n");
|
||||
#endif
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
physAddress_t XX_VirtToPhys(void *addr)
|
||||
{
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* If we are running on top of a hypervisor, translation is needed */
|
||||
/* TODO: Make this a more generic solution not based on any implicit knowledge
|
||||
* This implies that packets are at lower address than private memory
|
||||
* and that area for shared descriptors > packet area */
|
||||
physAddress_t p;
|
||||
|
||||
if((physAddress_t)addr > (physAddress_t)sec4ShDescBase)
|
||||
{
|
||||
p = (physAddress_t) ((physAddress_t)addr - (physAddress_t)sec4VirtualOffsetShDesc);
|
||||
}
|
||||
else if((physAddress_t)addr > (physAddress_t)sec4PacketsBase)
|
||||
{
|
||||
p = (physAddress_t) ((physAddress_t)addr - (physAddress_t)sec4VirtualOffsetPackets);
|
||||
}
|
||||
else
|
||||
{
|
||||
p = (physAddress_t) ((physAddress_t)addr + (physAddress_t)sec4VirtualOffset);
|
||||
}
|
||||
return p;
|
||||
#else
|
||||
return (physAddress_t) addr;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
void * XX_PhysToVirt(physAddress_t addr)
|
||||
{
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* If we are running on top of a hypervisor, translation is needed */
|
||||
/* TODO: Make this a more generic solution not based on hard coded address.
|
||||
* Now each NAE has 4000000 of physical memory. */
|
||||
if(addr < 0x4000000UL)
|
||||
if(addr < 0x1000000UL) /* TODO */
|
||||
return (void *) (addr + sec4VirtualOffsetPackets);
|
||||
else
|
||||
return (void *) (addr + sec4VirtualOffsetShDesc);
|
||||
else
|
||||
return (void *) (addr - sec4VirtualOffset);
|
||||
#else
|
||||
return (void *) (uint32_t) addr;
|
||||
#endif
|
||||
}
|
||||
|
||||
#define BUF_SIZE 1024
|
||||
/*****************************************************************************/
|
||||
void XX_Print(char *format, ...)
|
||||
{
|
||||
va_list args;
|
||||
char tmpBuf[BUF_SIZE];
|
||||
|
||||
va_start(args, format);
|
||||
vsnprintf (tmpBuf, BUF_SIZE, format, args);
|
||||
va_end(args);
|
||||
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
ipcom_hv_printf(tmpBuf);
|
||||
#else
|
||||
printf(tmpBuf);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
char XX_GetChar(void)
|
||||
{
|
||||
return getc(stdin);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Spinlock Service Routines */
|
||||
/*****************************************************************************/
|
||||
|
||||
t_Handle XX_InitSpinlock(void)
|
||||
{
|
||||
spinlockIsr_t *spinlock;
|
||||
|
||||
spinlock = (spinlockIsr_t *)XX_Malloc(sizeof(spinlockIsr_t));
|
||||
SPIN_LOCK_ISR_INIT(spinlock, 0);
|
||||
return (t_Handle) spinlock;
|
||||
}
|
||||
|
||||
void XX_FreeSpinlock(t_Handle h_Spinlock)
|
||||
{
|
||||
if (h_Spinlock)
|
||||
XX_Free(h_Spinlock);
|
||||
}
|
||||
|
||||
void XX_LockSpinlock(t_Handle h_Spinlock)
|
||||
{
|
||||
SPIN_LOCK_ISR_TAKE((spinlockIsr_t *) h_Spinlock);
|
||||
}
|
||||
|
||||
void XX_UnlockSpinlock(t_Handle h_Spinlock)
|
||||
{
|
||||
SPIN_LOCK_ISR_GIVE((spinlockIsr_t *) h_Spinlock);
|
||||
}
|
||||
|
||||
uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock)
|
||||
{
|
||||
SPIN_LOCK_ISR_TAKE((spinlockIsr_t *) h_Spinlock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags)
|
||||
{
|
||||
UNUSED(intrFlags);
|
||||
SPIN_LOCK_ISR_GIVE((spinlockIsr_t *) h_Spinlock);
|
||||
}
|
||||
@@ -0,0 +1,60 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: xx.h,v $ $Revision: 1.5 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/sec4/xx.h,v $
|
||||
* $Author: dhessing $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
|
||||
© 1995-2003, 2004, 2005-2010 Freescale Semiconductor, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This is proprietary source code of Freescale Semiconductor Inc.,
|
||||
and its use is subject to the NetComm Device Drivers EULA.
|
||||
The copyright notice above does not evidence any actual or intended
|
||||
publication of such source code.
|
||||
|
||||
**************************************************************************/
|
||||
#ifndef __XX_H
|
||||
#define __XX_H
|
||||
|
||||
#include "std_ext.h"
|
||||
#include "xx_ext.h"
|
||||
|
||||
#define __ERR_MODULE__ MODULE_UNKNOWN
|
||||
|
||||
#define XX_UDELAY_MAX 50000000
|
||||
|
||||
/* Interrupt Manager structures (for XX_Call implementation) */
|
||||
|
||||
typedef struct t_IntrManagerItem
|
||||
{
|
||||
t_Error (*f)(t_Handle);
|
||||
t_Handle id;
|
||||
t_Handle h_App;
|
||||
uint16_t flags;
|
||||
} t_IntrManagerItem;
|
||||
|
||||
|
||||
typedef struct t_InterQueueManager
|
||||
{
|
||||
t_Handle pool;
|
||||
t_Handle queue;
|
||||
} t_InterQueueManager;
|
||||
|
||||
|
||||
#endif /* __XX_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,373 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK INTERNAL API HEADER FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_coldfire.h,v $ $Revision: 1.13 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/src/ipfreescale_coldfire.h,v $
|
||||
* $Author: lob $ $Date: 2009-01-20 10:35:56 $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef IPFREESCALE_COLDFIRE_H
|
||||
#define IPFREESCALE_COLDFIRE_H
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include "ipfreescale_config.h"
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include <ipcom_type.h>
|
||||
#include <ipcom_cstyle.h>
|
||||
#include <ipcom_list.h>
|
||||
#include <ipcom_os.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef IPFREESCALE_USE_STATISTICS
|
||||
#define IPFREESCALE_STATS(ch, var) ipfreescale_coldfire.channel[ch].stats.var
|
||||
#else
|
||||
#define IPFREESCALE_STATS(ch, var) IP_NOOP
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Coldfire Security Engine Controller (SEC)
|
||||
*===========================================================================
|
||||
*
|
||||
*/
|
||||
|
||||
/* Bit definitions and macros for SMCR */
|
||||
#define IPFREESCALE_COLDFIRE_SMCR_CURR_CHAN(x) (((x)&0x0000000F)<<4)
|
||||
#define IPFREESCALE_COLDFIRE_SMCR_SWR (0x01000000)
|
||||
#define IPFREESCALE_COLDFIRE_SMCR_CURR_CHAN_1 (0x00000010)
|
||||
#define IPFREESCALE_COLDFIRE_SMCR_CURR_CHAN_2 (0x00000020)
|
||||
|
||||
/* Bit definitions and macros for MCF_SEC_SIMRH */
|
||||
#define IPFREESCALE_COLDFIRE_SIMRH_AERR (0x08000000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRH_CHA0DN (0x10000000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRH_CHA0ERR (0x20000000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRH_CHA1DN (0x40000000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRH_CHA1ERR (0x80000000)
|
||||
|
||||
/* Bit definitions and macros for MCF_SEC_SIMRL */
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_TEA (0x00000040)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_DEUDN (0x00000100)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_DEUERR (0x00000200)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_AESUDN (0x00001000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_AESUERR (0x00002000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_MDEUDN (0x00010000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_MDEUERR (0x00020000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_AFEUDN (0x00100000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_AFEUERR (0x00200000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_RNGDN (0x01000000)
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_RNGERR (0x02000000)
|
||||
|
||||
/* Bit definitions and macros for MCF_SEC_SISRH */
|
||||
#define IPFREESCALE_COLDFIRE_SISRH_CHA0DN (0x10000000)
|
||||
#define IPFREESCALE_COLDFIRE_SISRH_CHA1DN (0x40000000)
|
||||
|
||||
/* Bit definitions and macros for MCF_SEC_SICRH */
|
||||
#define IPFREESCALE_COLDFIRE_SICRH_CHA0DN (0x10000000)
|
||||
#define IPFREESCALE_COLDFIRE_SICRH_CHA1DN (0x40000000)
|
||||
|
||||
/* Bit definitions and macros for IPFREESCALE_COLDFIRE_CCCRn */
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_RST (0x00000001)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_CDIE (0x00000002)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_NT (0x00000004)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_NE (0x00000008)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_WE (0x00000010)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE(x) (((x)&0x00000007)<<8)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_2 (0x00000000)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_8 (0x00000100)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_16 (0x00000200)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_24 (0x00000300)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_32 (0x00000400)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_40 (0x00000500)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_48 (0x00000600)
|
||||
#define IPFREESCALE_COLDFIRE_CCCRn_BURST_SIZE_56 (0x00000700)
|
||||
|
||||
/* Bit definitions and macros for IPFREESCALE_COLDFIRE_CCPSRLn */
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_PAIR_PTR(x) (((x)&0x000000FF)<<0)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_EUERR (0x00000100)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_SERR (0x00000200)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_DERR (0x00000400)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_PERR (0x00001000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_TEA (0x00002000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_SD (0x00010000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_PD (0x00020000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_SRD (0x00040000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_PRD (0x00080000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_SG (0x00100000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_PG (0x00200000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_SR (0x00400000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_PR (0x00800000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_MO (0x01000000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_MI (0x02000000)
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRLn_STAT (0x04000000)
|
||||
|
||||
#define IPFREESCALE_COLDFIRE_SIMRH_OFFSET 0x021008
|
||||
#define IPFREESCALE_COLDFIRE_SIMRL_OFFSET 0x02100C
|
||||
#define IPFREESCALE_COLDFIRE_SISRH_OFFSET 0x021010
|
||||
#define IPFREESCALE_COLDFIRE_SISRL_OFFSET 0x021014
|
||||
#define IPFREESCALE_COLDFIRE_SICRH_OFFSET 0x021018
|
||||
#define IPFREESCALE_COLDFIRE_SICRL_OFFSET 0x02101C
|
||||
#define IPFREESCALE_COLDFIRE_SMCR_OFFSET 0x021030
|
||||
|
||||
#define IPFREESCALE_COLDFIRE_AFRCR_OFFSET 0x028018
|
||||
#define IPFREESCALE_COLDFIRE_AFSR_OFFSET 0x028028
|
||||
#define IPFREESCALE_COLDFIRE_DRCR_OFFSET 0x02A018
|
||||
#define IPFREESCALE_COLDFIRE_DSR_OFFSET 0x02A028
|
||||
#define IPFREESCALE_COLDFIRE_MDRCR_OFFSET 0x02C018
|
||||
#define IPFREESCALE_COLDFIRE_MDSR_OFFSET 0x02C028
|
||||
#define IPFREESCALE_COLDFIRE_RNGRCR_OFFSET 0x02E018
|
||||
#define IPFREESCALE_COLDFIRE_RNGSR_OFFSET 0x02E028
|
||||
#define IPFREESCALE_COLDFIRE_AESRCR_OFFSET 0x032018
|
||||
#define IPFREESCALE_COLDFIRE_AESSR_OFFSET 0x032028
|
||||
|
||||
#define IPFREESCALE_COLDFIRE_CCCR_OFFSET 0x02200C
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRH_OFFSET 0x022010
|
||||
#define IPFREESCALE_COLDFIRE_CCPSRL_OFFSET 0x022014
|
||||
#define IPFREESCALE_COLDFIRE_FR_OFFSET 0x02204C
|
||||
|
||||
#define IPFREESCALE_COLDFIRE_CHANNEL_OFFSET 0x001000
|
||||
|
||||
#define IPFREESCALE_MCF_JTAGID_OFFSET 0x000050
|
||||
#define IPFREESCALE_MCF_JTAGID_PROCESSOR 0x0FFFFFFF
|
||||
#define IPFREESCALE_MCF_JTAGID_MCF5485 0x0800C01D
|
||||
#define IPFREESCALE_MCF_JTAGID_MCF5475 0x0801201D
|
||||
|
||||
#define IPFREESCALE_COLDFIRE_RCR_SR 0x01000000
|
||||
#define IPFREESCALE_COLDFIRE_SR_RD 0x01000000
|
||||
#define IPFREESCALE_COLDFIRE_SR_ID 0x02000000
|
||||
|
||||
#define IPFREESCALE_COLDFIRE_EU_NONE 0x00
|
||||
#define IPFREESCALE_COLDFIRE_EU_AFEU 0x01
|
||||
#define IPFREESCALE_COLDFIRE_EU_DEU 0x02
|
||||
#define IPFREESCALE_COLDFIRE_EU_MDEU 0x03
|
||||
#define IPFREESCALE_COLDFIRE_EU_RNG 0x04
|
||||
#define IPFREESCALE_COLDFIRE_EU_AESU 0x06
|
||||
|
||||
#define IPFREESCALE_COLDFIRE_COMMON_NONSNOOP_NO_AFEU 0x01
|
||||
#define IPFREESCALE_COLDFIRE_COMMON_NONSNOOP_AFEU 0x05
|
||||
#define IPFREESCALE_COLDFIRE_MAXWAIT 1000000
|
||||
#define IPFREESCALE_COLDFIRE_NUM_CHANNELS 2
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* IPFREESCALE_COLDFIRE_ESP_...
|
||||
*===========================================================================
|
||||
* Descriptor headers for ipsec esp
|
||||
*
|
||||
*/
|
||||
#define IPFREESCALE_COLDFIRE_ESP_ENCRYPT_DES_CBC_MD5 0x20531e20
|
||||
#define IPFREESCALE_COLDFIRE_ESP_DECRYPT_DES_CBC_MD5 0x20431e22
|
||||
#define IPFREESCALE_COLDFIRE_ESP_ENCRYPT_DES_CBC_SHA1 0x20531c20
|
||||
#define IPFREESCALE_COLDFIRE_ESP_DECRYPT_DES_CBC_SHA1 0x20431c22
|
||||
#define IPFREESCALE_COLDFIRE_ESP_ENCRYPT_3DES_CBC_MD5 0x20731e20
|
||||
#define IPFREESCALE_COLDFIRE_ESP_DECRYPT_3DES_CBC_MD5 0x20631e22
|
||||
#define IPFREESCALE_COLDFIRE_ESP_ENCRYPT_3DES_CBC_SHA1 0x20731c20
|
||||
#define IPFREESCALE_COLDFIRE_ESP_DECRYPT_3DES_CBC_SHA1 0x20631c22
|
||||
#define IPFREESCALE_COLDFIRE_ESP_ENCRYPT_AES_CBC_MD5 0x60331e20
|
||||
#define IPFREESCALE_COLDFIRE_ESP_DECRYPT_AES_CBC_MD5 0x60231e22
|
||||
#define IPFREESCALE_COLDFIRE_ESP_ENCRYPT_AES_CBC_SHA1 0x60331c20
|
||||
#define IPFREESCALE_COLDFIRE_ESP_DECRYPT_AES_CBC_SHA1 0x60231c22
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_coldfire_descriptor
|
||||
*===========================================================================
|
||||
* Descriptor definition for SEC.
|
||||
*/
|
||||
typedef struct Ipfreescale_coldfire_descriptor_struct
|
||||
{
|
||||
Ip_u32 hdr;
|
||||
Ip_u32 len_1;
|
||||
Ip_u8 *ptr_1;
|
||||
Ip_u32 len_2;
|
||||
Ip_u8 *ptr_2;
|
||||
Ip_u32 len_3;
|
||||
Ip_u8 *ptr_3;
|
||||
Ip_u32 len_4;
|
||||
Ip_u8 *ptr_4;
|
||||
Ip_u32 len_5;
|
||||
Ip_u8 *ptr_5;
|
||||
Ip_u32 len_6;
|
||||
Ip_u8 *ptr_6;
|
||||
Ip_u32 len_7;
|
||||
Ip_u8 *ptr_7;
|
||||
struct Ipfreescale_coldfire_descriptor_struct *next;
|
||||
}
|
||||
Ipfreescale_coldfire_descriptor;
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_coldfire_stats
|
||||
*===========================================================================
|
||||
* Statistics structure for SEC.
|
||||
*/
|
||||
typedef struct Ipfreescale_coldfire_stats_struct
|
||||
{
|
||||
/* Usage counters */
|
||||
int u_deu;
|
||||
int u_aesu;
|
||||
int u_afeu;
|
||||
int u_mdeu;
|
||||
int u_rng;
|
||||
|
||||
/* Error counters */
|
||||
int e_tmo;
|
||||
int e_euerr;
|
||||
int e_serr;
|
||||
int e_derr;
|
||||
int e_perr;
|
||||
int e_tea;
|
||||
}
|
||||
Ipfreescale_coldfire_stats;
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_coldfire_channel_data
|
||||
*===========================================================================
|
||||
* SEC channel data.
|
||||
*/
|
||||
typedef struct Ipfreescale_coldfire_channel_data_struct
|
||||
{
|
||||
/* True if in use */
|
||||
Ip_bool in_use;
|
||||
|
||||
/* Registers */
|
||||
IP_VOLATILE Ip_u32 *cccr;
|
||||
IP_VOLATILE Ip_u32 *ccpsrh;
|
||||
IP_VOLATILE Ip_u32 *ccpsrl;
|
||||
IP_VOLATILE Ip_u32 *fr;
|
||||
|
||||
#ifdef IPFREESCALE_USE_STATISTICS
|
||||
/* Statistics */
|
||||
Ipfreescale_coldfire_stats stats;
|
||||
#endif
|
||||
}
|
||||
Ipfreescale_coldfire_channel_data;
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_coldfire_data
|
||||
*===========================================================================
|
||||
* SEC data.
|
||||
*/
|
||||
typedef struct Ipfreescale_coldfire_data_struct
|
||||
{
|
||||
/* Channel resource mutex */
|
||||
Ipcom_mutex chmtx;
|
||||
|
||||
/* Registers */
|
||||
IP_VOLATILE Ip_u32 *jtagid;
|
||||
IP_VOLATILE Ip_u32 *mcr;
|
||||
IP_VOLATILE Ip_u32 *simrh;
|
||||
IP_VOLATILE Ip_u32 *simrl;
|
||||
IP_VOLATILE Ip_u32 *sisrh;
|
||||
IP_VOLATILE Ip_u32 *sisrl;
|
||||
IP_VOLATILE Ip_u32 *sicrh;
|
||||
IP_VOLATILE Ip_u32 *sicrl;
|
||||
IP_VOLATILE Ip_u32 *afrcr;
|
||||
IP_VOLATILE Ip_u32 *afsr;
|
||||
IP_VOLATILE Ip_u32 *drcr;
|
||||
IP_VOLATILE Ip_u32 *dsr;
|
||||
IP_VOLATILE Ip_u32 *mdrcr;
|
||||
IP_VOLATILE Ip_u32 *mdsr;
|
||||
IP_VOLATILE Ip_u32 *rngrcr;
|
||||
IP_VOLATILE Ip_u32 *rngsr;
|
||||
IP_VOLATILE Ip_u32 *aesrcr;
|
||||
IP_VOLATILE Ip_u32 *aessr;
|
||||
|
||||
/* Channel structures */
|
||||
Ipfreescale_coldfire_channel_data channel[IPFREESCALE_COLDFIRE_NUM_CHANNELS];
|
||||
}
|
||||
Ipfreescale_coldfire_data;
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
IP_EXTERN IP_GLOBAL Ipfreescale_coldfire_data ipfreescale_coldfire;
|
||||
|
||||
IP_EXTERN IP_CONST Ip_u8 ipfreescale_parity_odd[256];
|
||||
|
||||
IP_GLOBAL void ipfreescale_coldfire_yield_task(void);
|
||||
IP_GLOBAL int ipfreescale_coldfire_reserve_channel(void);
|
||||
IP_GLOBAL void ipfreescale_coldfire_release_channel(int ch);
|
||||
IP_GLOBAL int ipfreescale_coldfire_engage(Ipfreescale_coldfire_descriptor *dp, int ch, int peu, int seu);
|
||||
IP_GLOBAL void ipfreescale_coldfire_flush_descriptor(Ipfreescale_coldfire_descriptor *descr);
|
||||
IP_GLOBAL void ipfreescale_coldfire_print_stats(char *where);
|
||||
IP_GLOBAL void ipfreescale_coldfire_clear_stats(void);
|
||||
|
||||
IP_GLOBAL Ip_err ipfreescale_coldfire_init(void);
|
||||
|
||||
IP_GLOBAL int ipfreescale_coldfire_random_gen(Ip_u8 *data, Ip_u32 length);
|
||||
IP_GLOBAL int ipfreescale_coldfire_md5_digest(IP_CONST Ip_u8 *data, Ip_u32 length, Ip_u8 *digest);
|
||||
IP_GLOBAL int ipfreescale_coldfire_sha1_digest(IP_CONST Ip_u8 *data, Ip_u32 length, Ip_u8 *digest);
|
||||
IP_GLOBAL int ipfreescale_coldfire_des_cbc_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u8 *iv, int enc);
|
||||
IP_GLOBAL int ipfreescale_coldfire_des_ecb_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, int enc);
|
||||
IP_GLOBAL int ipfreescale_coldfire_3des_cbc_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u8 *iv, int enc);
|
||||
IP_GLOBAL int ipfreescale_coldfire_3des_ecb_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, int enc);
|
||||
IP_GLOBAL int ipfreescale_coldfire_aes_cbc_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u32 keylen, Ip_u8 *iv, int enc);
|
||||
IP_GLOBAL int ipfreescale_coldfire_aes_ecb_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u32 keylen, int enc);
|
||||
IP_GLOBAL int ipfreescale_coldfire_rc4_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u32 keylen, Ip_u8 *ctxi, Ip_u8 *ctxo);
|
||||
|
||||
#ifdef IPIPSEC2
|
||||
IP_GLOBAL int ipfreescale_ipsec_coldfire_esp_input(Ip_u32 hdr, Ip_u8 *data, Ip_u32 length, Iphwcrypto_esp_cbc_sa *sa, Ip_u8 *digest, Ipipsec_param *param, Ipcom_pkt *pkt);
|
||||
IP_GLOBAL int ipfreescale_ipsec_coldfire_esp_output(Ip_u32 hdr, Ip_u8 *data, Ip_u32 length, Iphwcrypto_esp_cbc_sa *sa, Ip_u8 *digest, Ipipsec_param *param, Ipcom_pkt *pkt);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,167 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK INTERNAL API HEADER FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_h.h,v $ $Revision: 1.16.48.2 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/src/ipfreescale_h.h,v $
|
||||
* $Author: jsheng $ $Date: 2014-07-23 02:21:14 $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef IPFREESCALE_H_H
|
||||
#define IPFREESCALE_H_H
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include "ipfreescale_config.h"
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include <ipcom_type.h>
|
||||
#include <ipcom_cstyle.h>
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Syslog facility */
|
||||
#ifdef IPCOM_SYSLOG_FACILITY
|
||||
#undef IPCOM_SYSLOG_FACILITY
|
||||
#endif
|
||||
#define IPCOM_SYSLOG_FACILITY IPCOM_LOG_IPFREESCALE
|
||||
|
||||
/* Syslog priority */
|
||||
#ifdef IPCOM_SYSLOG_PRIORITY
|
||||
#undef IPCOM_SYSLOG_PRIORITY
|
||||
#endif
|
||||
#ifdef IP_DEBUG
|
||||
#define IPCOM_SYSLOG_PRIORITY IPCOM_LOG_DEBUG
|
||||
#else
|
||||
#define IPCOM_SYSLOG_PRIORITY IPCOM_LOG_WARNING
|
||||
#endif
|
||||
|
||||
#ifdef IP_VOLATILE
|
||||
#undef IP_VOLATILE
|
||||
#endif
|
||||
#define IP_VOLATILE volatile
|
||||
|
||||
/* Unit support definitions */
|
||||
#define IPFREESCALE_UNIT_MDEU (1)
|
||||
#define IPFREESCALE_UNIT_DEU (1 << 1)
|
||||
#define IPFREESCALE_UNIT_AESU (1 << 2)
|
||||
#define IPFREESCALE_UNIT_AFEU (1 << 3)
|
||||
#define IPFREESCALE_UNIT_RNG (1 << 4)
|
||||
#define IPFREESCALE_UNIT_PKEU (1 << 5)
|
||||
#define IPFREESCALE_UNIT_CCMP (1 << 6)
|
||||
#define IPFREESCALE_UNIT_AESCCM (1 << 7)
|
||||
#define IPFREESCALE_UNIT_CRC (1 << 8)
|
||||
#define IPFREESCALE_UNIT_DMA (1 << 9)
|
||||
|
||||
|
||||
/* Algorithm definitions */
|
||||
#define IPFREESCALE_MD5_DIGEST_SIZE 16
|
||||
#define IPFREESCALE_SHA1_DIGEST_SIZE 20
|
||||
|
||||
#define IPFREESCALE_DES_KEY_SIZE 8
|
||||
#define IPFREESCALE_DES_IV_SIZE 8
|
||||
#define IPFREESCALE_DES_BLOCK_SIZE 8
|
||||
|
||||
#define IPFREESCALE_3DES_KEY_SIZE 24
|
||||
#define IPFREESCALE_3DES_IV_SIZE 8
|
||||
#define IPFREESCALE_3DES_BLOCK_SIZE 8
|
||||
|
||||
#define IPFREESCALE_AES_IV_SIZE 16
|
||||
#define IPFREESCALE_AES_BLOCK_SIZE 16
|
||||
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#define IPFREESCALE_RC4_CTX_SIZE 259
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
/* ARC4 context in SEC4 is 256B SBox, 2B I&J pointers
|
||||
* But encrypted as "black key" using AES-ECB require
|
||||
* multiple of 16B => 272 B */
|
||||
#define IPFREESCALE_RC4_CTX_SIZE 272
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef IPFREESCALE_COLDFIRE
|
||||
#define IPFREESCALE_CRYPTO_BUFSIZE 32768
|
||||
#endif
|
||||
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#define IPFREESCALE_CRYPTO_BUFSIZE 65535
|
||||
#endif
|
||||
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
/* Enlarged to 32 bits size to use extended length
|
||||
* for job descriptors in SEC4 driver */
|
||||
#define IPFREESCALE_CRYPTO_BUFSIZE 4294967295
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_coldfire_data
|
||||
*===========================================================================
|
||||
* Message digest context use for handle the init, update and final
|
||||
* calls.
|
||||
*/
|
||||
typedef struct Ipfreescale_digest_context_struct
|
||||
{
|
||||
Ip_u8 *msg;
|
||||
Ip_u32 length;
|
||||
}
|
||||
Ipfreescale_digest_context;
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
IP_GLOBAL int ipfreescale_cmd_freescale(int argc, char **argv);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,266 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_ipsec_coldfire.c,v $ $Revision: 1.10 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/src/ipfreescale_ipsec_coldfire.c,v $
|
||||
* $Author: lob $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
* IPFREESCALE - Hardware crypto support product - coldfire ipsec implementation.
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include "ipfreescale_config.h"
|
||||
|
||||
#if defined(IPFREESCALE_COLDFIRE) && defined(IPIPSEC2)
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#define IPCOM_USE_CLIB_PROTO
|
||||
#include <ipcom_type.h>
|
||||
#include <ipcom_cstyle.h>
|
||||
#include <ipcom_clib.h>
|
||||
#include <ipcom_syslog.h>
|
||||
#include <ipcom_err.h>
|
||||
#include <ipcom_os.h>
|
||||
|
||||
#include <iphwcrypto.h>
|
||||
|
||||
#include "ipfreescale.h"
|
||||
#include "ipfreescale_h.h"
|
||||
#include "ipfreescale_coldfire.h"
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 GLOBAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_coldfire_esp_input
|
||||
*===========================================================================
|
||||
* Description: IPSEC ESP input processing using.
|
||||
* Parameters: data - pointer to the packet data.
|
||||
* length - length of the packet.
|
||||
* sa - pointer to the sa (tunnel descriptor block).
|
||||
* param - pointer to ipsec parameters.
|
||||
* digest - pointer the message autentication code.
|
||||
* pkt - pointer to the packet structure.
|
||||
* Returns: 1 = ok
|
||||
* 0 = timeout
|
||||
* -1 = error
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_ipsec_coldfire_esp_input(Ip_u32 hdr,
|
||||
Ip_u8 *data,
|
||||
Ip_u32 length,
|
||||
Iphwcrypto_esp_cbc_sa *sa,
|
||||
Ip_u8 *digest,
|
||||
Ipipsec_param *param,
|
||||
Ipcom_pkt *pkt)
|
||||
{
|
||||
Ipfreescale_coldfire_descriptor descr;
|
||||
int ch, ret = -1, i;
|
||||
|
||||
/* Acquire a crypto channel */
|
||||
ch = ipfreescale_coldfire_reserve_channel();
|
||||
if(ch < 0)
|
||||
{
|
||||
IPCOM_LOG0(INFO, "ipfreescale_ipsec_coldfire_esp_input() :: No channel available");
|
||||
goto done;
|
||||
}
|
||||
|
||||
#ifdef IPFREESCALE_COLDFIRE_FIX_DES_PARITY
|
||||
switch (hdr)
|
||||
{
|
||||
case IPFREESCALE_COLDFIRE_ESP_DECRYPT_DES_CBC_MD5:
|
||||
case IPFREESCALE_COLDFIRE_ESP_DECRYPT_DES_CBC_SHA1:
|
||||
case IPFREESCALE_COLDFIRE_ESP_DECRYPT_3DES_CBC_MD5:
|
||||
case IPFREESCALE_COLDFIRE_ESP_DECRYPT_3DES_CBC_SHA1:
|
||||
for (i=0; i<sa->ekeylen; i++)
|
||||
sa->ekey[i] = ipfreescale_parity_odd[sa->ekey[i]];
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Load descriptor */
|
||||
descr.hdr = hdr;
|
||||
descr.len_1 = sa->akeylen;
|
||||
descr.ptr_1 = sa->akey;
|
||||
descr.len_2 = sa->hdrlen;
|
||||
descr.ptr_2 = data;
|
||||
descr.len_3 = sa->ekeylen;
|
||||
descr.ptr_3 = sa->ekey;
|
||||
descr.len_4 = sa->ivlen;
|
||||
descr.ptr_4 = sa->iv;
|
||||
descr.len_5 = length - sa->hdrlen - sa->authlen;
|
||||
descr.ptr_5 = data + sa->hdrlen;
|
||||
descr.len_6 = descr.len_5;
|
||||
descr.ptr_6 = descr.ptr_5;
|
||||
descr.len_7 = sa->hashlen;
|
||||
descr.ptr_7 = digest;
|
||||
descr.next = IP_NULL;
|
||||
|
||||
/* Engage crypto hardware */
|
||||
ipfreescale_coldfire_flush_descriptor(&descr);
|
||||
ret = ipfreescale_coldfire_engage(&descr, ch, (hdr & 0xf0000000)>>28, (hdr & 0x000f0000) >> 16);
|
||||
|
||||
done:
|
||||
/* Release the crypto channel */
|
||||
if(ch >= 0)
|
||||
ipfreescale_coldfire_release_channel(ch);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_coldfire_esp_output
|
||||
*===========================================================================
|
||||
* Description: IPSEC ESP ouput processing using.
|
||||
* Parameters: data - pointer to the packet data.
|
||||
* length - length of the packet.
|
||||
* sa - pointer to the sa (tunnel descriptor block).
|
||||
* param - pointer to ipsec parameters.
|
||||
* digest - pointer the message autentication code.
|
||||
* pkt - pointer to the packet structure.
|
||||
* Returns: 1 = ok
|
||||
* 0 = timeout
|
||||
* -1 = error
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_ipsec_coldfire_esp_output(Ip_u32 hdr,
|
||||
Ip_u8 *data,
|
||||
Ip_u32 length,
|
||||
Iphwcrypto_esp_cbc_sa *sa,
|
||||
Ip_u8 *digest,
|
||||
Ipipsec_param *param,
|
||||
Ipcom_pkt *pkt)
|
||||
{
|
||||
Ipfreescale_coldfire_descriptor descr;
|
||||
int ch, ret = -1, i;
|
||||
|
||||
/* Acquire a crypto channel */
|
||||
ch = ipfreescale_coldfire_reserve_channel();
|
||||
if(ch < 0)
|
||||
{
|
||||
IPCOM_LOG0(INFO, "ipfreescale_ipsec_coldfire_esp_output() :: No channel available");
|
||||
goto done;
|
||||
}
|
||||
|
||||
#ifdef IPFREESCALE_COLDFIRE_FIX_DES_PARITY
|
||||
switch (hdr)
|
||||
{
|
||||
case IPFREESCALE_COLDFIRE_ESP_ENCRYPT_DES_CBC_MD5:
|
||||
case IPFREESCALE_COLDFIRE_ESP_ENCRYPT_DES_CBC_SHA1:
|
||||
case IPFREESCALE_COLDFIRE_ESP_ENCRYPT_3DES_CBC_MD5:
|
||||
case IPFREESCALE_COLDFIRE_ESP_ENCRYPT_3DES_CBC_SHA1:
|
||||
for (i=0; i<sa->ekeylen; i++)
|
||||
sa->ekey[i] = ipfreescale_parity_odd[sa->ekey[i]];
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Load descriptor */
|
||||
descr.hdr = hdr;
|
||||
|
||||
|
||||
descr.len_1 = sa->akeylen;
|
||||
descr.ptr_1 = sa->akey;
|
||||
descr.len_2 = sa->hdrlen;
|
||||
descr.ptr_2 = data;
|
||||
descr.len_3 = sa->ekeylen;
|
||||
descr.ptr_3 = sa->ekey;
|
||||
descr.len_4 = sa->ivlen;
|
||||
descr.ptr_4 = sa->iv;
|
||||
descr.len_5 = length - sa->hdrlen;
|
||||
descr.ptr_5 = data + sa->hdrlen;
|
||||
descr.len_6 = descr.len_5;
|
||||
descr.ptr_6 = descr.ptr_5;
|
||||
descr.len_7 = sa->hashlen;
|
||||
descr.ptr_7 = digest;
|
||||
descr.next = IP_NULL;
|
||||
|
||||
/* Engage crypto hardware */
|
||||
ipfreescale_coldfire_flush_descriptor(&descr);
|
||||
ret = ipfreescale_coldfire_engage(&descr, ch, (hdr & 0xf0000000)>>28, (hdr & 0x000f0000) >> 16);
|
||||
|
||||
done:
|
||||
/* Release the crypto channel */
|
||||
if(ch >= 0)
|
||||
ipfreescale_coldfire_release_channel(ch);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 11 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#else
|
||||
int ipfreescale_ipsec_coldfire_empty_file;
|
||||
#endif /* #if defined(IPFREESCALE_COLDFIRE) && defined(IPIPSEC2) */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,701 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_ipsec_sec.c,v $ $Revision: 1.5.12.3 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/src/ipfreescale_ipsec_sec.c,v $
|
||||
* $Author: zan $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
* IPFREESCALE - Hardware crypto support product - sec (sec2 and sec4) ipsec implementation.
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include "ipfreescale_config.h"
|
||||
|
||||
#if (defined(IPFREESCALE_SEC4) || defined(IPFREESCALE_SEC2)) && defined(IPIPSEC2)
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#define IPCOM_USE_CLIB_PROTO
|
||||
#include <ipcom_type.h>
|
||||
#include <ipcom_cstyle.h>
|
||||
#include <ipcom_clib.h>
|
||||
#include <ipcom_syslog.h>
|
||||
#include <ipcom_err.h>
|
||||
#include <ipcom_os.h>
|
||||
|
||||
#ifdef IPNET
|
||||
#include "ipnet_h.h"
|
||||
#endif
|
||||
|
||||
#ifdef IPLITE
|
||||
#include <iplite_h.h>
|
||||
#endif
|
||||
|
||||
/* TODO: Not pretty! Nasty dependencies between files */
|
||||
/* Include ipfreescale_sec4.h first to avoid type collition for uint32_t between stdint.h and ipipsec_pfkeyv2.h */
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
#define IPIPSEC_HAVE_UINT_TYPE
|
||||
#endif
|
||||
#include "ipfreescale_sec.h"
|
||||
|
||||
#include <iphwcrypto.h>
|
||||
|
||||
#include "ipfreescale.h"
|
||||
#include "ipfreescale_h.h"
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 STATIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_sec2_free_kmem
|
||||
*===========================================================================
|
||||
* Description: Free kernel memory
|
||||
* Parameters: ctx - pointer to the context.
|
||||
* Returns: nothing.
|
||||
*/
|
||||
IP_STATIC void
|
||||
ipfreescale_ipsec_sec_free_kmem(Ipfreescale_sec_notify *ctx)
|
||||
{
|
||||
/* Free kernel memory */
|
||||
if(ctx->param.key.direction == 0)
|
||||
{
|
||||
/* input */
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.hashKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.cryptKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.hashInData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.hashDataOut);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, &ctx->kreq);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* output */
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.hashKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.cryptCtxInData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.cryptKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.hashInData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, (void **)&ctx->req.esp_cbc.hashDataOut);
|
||||
IPFREESCALE_SEC_FREE_KMEM(ipfreescale_sec.fd, &ctx->kreq);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 GLOBAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_sec_notify_done
|
||||
*===========================================================================
|
||||
* Description: Notification function for completed IPSEC packets.
|
||||
* Parameters: ctx - pointer to the sec ipsec context.
|
||||
* Returns: nothing.
|
||||
*/
|
||||
IP_GLOBAL void
|
||||
ipfreescale_ipsec_sec_notify_done(Ipfreescale_sec_notify *ctx)
|
||||
{
|
||||
Ip_err ret;
|
||||
|
||||
ip_assert(ctx != IP_NULL);
|
||||
ip_assert(ctx->kreq != IP_NULL);
|
||||
ip_assert(ctx->pkt != IP_NULL);
|
||||
ip_assert(ctx->block == IP_NULL);
|
||||
|
||||
/* Copy from kernel memory */
|
||||
IPFREESCALE_SEC_GET_KMEM(ipfreescale_sec.fd, &ctx->req.esp_cbc, &ctx->kreq, sizeof(ctx->req.esp_cbc));
|
||||
IPFREESCALE_SEC_GET_KMEM(ipfreescale_sec.fd, ctx->sa.data + ctx->sa.hdrlen,
|
||||
(void **)&ctx->req.esp_cbc.cryptDataOut, ctx->req.esp_cbc.inDataBytes);
|
||||
IPFREESCALE_SEC_GET_KMEM(ipfreescale_sec.fd, ctx->digest, (void **)&ctx->req.esp_cbc.hashDataOut, ctx->req.esp_cbc.hashDataOutBytes);
|
||||
|
||||
if(ctx->param.key.direction == 0)
|
||||
{
|
||||
/* Re-input packet */
|
||||
ret = iphwcrypto_ipsec_esp_re_input(&ctx->sa, &ctx->param, ctx->pkt, ctx->digest);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Re-output packet */
|
||||
ret = iphwcrypto_ipsec_esp_re_output(&ctx->sa, &ctx->param, ctx->pkt, ctx->digest);
|
||||
}
|
||||
|
||||
/* Free kernel memory */
|
||||
ipfreescale_ipsec_sec_free_kmem(ctx);
|
||||
|
||||
if (ret != IPCOM_SUCCESS)
|
||||
{
|
||||
/* Return the packet to the system */
|
||||
iphwcrypto_ipsec_esp_pkt_free(ctx->pkt);
|
||||
}
|
||||
|
||||
/* Destroy the context */
|
||||
ipfreescale_sec_destroy_async_context(ctx);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_sec_notify_error
|
||||
*===========================================================================
|
||||
* Description: Error notification for IPSEC packets.
|
||||
* Parameters: ctx - pointer to the sec ipsec context.
|
||||
* Returns: nothing.
|
||||
*/
|
||||
IP_GLOBAL void
|
||||
ipfreescale_ipsec_sec_notify_error(Ipfreescale_sec_notify *ctx)
|
||||
{
|
||||
ip_assert(ctx != IP_NULL);
|
||||
ip_assert(ctx->kreq != IP_NULL);
|
||||
ip_assert(ctx->pkt != IP_NULL);
|
||||
ip_assert(ctx->block == IP_NULL);
|
||||
|
||||
/* Copy from kernel memory */
|
||||
IPFREESCALE_SEC_GET_KMEM(ipfreescale_sec.fd, &ctx->req.esp_cbc, &ctx->kreq, sizeof(ctx->req.esp_cbc));
|
||||
|
||||
IPCOM_LOG3(ERR, "ipfreescale_ipsec_sec_notify_error() :: ctx 0x%x failed with error %x (%s)", (unsigned) ctx, (unsigned)ctx->req.esp_cbc.status, ipfreescale_sec_err_string(ctx->req.esp_cbc.status));
|
||||
|
||||
/* Free kernel memory */
|
||||
ipfreescale_ipsec_sec_free_kmem(ctx);
|
||||
|
||||
/* Return the packet to the system */
|
||||
iphwcrypto_ipsec_esp_pkt_free(ctx->pkt);
|
||||
|
||||
/* Destroy the context */
|
||||
ipfreescale_sec_destroy_async_context(ctx);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_sec_esp_input
|
||||
*===========================================================================
|
||||
* Description: IPSEC ESP input processing using.
|
||||
* Parameters: data - pointer to the packet data.
|
||||
* length - length of the packet.
|
||||
* outdata - pointer to where output packet data should be stored.
|
||||
* sa - pointer to the sa (tunnel descriptor block).
|
||||
* param - pointer to ipsec parameters.
|
||||
* digest - pointer the message autentication code.
|
||||
* pkt - pointer to the packet structure.
|
||||
* Returns: 2 = kept
|
||||
* 1 = ok
|
||||
* 0 = timeout
|
||||
* -1 = error
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_ipsec_sec_esp_input(Ip_u32 opid,
|
||||
Ip_u8 *data,
|
||||
Ip_u32 length,
|
||||
Ip_u8 *outdata,
|
||||
Iphwcrypto_esp_cbc_sa *sa,
|
||||
Ip_u8 *digest,
|
||||
Ipipsec_param *param,
|
||||
Ipcom_pkt *pkt)
|
||||
{
|
||||
int ret = -1;
|
||||
int fd = ipfreescale_sec.fd;
|
||||
Ipfreescale_sec_notify *ctx;
|
||||
Ip_bool async;
|
||||
|
||||
IPFREESCALE_STATS(op_esp_in++);
|
||||
|
||||
/* Prepare the notify context, check for asynchronous mode */
|
||||
#ifdef IPIPSEC_USE_DAEMONS /* No asynchronous mode */
|
||||
async = IP_FALSE;
|
||||
#else
|
||||
async = IPFREESCALE_SEC_IPSEC_MODE_ASYNC;
|
||||
#endif
|
||||
#ifdef IPIPSEC_USE_DAEMONS /* No asynchronous mode */
|
||||
if(async == IP_FALSE)
|
||||
{
|
||||
ctx = ipfreescale_sec_create_sync_context();
|
||||
if(ctx == IP_NULL)
|
||||
{
|
||||
IPFREESCALE_STATS(req_fail_nosyncctx++);
|
||||
IPCOM_LOG0(INFO, "ipfreescale_ipsec_sec_esp_input() :: ipfreescale_sec_create_sync_context() failed");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
ctx = ipfreescale_sec_ipsec_create_async_context(sa, param, pkt);
|
||||
if(ctx == IP_NULL)
|
||||
{
|
||||
IPFREESCALE_STATS(req_fail_noasyncctx++);
|
||||
IPCOM_LOG0(INFO, "ipfreescale_ipsec_sec_esp_input() :: ipfreescale_sec_create_async_context() failed");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Load descriptor */
|
||||
ctx->req.esp_cbc.opId = opid;
|
||||
ctx->req.esp_cbc.hashKeyBytes = sa->akeylen;
|
||||
ctx->req.esp_cbc.cryptCtxInBytes = sa->ivlen;
|
||||
ctx->req.esp_cbc.cryptKeyBytes = sa->ekeylen;
|
||||
ctx->req.esp_cbc.hashInDataBytes = sa->hdrlen;
|
||||
ctx->req.esp_cbc.inDataBytes = length - sa->hdrlen - sa->authlen;
|
||||
ctx->req.esp_cbc.hashDataOutBytes = sa->hashlen;
|
||||
|
||||
/* Copy to kernel memory */
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, sa->akey, (void **)&ctx->req.esp_cbc.hashKeyData, ctx->req.esp_cbc.hashKeyBytes);
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, sa->ekey, (void **)&ctx->req.esp_cbc.cryptKeyData, ctx->req.esp_cbc.cryptKeyBytes);
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, data, (void **)&ctx->req.esp_cbc.hashInData, length - sa->authlen);
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, ctx->digest, (void **)&ctx->req.esp_cbc.hashDataOut, ctx->req.esp_cbc.hashDataOutBytes);
|
||||
if(ctx->req.esp_cbc.hashKeyData == IP_NULL
|
||||
|| ctx->req.esp_cbc.cryptKeyData == IP_NULL
|
||||
|| ctx->req.esp_cbc.hashInData == IP_NULL
|
||||
|| ctx->req.esp_cbc.hashDataOut == IP_NULL)
|
||||
{
|
||||
IPFREESCALE_STATS(req_fail_nomem++);
|
||||
goto exit;
|
||||
}
|
||||
ctx->req.esp_cbc.cryptCtxInData = ctx->req.esp_cbc.hashInData + sa->hdrlen - sa->ivlen;
|
||||
ctx->req.esp_cbc.inData = ctx->req.esp_cbc.hashInData + sa->hdrlen;
|
||||
ctx->req.esp_cbc.cryptDataOut = ctx->req.esp_cbc.inData;
|
||||
|
||||
/* Engage crypto hardware */
|
||||
ret = ipfreescale_sec_engage(fd, &ctx->req.esp_cbc, sizeof(ctx->req.esp_cbc), async);
|
||||
if(ret == 2)
|
||||
return ret;
|
||||
|
||||
/* Copy from kernel memory */
|
||||
IPFREESCALE_SEC_GET_KMEM(fd, outdata, (void **)&ctx->req.esp_cbc.cryptDataOut, ctx->req.esp_cbc.inDataBytes);
|
||||
IPFREESCALE_SEC_GET_KMEM(fd, ctx->digest, (void **)&ctx->req.esp_cbc.hashDataOut, ctx->req.esp_cbc.hashDataOutBytes);
|
||||
ipcom_memcpy(digest, ctx->digest, IPHWCRYPTO_ENGINE_ESP_MAX_AUTHKEY);
|
||||
|
||||
exit:
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.hashKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.cryptKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.hashInData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.hashDataOut);
|
||||
#ifdef IPIPSEC_USE_DAEMONS /* No asynchronous mode */
|
||||
if(async == IP_FALSE)
|
||||
ipfreescale_sec_destroy_sync_context(ctx);
|
||||
else
|
||||
#endif
|
||||
ipfreescale_sec_destroy_async_context(ctx);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_sec_esp_output
|
||||
*===========================================================================
|
||||
* Description: IPSEC ESP output processing using.
|
||||
* Parameters: indata - pointer to the clear text packet data.
|
||||
* length - length of the packet.
|
||||
* outdata - pointer to the encrypted packet data.
|
||||
* sa - pointer to the sa (tunnel descriptor block).
|
||||
* param - pointer to ipsec parameters.
|
||||
* digest - pointer the message autentication code.
|
||||
* pkt - pointer to the packet structure.
|
||||
* Returns: 2 = kept
|
||||
* 1 = ok
|
||||
* 0 = timeout
|
||||
* -1 = error
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_ipsec_sec_esp_output(Ip_u32 opid,
|
||||
Ip_u8 *indata,
|
||||
Ip_u32 length,
|
||||
Ip_u8 *outdata,
|
||||
Iphwcrypto_esp_cbc_sa *sa,
|
||||
Ip_u8 *digest,
|
||||
Ipipsec_param *param,
|
||||
Ipcom_pkt *pkt)
|
||||
{
|
||||
int ret = -1;
|
||||
int fd = ipfreescale_sec.fd;
|
||||
Ipfreescale_sec_notify *ctx;
|
||||
Ip_bool async;
|
||||
|
||||
IPFREESCALE_STATS(op_esp_out++);
|
||||
|
||||
/* Prepare the notify context, check for asynchronous mode */
|
||||
#ifdef IPIPSEC_USE_DAEMONS /* No asynchronous mode */
|
||||
async = IP_FALSE;
|
||||
#else /* Use mode as in ipfreescale_config.h */
|
||||
async = IPFREESCALE_SEC_IPSEC_MODE_ASYNC;
|
||||
#endif
|
||||
#ifdef IPIPSEC_USE_DAEMONS /* No asynchronous mode */
|
||||
if(async == IP_FALSE)
|
||||
{
|
||||
ctx = ipfreescale_sec_create_sync_context();
|
||||
if(ctx == IP_NULL)
|
||||
{
|
||||
IPFREESCALE_STATS(req_fail_nosyncctx++);
|
||||
IPCOM_LOG0(INFO, "ipfreescale_ipsec_sec_esp_output() :: ipfreescale_sec_create_sync_context() failed");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
ctx = ipfreescale_sec_ipsec_create_async_context(sa, param, pkt);
|
||||
if(ctx == IP_NULL)
|
||||
{
|
||||
IPFREESCALE_STATS(req_fail_noasyncctx++);
|
||||
IPCOM_LOG0(INFO, "ipfreescale_ipsec_sec_esp_output() :: ipfreescale_sec_create_async_context() failed");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Load descriptor */
|
||||
ctx->req.esp_cbc.opId = opid;
|
||||
ctx->req.esp_cbc.hashKeyBytes = sa->akeylen;
|
||||
ctx->req.esp_cbc.cryptCtxInBytes = sa->ivlen;
|
||||
ctx->req.esp_cbc.cryptKeyBytes = sa->ekeylen;
|
||||
ctx->req.esp_cbc.hashInDataBytes = sa->hdrlen;
|
||||
ctx->req.esp_cbc.inDataBytes = length - sa->hdrlen;
|
||||
ctx->req.esp_cbc.hashDataOutBytes = sa->hashlen;
|
||||
|
||||
/* Copy to kernel memory */
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, sa->akey, (void **)&ctx->req.esp_cbc.hashKeyData, ctx->req.esp_cbc.hashKeyBytes);
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, sa->iv, (void **)&ctx->req.esp_cbc.cryptCtxInData, ctx->req.esp_cbc.cryptCtxInBytes);
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, sa->ekey, (void **)&ctx->req.esp_cbc.cryptKeyData, ctx->req.esp_cbc.cryptKeyBytes);
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, indata, (void **)&ctx->req.esp_cbc.hashInData, length);
|
||||
IPFREESCALE_SEC_PUT_KMEM(fd, ctx->digest, (void **)&ctx->req.esp_cbc.hashDataOut, ctx->req.esp_cbc.hashDataOutBytes);
|
||||
if(ctx->req.esp_cbc.hashKeyData == IP_NULL
|
||||
|| ctx->req.esp_cbc.cryptCtxInData == IP_NULL
|
||||
|| ctx->req.esp_cbc.cryptKeyData == IP_NULL
|
||||
|| ctx->req.esp_cbc.hashInData == IP_NULL
|
||||
|| ctx->req.esp_cbc.hashDataOut == IP_NULL)
|
||||
{
|
||||
IPFREESCALE_STATS(req_fail_nomem++);
|
||||
goto exit;
|
||||
}
|
||||
ctx->req.esp_cbc.inData = ctx->req.esp_cbc.hashInData + sa->hdrlen;
|
||||
ctx->req.esp_cbc.cryptDataOut = outdata + sa->hdrlen;
|
||||
|
||||
/* If needed, copy not encrypted header (ESP header, IV) */
|
||||
if(outdata != indata)
|
||||
{
|
||||
ipcom_memcpy(outdata, indata, sa->hdrlen);
|
||||
}
|
||||
|
||||
/* Engage crypto hardware */
|
||||
ret = ipfreescale_sec_engage(fd, &ctx->req.esp_cbc, sizeof(ctx->req.esp_cbc), async);
|
||||
if(ret == 2)
|
||||
return ret;
|
||||
|
||||
/* Copy from kernel memory */
|
||||
IPFREESCALE_SEC_GET_KMEM(fd, outdata + sa->hdrlen, (void **)&ctx->req.esp_cbc.cryptDataOut, ctx->req.esp_cbc.inDataBytes);
|
||||
IPFREESCALE_SEC_GET_KMEM(fd, ctx->digest, (void **)&ctx->req.esp_cbc.hashDataOut, ctx->req.esp_cbc.hashDataOutBytes);
|
||||
ipcom_memcpy(digest, ctx->digest, IPHWCRYPTO_ENGINE_ESP_MAX_AUTHKEY);
|
||||
exit:
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.hashKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.cryptCtxInData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.cryptKeyData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.hashInData);
|
||||
IPFREESCALE_SEC_FREE_KMEM(fd, (void **)&ctx->req.esp_cbc.hashDataOut);
|
||||
|
||||
#ifdef IPIPSEC_USE_DAEMONS /* No asynchronous mode */
|
||||
if(async == IP_FALSE)
|
||||
ipfreescale_sec_destroy_sync_context(ctx);
|
||||
else
|
||||
#endif
|
||||
ipfreescale_sec_destroy_async_context(ctx);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef IPFREESCALE_USE_HW_SA
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_populate_sa
|
||||
*===========================================================================
|
||||
* Description: Populate an ipfreescale HW specific SA structure to enable
|
||||
* protocol aware asynchronous IPsec HW acceleration.
|
||||
* Parameters: sa - pointer to the sa (tunnel descriptor block).
|
||||
* sa_index - index for the sa
|
||||
* enc - pointer the message autentication code.
|
||||
* Returns: 1 = ok
|
||||
* -1 = error
|
||||
*/
|
||||
IP_PUBLIC int ipfreescale_ipsec_populate_sa(Ipcom_fw_ipsec_sa_t *sa,
|
||||
Ip_u16 sa_index,
|
||||
int enc)
|
||||
{
|
||||
int ret;
|
||||
e_IpsecAuthenAlg authAlg;
|
||||
e_IpsecCryptoAlg cryptoAlg;
|
||||
e_IpsecVer ipsecVer;
|
||||
|
||||
ipsecVer = ((sa->domain == IP_AF_INET6)? e_IPSEC_VER_6: e_IPSEC_VER_4);
|
||||
switch(sa->algid)
|
||||
{
|
||||
case IPCOM_FORWARDER_IPSEC_3DES_MD5:
|
||||
authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
cryptoAlg = e_IPSEC_CRYPTO_ALG_3DES;
|
||||
break;
|
||||
case IPCOM_FORWARDER_IPSEC_3DES_SHA1:
|
||||
authAlg= e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
cryptoAlg = e_IPSEC_CRYPTO_ALG_3DES;
|
||||
break;
|
||||
case IPCOM_FORWARDER_IPSEC_AES_MD5:
|
||||
authAlg = e_IPSEC_AUTHEN_ALG_HMAC_MD5_96;
|
||||
cryptoAlg = e_IPSEC_CRYPTO_ALG_AES_CBC;
|
||||
break;
|
||||
case IPCOM_FORWARDER_IPSEC_AES_SHA1:
|
||||
authAlg = e_IPSEC_AUTHEN_ALG_HMAC_SHA1_96;
|
||||
cryptoAlg = e_IPSEC_CRYPTO_ALG_AES_CBC;
|
||||
break;
|
||||
/* TODO: Null cases? Other? Should old limitations remain?*/
|
||||
default:
|
||||
cryptoAlg = e_IPSEC_CRYPTO_ALG_NULL_ENC; /* TODO ???*/
|
||||
break;
|
||||
}
|
||||
|
||||
ret = SEC4_populate_sa(sa->spi, ipsecVer, sa->proto, authAlg, cryptoAlg,
|
||||
sa->akey, sa->akeylen, sa->ekey, sa->ekeylen, sa->iv_in,
|
||||
sa_index, enc);
|
||||
|
||||
if(ret == SEC4_SUCCESS)
|
||||
return 1;
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_esp_encrypt
|
||||
*===========================================================================
|
||||
* Description: Asynchronous IPSEC ESP output (encrypt) processing using a previously
|
||||
* populated SA.
|
||||
* Parameters: sa_index - index for the SA
|
||||
* seq_no - sequence number for the ESP packet TODO: Not used by ipfreescale. This needs to be in populate SA!
|
||||
* iv - Initilization vector for the encryption TODO: Not used by ipfreescale
|
||||
* p - Pointer to memory buffer with packet to encrypt
|
||||
* inOffset - Offset to first byte to encrypt
|
||||
* pktlen - Number of bytes to encrypt
|
||||
* outOffset- Offset to where the encrypted packet will be stored
|
||||
* poolId - Memory buffer pool ID for packet
|
||||
* Returns: 2 = kept (packet asyncronously sent for encryption)
|
||||
* -1 = error
|
||||
*/
|
||||
IP_PUBLIC int ipfreescale_ipsec_esp_encrypt(Ip_u16 sa_index,
|
||||
Ip_u32 seq_no,
|
||||
Ip_u8 *iv,
|
||||
Ip_u8 *p,
|
||||
Ip_u16 inOffset,
|
||||
Ip_u16 pktlen,
|
||||
Ip_u16 outOffset,
|
||||
Ip_u8 poolId)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* SEC4 will handle IV on its own */
|
||||
(void) iv;
|
||||
|
||||
ret = SEC4_ipsec_esp_encrypt(sa_index, p, inOffset, pktlen, outOffset, poolId);
|
||||
|
||||
if(ret == SEC4_SUCCESS)
|
||||
return 2; /* Packet kept (asynchronously sent for encryption) */
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_esp_decrypt
|
||||
*===========================================================================
|
||||
* Description: Asynchronous IPSEC ESP input (encrypt) processing using a previously
|
||||
* populated SA.
|
||||
* Parameters: sa_index - index for the SA
|
||||
* p - Pointer to memory buffer with packet to decrypt
|
||||
* offset - Offset to first byte to decrypt
|
||||
* pktlen - Number of bytes to decrypt
|
||||
* out - Where the decrypted packet will be stored
|
||||
* poolId - Memory buffer pool ID for packet
|
||||
* Returns: 2 = kept (packet asyncronously sent for decryption)
|
||||
* -1 = error
|
||||
*/
|
||||
IP_PUBLIC int ipfreescale_ipsec_esp_decrypt(Ip_u16 sa_index,
|
||||
Ip_u8 *p,
|
||||
Ip_u16 inOffset,
|
||||
Ip_u16 pktlen,
|
||||
Ip_u16 outOffset,
|
||||
Ip_u8 poolId)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = SEC4_ipsec_esp_decrypt(sa_index, p, inOffset, pktlen, outOffset, poolId);
|
||||
|
||||
if(ret == SEC4_SUCCESS)
|
||||
return 2; /* Packet kept (asynchronously sent for decryption) */
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_set_enqueue_resource
|
||||
*===========================================================================
|
||||
* Description: Set the resource to use when enqueueing jobs to the crypto HW
|
||||
*
|
||||
* Parameters: resource - Pointer to HW specific resource structure
|
||||
* Returns:
|
||||
*/
|
||||
IP_PUBLIC void ipfreescale_ipsec_set_enqueue_resource(void *resource)
|
||||
{
|
||||
SEC4_qportal_set(resource);
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_set_buffer_resource
|
||||
*===========================================================================
|
||||
* Description: Set the resource that ipfreescale should use to request for
|
||||
* packet buffers
|
||||
*
|
||||
* Parameters: resource - Pointer to HW specific resource structure
|
||||
* poolId - ID for memory pool to allocate memory buffers used by HW.
|
||||
* (Not packet buffers)
|
||||
* Returns:
|
||||
*/
|
||||
IP_PUBLIC void ipfreescale_ipsec_set_buffer_resource(void *resource, Ip_u32 poolId)
|
||||
{
|
||||
SEC4_bportal_set(resource, (uint32_t) poolId);
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_set_enqueue_ix_base
|
||||
*===========================================================================
|
||||
* Description: Set the base index to the queues to enqueue IPsec jobs to
|
||||
* the crypto HW
|
||||
*
|
||||
* Parameters: ixBase - Base index for the HW queues
|
||||
* Returns:
|
||||
*/
|
||||
IP_PUBLIC void ipfreescale_ipsec_set_enqueue_ix_base(Ip_u32 ixBase)
|
||||
{
|
||||
SEC4_qman_enqueue_fqix_base_set((uint32_t) ixBase);
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_set_dequeue_ix
|
||||
*===========================================================================
|
||||
* Description: Set the index to the completion queues to dequeue
|
||||
* completed IPsec jobs from the crypto HW
|
||||
*
|
||||
* Parameters: ixBaseEncrypt - index for the HW queues for completed encrypt IPsec jobs from
|
||||
* crypto engine
|
||||
* ixBaseDecrypt - index for the HW queues for completed decrypt IPsec jobs from
|
||||
* crypto engine
|
||||
* Returns:
|
||||
*/
|
||||
IP_PUBLIC void ipfreescale_ipsec_set_dequeue_ix(Ip_u32 ixBaseEncrypt, Ip_u32 ixBaseDecrypt)
|
||||
{
|
||||
SEC4_qman_dequeue_fqix_set((uint32_t) ixBaseEncrypt, (uint32_t) ixBaseDecrypt);
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_set_sa_cache
|
||||
*===========================================================================
|
||||
* Description: Set where the IPsec SA cache should reside in memory
|
||||
*
|
||||
* Parameters: noofEntries - Number of IPsec SA cache entries in SA cache
|
||||
*
|
||||
* Returns:
|
||||
*/
|
||||
IP_PUBLIC void ipfreescale_ipsec_set_sa_cache_size(Ip_u32 noofEntries)
|
||||
{
|
||||
SEC4_ipsec_set_sa_cache_size((uint32_t)noofEntries);
|
||||
}
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_ipsec_set_shm
|
||||
*===========================================================================
|
||||
* Description: Set where the shared memory resides in memory
|
||||
*
|
||||
* Parameters: p - pointer to memory location of shared memory
|
||||
* size - Number of bytes available
|
||||
*
|
||||
* Returns:
|
||||
*/
|
||||
IP_PUBLIC void ipfreescale_ipsec_set_shm(void *p, Ip_u32 size)
|
||||
{
|
||||
SEC4_ipsec_set_shm(p, (uint32_t)size);
|
||||
}
|
||||
|
||||
#endif /* IPFREESCALE_USE_HW_SA */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 11 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#else
|
||||
int ipfreescale_ipsec_sec_empty_file;
|
||||
#endif /* #if (defined(IPFREESCALE_SEC4) || defined(IPFREESCALE_SEC2)) && defined(IPIPSEC2) */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
@@ -0,0 +1,673 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK SOURCE FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_os.c,v $ $Revision: 1.10.40.1 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/src/ipfreescale_os.c,v $
|
||||
* $Author: svc-cmnet $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
* IPFREESCALE - Hardware crypto support product - operating system dependencies
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
#include "ipfreescale_config.h"
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef IP_PORT_LAS
|
||||
#define IPCOM_USE_CLIB_PROTO
|
||||
#endif
|
||||
#include <ipcom_type.h>
|
||||
#include <ipcom_cstyle.h>
|
||||
#include <ipcom_clib.h>
|
||||
#include <ipcom_syslog.h>
|
||||
#include <ipcom_err.h>
|
||||
#include <ipcom_os.h>
|
||||
|
||||
/* LKM specific include files */
|
||||
#ifdef IP_PORT_LKM
|
||||
#ifndef __KERNEL__
|
||||
#define __KERNEL__
|
||||
#endif
|
||||
#endif /* #ifdef IP_PORT_LKM */
|
||||
|
||||
/* TODO: Not pretty! Nasty dependencies between files */
|
||||
/* Include ipfreescale_sec4.h before iphwcrypto.h to avoid type collision for uint32_t between stdint.h and ipipsec_pfkeyv2.h */
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
#define IPIPSEC_HAVE_UINT_TYPE
|
||||
#endif
|
||||
#if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4)
|
||||
#include "ipfreescale_sec.h"
|
||||
#endif
|
||||
|
||||
#include <iphwcrypto.h>
|
||||
|
||||
#include "ipfreescale.h"
|
||||
#include "ipfreescale_h.h"
|
||||
|
||||
#ifdef IPFREESCALE_COLDFIRE
|
||||
#include "ipfreescale_coldfire.h"
|
||||
#endif
|
||||
|
||||
/* LAS and UNIX specific include files */
|
||||
#if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX)
|
||||
#include <signal.h>
|
||||
#include <errno.h>
|
||||
#include <unistd.h>
|
||||
#include <fcntl.h>
|
||||
#include <sys/ioctl.h>
|
||||
#endif /* #if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX) */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* name of the sec character device */
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#define SEC_DEVNAME "/dev/sec2"
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
#define SEC_DEVNAME "/dev/sec4"
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 EXTERN PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* VxWorks specific funtions */
|
||||
#ifdef IP_PORT_VXWORKS
|
||||
#define DATA_CACHE 1
|
||||
IP_EXTERN int cacheFlush (int cache, void *adrs, Ip_size_t bytes);
|
||||
#endif
|
||||
|
||||
/* Integrity specific functions */
|
||||
#ifdef IP_PORT_INTEGRITY
|
||||
typedef unsigned long Address;
|
||||
IP_EXTERN int ASP_FlushCaches(Address addr, Address size);
|
||||
#endif
|
||||
|
||||
#ifdef IP_PORT_LKM
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
IP_EXTERN int SEC2_ioctl(void *, void *, unsigned int, unsigned long);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS)
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
IP_EXTERN int SEC2_ioctl(int, register int, register void *);
|
||||
IP_EXTERN int SEC2DriverInit(void);
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
IP_EXTERN int SEC4_ioctl(int, register int, register void *);
|
||||
IP_EXTERN int SEC4DriverInit(uint32_t cpuId, uint8_t jqIrqCoalCnt,
|
||||
uint16_t jqIrqCoalTime, uint16_t jqIRSize,
|
||||
uint16_t jqORSize);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 7 LOCAL PROTOTYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 8 DATA
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 9 STATIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX)
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_signal_dispatcher
|
||||
*===========================================================================
|
||||
* Description: Signal dispatcher task for sec2 completion events from the
|
||||
* kernel. When a descriptor completes in the linux kernel the
|
||||
* POSIX signals SIGUSR1 and SIGUSR2 are used to notify the user
|
||||
* space process about the completion event. The signal dispatcher
|
||||
* task receives the signals and calls the corresponding notification
|
||||
* function, which in turn posts the synchronization object in order
|
||||
* to unblock the calling task.
|
||||
* Parameters: none.
|
||||
* Returns: nothing.
|
||||
*
|
||||
*/
|
||||
IP_STATIC
|
||||
IPCOM_PROCESS(ipfreescale_signal_dispatcher)
|
||||
{
|
||||
Ipfreescale_sec_notify *ctx;
|
||||
sigset_t signalset;
|
||||
int signum, ret;
|
||||
unsigned long request;
|
||||
|
||||
ipcom_proc_init();
|
||||
|
||||
/* Signal handling in LinuxThreads departs significantly from the POSIX standard. According to the
|
||||
standard, ``asynchronous'' (external) signals are addressed to the whole process (the collection of
|
||||
all threads), which then delivers them to one particular thread. The thread that actually receives
|
||||
the signal is any thread that does not currently block the signal.
|
||||
|
||||
In LinuxThreads, each thread is actually a kernel process with its own PID, so external signals are
|
||||
always directed to one particular thread. If, for instance, another thread is blocked in sigwait on
|
||||
that signal, it will not be restarted. */
|
||||
|
||||
/* Get process id */
|
||||
ipfreescale_sec.pid = getpid();
|
||||
|
||||
/* Get thread id */
|
||||
ipfreescale_sec.threadid = ipcom_getpid();
|
||||
|
||||
/* Block signals SIGUSR1 and SIGUSR2 */
|
||||
sigemptyset(&signalset);
|
||||
sigaddset(&signalset, SIGUSR1);
|
||||
sigaddset(&signalset, SIGUSR2);
|
||||
pthread_sigmask(SIG_BLOCK, &signalset, IP_NULL);
|
||||
|
||||
/* Release semaphore */
|
||||
ipcom_sem_post(ipfreescale_sec.disp_sem);
|
||||
|
||||
/* Loop forever, waiting for signals */
|
||||
while(1)
|
||||
{
|
||||
sigwait(&signalset, &signum);
|
||||
switch(signum)
|
||||
{
|
||||
case SIGUSR1:
|
||||
request = IOCTL_GET_DONE;
|
||||
break;
|
||||
case SIGUSR2:
|
||||
request = IOCTL_GET_ERROR;
|
||||
break;
|
||||
default:
|
||||
IPCOM_LOG1(ERR, "ipfreescale_signal_dispatcher() :: received unhandled signal %d", signum);
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Get all contexts */
|
||||
do
|
||||
{
|
||||
ret = ipfreescale_sec_ioctl(ipfreescale_sec.fd, request, &ctx);
|
||||
if(ret)
|
||||
{
|
||||
IPCOM_LOG1(ERR, "ipfreescale_signal_dispatcher() :: ipfreescale_sec_ioct() failed %d", ret);
|
||||
ctx = IP_NULL;
|
||||
}
|
||||
if(ctx != IP_NULL)
|
||||
{
|
||||
if(request == IOCTL_GET_DONE)
|
||||
ipfreescale_sec_notify_done(ctx);
|
||||
else
|
||||
ipfreescale_sec_notify_error(ctx);
|
||||
}
|
||||
}
|
||||
while(ctx != IP_NULL);
|
||||
}
|
||||
|
||||
IP_PANIC();
|
||||
ipcom_proc_exit();
|
||||
}
|
||||
#endif /* #if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX) */
|
||||
#endif /* #ifdef IPFREESCALE_SEC2 */
|
||||
|
||||
#if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4)
|
||||
#if defined(IP_PORT_LKM) || defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS)
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_complete_done
|
||||
*===========================================================================
|
||||
* Description: Callback function for sec completion events. When the sec
|
||||
* driver is used from kernel space this function is called
|
||||
* to signal the completion event. It calls the notification
|
||||
* function which posts the synchronization object and thereby
|
||||
* the calling task is unblocked.
|
||||
* Parameters: pCtx - pointer to the sec context.
|
||||
* Returns: nothing.
|
||||
*
|
||||
*/
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#define PSEC_NOTIFY_CTX PSEC2_NOTIFY_CTX
|
||||
#define PSEC_NOTIFY_ON_ERROR_CTX PSEC2_NOTIFY_ON_ERROR_CTX
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
#define PSEC_NOTIFY_CTX PSEC4_NOTIFY_CTX
|
||||
#define PSEC_NOTIFY_ON_ERROR_CTX PSEC4_NOTIFY_ON_ERROR_CTX
|
||||
#endif
|
||||
|
||||
IP_STATIC void
|
||||
ipfreescale_sec_complete_done(PSEC_NOTIFY_CTX pCtx)
|
||||
{
|
||||
ipfreescale_sec_notify_done((Ipfreescale_sec_notify *)pCtx);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_complete_error
|
||||
*===========================================================================
|
||||
* Description: Callback function for sec error completion events. When the sec
|
||||
* driver is used from kernel space this function is called
|
||||
* to signal the error completion event. It calls the notification
|
||||
* function which posts the synchronization object and thereby
|
||||
* the calling task is unblocked.
|
||||
* Parameters: pErrCtx - pointer to the sec error context.
|
||||
* Returns: nothing.
|
||||
*
|
||||
*/
|
||||
IP_STATIC void
|
||||
ipfreescale_sec_complete_error(PSEC_NOTIFY_ON_ERROR_CTX pErrCtx)
|
||||
{
|
||||
ipfreescale_sec_notify_error((Ipfreescale_sec_notify *)((GENERIC_REQ *)pErrCtx->request)->pNotifyCtx);
|
||||
}
|
||||
#endif /* #if defined(IP_PORT_LKM) || defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS) */
|
||||
#endif /* #if defined (IPFREESCALE_SEC2) || defined (IPFREESCALE_SEC4) */
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 10 GLOBAL FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4)
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_arm_completion
|
||||
*===========================================================================
|
||||
* Description: Prepare completion event type. In kernel space callback
|
||||
* functions are used while the user space version
|
||||
* makes use of POSIX signals.
|
||||
* Parameters: rq - pointer to the generic request structure.
|
||||
* Returns: nothing.
|
||||
*
|
||||
*/
|
||||
IP_GLOBAL void
|
||||
ipfreescale_sec_arm_completion(GENERIC_REQ *rq)
|
||||
{
|
||||
#if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX)
|
||||
rq->notify = (PSEC_NOTIFY_ROUTINE)ipfreescale_sec.pid;
|
||||
rq->notify_on_error = (PSEC_NOTIFY_ON_ERROR_ROUTINE)ipfreescale_sec.pid;
|
||||
rq->notifyFlags = (NOTIFY_IS_PID | NOTIFY_ERROR_IS_PID);
|
||||
#endif /* #if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX) */
|
||||
|
||||
#if defined(IP_PORT_LKM) || defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS)
|
||||
rq->notify = ipfreescale_sec_complete_done;
|
||||
rq->notify_on_error = ipfreescale_sec_complete_error;
|
||||
rq->notifyFlags = 0;
|
||||
#endif /* #if defined(IP_PORT_LKM) || defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS) */
|
||||
}
|
||||
#endif /* #if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4) */
|
||||
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX)
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_malloc_kmem
|
||||
*===========================================================================
|
||||
* Description: Allocates a block of kernel memory to be used in a sec descriptor.
|
||||
* This function is not required for accessing the sec driver
|
||||
* in kernel space.
|
||||
* Parameters: fd - file descriptor for accessing the sec driver.
|
||||
* block - pointer to pointer to the allocated memory block.
|
||||
* size - the size of the memory block in bytes.
|
||||
* Returns: SEC2_MALLOC_FAILED = allocation failed.
|
||||
* SEC2_SUCCESS = ok.
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_sec_malloc_kmem(int fd, void **block, unsigned int size)
|
||||
{
|
||||
MALLOC_REQ kmem;
|
||||
int iostat;
|
||||
|
||||
*block = IP_NULL;
|
||||
kmem.pid = getpid();
|
||||
kmem.sz = size;
|
||||
iostat = ipfreescale_sec_ioctl(fd, IOCTL_MALLOC, &kmem);
|
||||
if (iostat == (int)SEC2_MALLOC_FAILED)
|
||||
return iostat;
|
||||
*block = kmem.ptr;
|
||||
return iostat;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_copyto_kmem
|
||||
*===========================================================================
|
||||
* Description: Copy from user space memory to kernel space memory.
|
||||
* This function is not required for accessing the sec driver
|
||||
* in kernel space.
|
||||
* Parameters: fd - file descriptor for accessing the sec driver.
|
||||
* data - pointer to the user space memory buffer.
|
||||
* block - pointer to the kernel space memory buffer.
|
||||
* size - the number of bytes to copy.
|
||||
* Returns: nothing.
|
||||
*/
|
||||
IP_GLOBAL void
|
||||
ipfreescale_sec_copyto_kmem(int fd, void *data, void *block, unsigned int size)
|
||||
{
|
||||
MALLOC_REQ kmem;
|
||||
|
||||
kmem.pid = getpid();
|
||||
kmem.sz = size;
|
||||
kmem.ptr = block;
|
||||
kmem.from = data;
|
||||
kmem.to = kmem.ptr;
|
||||
ipfreescale_sec_ioctl(fd, IOCTL_COPYFROM, &kmem);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_put_kmem
|
||||
*===========================================================================
|
||||
* Description: Allocate kernel space memory and copy from user space memory
|
||||
* to the allocated kernel space memory. In kernel space
|
||||
* the function merely lets the kernel space pointer point to the
|
||||
* "user" space buffer.
|
||||
* Parameters: fd - file descriptor for accessing the sec driver.
|
||||
* data - pointer to the user space memory buffer.
|
||||
* block - pointer to pointer the kernel space memory buffer.
|
||||
* size - the number of bytes to allocate and copy.
|
||||
* Returns: SEC2_MALLOC_FAILED = allocation failed.
|
||||
* SEC2_SUCCESS = ok.
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_sec_put_kmem(int fd, IP_CONST void *data, void **block, unsigned int size)
|
||||
{
|
||||
MALLOC_REQ kmem;
|
||||
int iostat;
|
||||
|
||||
kmem.pid = getpid();
|
||||
kmem.sz = size;
|
||||
iostat = ipfreescale_sec_ioctl(fd, IOCTL_MALLOC, &kmem);
|
||||
if (iostat == (int)SEC2_MALLOC_FAILED)
|
||||
return iostat;
|
||||
|
||||
*block = kmem.ptr;
|
||||
|
||||
if (data != IP_NULL)
|
||||
{
|
||||
kmem.from = (char *)data;
|
||||
kmem.to = kmem.ptr;
|
||||
iostat = ipfreescale_sec_ioctl(fd, IOCTL_COPYFROM, &kmem);
|
||||
}
|
||||
|
||||
return iostat;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_get_kmem
|
||||
*===========================================================================
|
||||
* Description: Copy from kernel space to user space memory. In kernel space
|
||||
* the function does nothing since the "user" space buffer
|
||||
* already points to the correct buffer
|
||||
* Parameters: fd - file descriptor for accessing the sec driver.
|
||||
* data - pointer to the user space memory buffer.
|
||||
* block - pointer to pointer the kernel space memory buffer.
|
||||
* size - the number of bytes to copy.
|
||||
* Returns: SEC2_SUCCESS = ok.
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_sec_get_kmem(int fd, void *data, void **block, unsigned int size)
|
||||
{
|
||||
MALLOC_REQ kmem;
|
||||
|
||||
kmem.pid = getpid();
|
||||
kmem.sz = size;
|
||||
kmem.to = data;
|
||||
kmem.from = *block;
|
||||
return ipfreescale_sec_ioctl(fd, IOCTL_COPYTO, &kmem);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_free_kmem
|
||||
*===========================================================================
|
||||
* Description: Free kernel space memory. In kernel space the function does
|
||||
* nothing since no extra memory has been allocated.
|
||||
* Parameters: fd - file descriptor for accessing the sec driver.
|
||||
* block - pointer to pointer the kernel space memory buffer.
|
||||
* Returns: SEC2_SUCCESS = ok.
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_sec_free_kmem(int fd, void **block)
|
||||
{
|
||||
if (*block != IP_NULL)
|
||||
return ipfreescale_sec_ioctl(fd, IOCTL_FREE, *block);
|
||||
return SEC2_SUCCESS;
|
||||
}
|
||||
#endif /* #if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX) */
|
||||
#endif /* #ifdef IPFREESCALE_SEC2 */
|
||||
|
||||
#if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4)
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_ioctl
|
||||
*===========================================================================
|
||||
* Description: Accesses the sec driver using an ioctl call. In kernel space the
|
||||
* driver's internal ioctl function is used directly.
|
||||
* Parameters: fd - file descriptor for accessing the sec driver.
|
||||
* request - type of request.
|
||||
* argp - pointer to ioctl data.
|
||||
* Returns: SEC2_SUCCESS = ok.
|
||||
* Error code = failure.
|
||||
*/
|
||||
IP_GLOBAL int
|
||||
ipfreescale_sec_ioctl(int fd, unsigned long request, void *argp)
|
||||
{
|
||||
#if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX)
|
||||
return ioctl(fd, request, argp);
|
||||
#endif /* #if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX) */
|
||||
|
||||
#ifdef IP_PORT_LKM
|
||||
return SEC2_ioctl(IP_NULL, IP_NULL, (unsigned int)request, (unsigned long)argp);
|
||||
#endif /* #ifdef IP_PORT_LKM */
|
||||
|
||||
#if defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS)
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
return SEC2_ioctl(0, (int)request, argp);
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
return SEC4_ioctl(0, (int)request, argp);
|
||||
#endif
|
||||
|
||||
#endif /* #if defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS) */
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_sec_open
|
||||
*===========================================================================
|
||||
* Description: Opens the sec driver. In kernel space this function does
|
||||
* nothing except for assigning the file descriptor a reasonable
|
||||
* value.
|
||||
* Parameters: none.
|
||||
* Returns: IPCOM_SUCCESS = ok.
|
||||
* IPCOM_ERR_FAILED = failed to open driver.
|
||||
*/
|
||||
IP_GLOBAL Ip_err
|
||||
ipfreescale_sec_open(void)
|
||||
{
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
Ip_u8 jqIrqCoalCnt = 0; /* SEC4 job queue interrupt coalescing count threshold */
|
||||
Ip_u16 jqIrqCoalTime = 0; /* SEC4 job queue interrupt coalescing time threshold */
|
||||
Ip_u16 jqIRSize = 0; /* SEC4 job queue input ring size */
|
||||
Ip_u16 jqORSize = 0; /* SEC4 job queue output ring size */
|
||||
Ip_u32 cpuId = 0; /* Used in NAE builds to select SEC4 resources based on current CPU */
|
||||
#endif
|
||||
#if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX)
|
||||
Ip_err ret;
|
||||
|
||||
/* Create the signal dispatcher task */
|
||||
ret = ipcom_proc_create("ipfreescale_signal_dispatcher", ipfreescale_signal_dispatcher, IPCOM_PROC_STACK_DEFAULT, IP_NULL);
|
||||
if(ret != IPCOM_SUCCESS)
|
||||
{
|
||||
IPCOM_LOG0(ERR, "ipfreescale_sec_open() :: failed to create signal dispatcher");
|
||||
return IPCOM_ERR_FAILED;
|
||||
}
|
||||
|
||||
/* Make sure signal dispatcher has started */
|
||||
ipcom_sem_wait(ipfreescale_sec.disp_sem);
|
||||
|
||||
/* Open the device */
|
||||
ipfreescale_sec.fd = open(SEC_DEVNAME, O_RDWR, 0);
|
||||
if(ipfreescale_sec.fd == -1)
|
||||
{
|
||||
IPCOM_LOG2(ERR, "ipfreescale_sec_open(): can't open %s, error = %d: ", SEC_DEVNAME, errno);
|
||||
return IPCOM_ERR_FAILED;
|
||||
}
|
||||
#endif /* #if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX) */
|
||||
|
||||
#if defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS)
|
||||
int status;
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
status = SEC2DriverInit();
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
#ifdef _WRS_CONFIG_WRHV_GUEST
|
||||
/* Get the sequential core id in order to use the correct SEC4 job queue */
|
||||
cpuId = ipcom_nae_seq_id_impl();
|
||||
#endif
|
||||
jqIrqCoalCnt = (Ip_u8) ipcom_sysvar_get_as_int("ipfreescale.sec4.IrqCoalescingCount", 1);
|
||||
jqIrqCoalTime = (Ip_u16) ipcom_sysvar_get_as_int("ipfreescale.sec4.IrqCoalescingTime", 0);
|
||||
jqIRSize = (Ip_u16) ipcom_sysvar_get_as_int("ipfreescale.sec4.JobQueueInputRingSize", 256);
|
||||
jqORSize = (Ip_u16) ipcom_sysvar_get_as_int("ipfreescale.sec4.JobQueueOutputRingSize", 256);
|
||||
status = SEC4DriverInit(cpuId, jqIrqCoalCnt, jqIrqCoalTime, jqIRSize, jqORSize);
|
||||
#endif
|
||||
if (status)
|
||||
{
|
||||
IPCOM_LOG2(ERR, "ipfreescale_sec_open() :: failed with error %x (%s)", status, ipfreescale_sec_err_string(status));
|
||||
return IPCOM_ERR_FAILED;
|
||||
}
|
||||
#endif /* #if defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS) */
|
||||
|
||||
#if defined(IP_PORT_LKM) || defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS)
|
||||
ipfreescale_sec.fd = 0;
|
||||
#endif /* #if defined(IP_PORT_LKM) || defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS) */
|
||||
|
||||
return IPCOM_SUCCESS;
|
||||
}
|
||||
#endif /* #if defined(IPFREESCALE_SEC2) || defined(IPFREESCALE_SEC4) */
|
||||
|
||||
#ifdef IPFREESCALE_COLDFIRE
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_coldfire_flush_descriptor
|
||||
*===========================================================================
|
||||
* Description: Flush Coldfire SEC descriptor.
|
||||
* Parameters: descr - pointer to the descriptor.
|
||||
* Returns: nothing.
|
||||
*/
|
||||
IP_GLOBAL void
|
||||
ipfreescale_coldfire_flush_descriptor(Ipfreescale_coldfire_descriptor *descr)
|
||||
{
|
||||
#ifdef IP_PORT_INTEGRITY
|
||||
(void)ASP_FlushCaches((Address)descr, (Address)sizeof(*descr));
|
||||
if(descr->ptr_1 != IP_NULL)
|
||||
(void)ASP_FlushCaches((Address)descr->ptr_1, (Address)descr->len_1);
|
||||
if(descr->ptr_2 != IP_NULL)
|
||||
(void)ASP_FlushCaches((Address)descr->ptr_2, (Address)descr->len_2);
|
||||
if(descr->ptr_3 != IP_NULL)
|
||||
(void)ASP_FlushCaches((Address)descr->ptr_3, (Address)descr->len_3);
|
||||
if(descr->ptr_4 != IP_NULL)
|
||||
(void)ASP_FlushCaches((Address)descr->ptr_4, (Address)descr->len_4);
|
||||
if(descr->ptr_5 != IP_NULL)
|
||||
(void)ASP_FlushCaches((Address)descr->ptr_5, (Address)descr->len_5);
|
||||
if(descr->ptr_6 != IP_NULL)
|
||||
(void)ASP_FlushCaches((Address)descr->ptr_6, (Address)descr->len_6);
|
||||
if(descr->ptr_7 != IP_NULL)
|
||||
(void)ASP_FlushCaches((Address)descr->ptr_7, (Address)descr->len_7);
|
||||
#endif /* #ifdef IP_PORT_INTEGRITY */
|
||||
|
||||
#ifdef IP_PORT_VXWORKS
|
||||
(void)cacheFlush(DATA_CACHE, descr, sizeof(*descr));
|
||||
if(descr->ptr_1 != IP_NULL)
|
||||
(void)cacheFlush(DATA_CACHE, descr->ptr_1, descr->len_1);
|
||||
if(descr->ptr_2 != IP_NULL)
|
||||
(void)cacheFlush(DATA_CACHE, descr->ptr_2, descr->len_2);
|
||||
if(descr->ptr_3 != IP_NULL)
|
||||
(void)cacheFlush(DATA_CACHE, descr->ptr_3, descr->len_3);
|
||||
if(descr->ptr_4 != IP_NULL)
|
||||
(void)cacheFlush(DATA_CACHE, descr->ptr_4, descr->len_4);
|
||||
if(descr->ptr_5 != IP_NULL)
|
||||
(void)cacheFlush(DATA_CACHE, descr->ptr_5, descr->len_5);
|
||||
if(descr->ptr_6 != IP_NULL)
|
||||
(void)cacheFlush(DATA_CACHE, descr->ptr_6, descr->len_6);
|
||||
if(descr->ptr_7 != IP_NULL)
|
||||
(void)cacheFlush(DATA_CACHE, descr->ptr_7, descr->len_7);
|
||||
#endif /* #ifdef IP_PORT_VXWORKS */
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* ipfreescale_coldfire_yield_task
|
||||
*===========================================================================
|
||||
* Description: Yields calling task in order to give other tasks of the same
|
||||
* priority a chance to execute.
|
||||
* Parameters: none.
|
||||
* Returns: nothing.
|
||||
*/
|
||||
IP_GLOBAL void
|
||||
ipfreescale_coldfire_yield_task(void)
|
||||
{
|
||||
#ifdef IPFREESCALE_COLDFIRE_USE_YIELD
|
||||
(void)ipcom_proc_yield();
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* #ifdef IPFREESCALE_COLDFIRE */
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 11 PUBLIC FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,353 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
* INTERPEAK INTERNAL API HEADER FILE
|
||||
*
|
||||
* Document no: @(#) $Name: VXWORKS_ITER40_2019102207 $ $RCSfile: ipfreescale_sec.h,v $ $Revision: 1.7.12.2 $
|
||||
* $Source: /home/interpeak/CVSRoot/ipfreescale/src/ipfreescale_sec.h,v $
|
||||
* $Author: svc-cmnet $ $Date: 2013-03-13 07:45:25 $
|
||||
* $State: Exp $ $Locker: $
|
||||
*
|
||||
* INTERPEAK_COPYRIGHT_STRING
|
||||
* Design and implementation by Markus Carlstedt <markus@interpeak.se>
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef IPFREESCALE_SEC_H
|
||||
#define IPFREESCALE_SEC_H
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 1 DESCRIPTION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 2 CONFIGURATION
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#include "ipfreescale_config.h"
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 3 INCLUDE FILES
|
||||
****************************************************************************
|
||||
*/
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
#include "Sec4.h"
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#include "Sec2.h"
|
||||
#endif
|
||||
|
||||
#include <ipcom_type.h>
|
||||
#include <ipcom_cstyle.h>
|
||||
#include <ipcom_os.h>
|
||||
#include <ipcom_spinlock.h>
|
||||
#ifdef IPIPSEC2
|
||||
#include <ipcom_pkt.h>
|
||||
#include <iphwcrypto.h>
|
||||
#include <ipipsec.h>
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 4 DEFINES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef IPFREESCALE_USE_STATISTICS
|
||||
#define IPFREESCALE_STATS(var) ipfreescale_sec.stats.var
|
||||
#else
|
||||
#define IPFREESCALE_STATS(var) IP_NOOP
|
||||
#endif
|
||||
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
#define IPFREESCALE_SEC_NUM_CHANNELS 4
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
/* One (of total four) job queues in SEC4 is used */
|
||||
#define IPFREESCALE_SEC_NUM_CHANNELS 1
|
||||
#endif
|
||||
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
/* The number of asynchronous contexts is set using a sysvar on SEC4 */
|
||||
#else
|
||||
/* The number of asynchronous contexts is the driver queue length plus
|
||||
the number of SEC channels */
|
||||
#ifdef IP_PORT_LKM
|
||||
#define IPFREESCALE_SEC_NUM_ASYNC_CONTEXTS (128+IPFREESCALE_SEC_NUM_CHANNELS)
|
||||
#else
|
||||
#define IPFREESCALE_SEC_NUM_ASYNC_CONTEXTS (32+IPFREESCALE_SEC_NUM_CHANNELS)
|
||||
#endif
|
||||
#endif /* #ifdef IPFREESCALE_SEC4 */
|
||||
|
||||
/* The number of synchronous contexts is the number of tasks that are allowed
|
||||
to access the SEC simultaneously */
|
||||
#define IPFREESCALE_SEC_NUM_SYNC_CONTEXTS IPFREESCALE_SEC_NUM_TASKS
|
||||
|
||||
|
||||
#if defined(IP_PORT_LAS) || defined(IP_PORT_UNIX)
|
||||
#define IPFREESCALE_SEC_PUT_KMEM(fd, data, block, size) ipfreescale_sec_put_kmem(fd, data, block, size)
|
||||
#define IPFREESCALE_SEC_GET_KMEM(fd, data, block, size) ipfreescale_sec_get_kmem(fd, data, block, size)
|
||||
#define IPFREESCALE_SEC_FREE_KMEM(fd, block) ipfreescale_sec_free_kmem(fd, block)
|
||||
#define IPFREESCALE_SEC_MALLOC_KMEM(fd, block, size) ipfreescale_sec_malloc_kmem(fd, block, size)
|
||||
#define IPFREESCALE_SEC_COPYTO_KMEM(fd, data, block, size) ipfreescale_sec_copyto_kmem(fd, data, block, size)
|
||||
#endif
|
||||
|
||||
#if defined(IP_PORT_LKM) || defined(IP_PORT_INTEGRITY) || defined(IP_PORT_VXWORKS)
|
||||
#define IPFREESCALE_SEC_PUT_KMEM(fd, data, block, size) *(block) = (char *)(data)
|
||||
#define IPFREESCALE_SEC_GET_KMEM(fd, data, block, size) IP_NOOP
|
||||
#define IPFREESCALE_SEC_FREE_KMEM(fd, block) IP_NOOP
|
||||
#define IPFREESCALE_SEC_MALLOC_KMEM(fd, block, size) IP_NOOP
|
||||
#define IPFREESCALE_SEC_COPYTO_KMEM(fd, data, block, size) IP_NOOP
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 5 TYPES
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_sec_notify
|
||||
*===========================================================================
|
||||
* SEC context structure.
|
||||
*/
|
||||
typedef struct Ipfreescale_sec_notify_struct
|
||||
{
|
||||
union
|
||||
{
|
||||
RNG_REQ rng;
|
||||
HASH_REQ hash;
|
||||
HMAC_PAD_REQ hmac;
|
||||
DES_LOADCTX_CRYPT_REQ des_cbc;
|
||||
DES_CRYPT_REQ des_ecb;
|
||||
AESA_CRYPT_REQ aes_cbc;
|
||||
AESA_CRYPT_REQ aes_ecb;
|
||||
ARC4_LOADKEY_CRYPT_UNLOADCTX_REQ rc4_key;
|
||||
ARC4_LOADCTX_CRYPT_REQ rc4_ctx;
|
||||
IPSEC_CBC_REQ esp_cbc;
|
||||
MOD_SS_EXP_REQ mod_exp;
|
||||
CCMP_REQ ccmp;
|
||||
#ifdef IPFREESCALE_SEC4
|
||||
CHKSUM_CRC_REQ crc;
|
||||
DMA_REQ dma;
|
||||
AESCCM_REQ aes_ccm;
|
||||
#endif
|
||||
}
|
||||
req;
|
||||
void *kreq;
|
||||
struct Ipfreescale_sec_notify_struct *next;
|
||||
Ipcom_block block;
|
||||
#ifdef IPIPSEC2
|
||||
Ipcom_pkt *pkt;
|
||||
Iphwcrypto_esp_cbc_sa sa;
|
||||
Ipipsec_param param;
|
||||
Ip_u8 digest[IPHWCRYPTO_ENGINE_ESP_MAX_AUTHKEY];
|
||||
#endif
|
||||
void *handle; /* Application handle for asynchronous (non-IPsec) jobs */
|
||||
void *sgt_in; /* Private handle to allocated HW specific scatter gather table */
|
||||
void *sgt_out; /* Private handle to allocated HW specific scatter gather table */
|
||||
Ip_u32 align;
|
||||
}
|
||||
Ipfreescale_sec_notify;
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_sec_notify_queue
|
||||
*===========================================================================
|
||||
* SEC context queue.
|
||||
*/
|
||||
typedef struct Ipfreescale_sec_notify_queue_struct
|
||||
{
|
||||
Ipfreescale_sec_notify *head;
|
||||
Ipfreescale_sec_notify *tail;
|
||||
Ip_u32 size;
|
||||
}
|
||||
Ipfreescale_sec_notify_queue;
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_sec_stats
|
||||
*===========================================================================
|
||||
* SEC statistics.
|
||||
*/
|
||||
typedef struct Ipfreescale_sec_stats_struct
|
||||
{
|
||||
/* requests */
|
||||
unsigned long req_total;
|
||||
unsigned long req_sync;
|
||||
unsigned long req_async;
|
||||
unsigned long req_fail_nomem;
|
||||
unsigned long req_fail_nosyncctx;
|
||||
unsigned long req_fail_noasyncctx;
|
||||
unsigned long req_fail_ioctl;
|
||||
unsigned long req_fail_notify;
|
||||
unsigned long req_fail_timeout;
|
||||
unsigned long req_fail_waitsync;
|
||||
/* notifications */
|
||||
unsigned long notify_sync_done;
|
||||
unsigned long notify_async_done;
|
||||
unsigned long notify_sync_error;
|
||||
unsigned long notify_async_error;
|
||||
/* operations */
|
||||
unsigned long op_rng;
|
||||
unsigned long op_md5;
|
||||
unsigned long op_sha1;
|
||||
unsigned long op_des_cbc;
|
||||
unsigned long op_des_ecb;
|
||||
unsigned long op_3des_cbc;
|
||||
unsigned long op_3des_ecb;
|
||||
unsigned long op_aes_cbc;
|
||||
unsigned long op_aes_ecb;
|
||||
unsigned long op_rc4;
|
||||
unsigned long op_esp_in;
|
||||
unsigned long op_esp_out;
|
||||
unsigned long op_mod_exp;
|
||||
unsigned long op_aes_ccm;
|
||||
unsigned long op_crc;
|
||||
unsigned long op_dma;
|
||||
}
|
||||
Ipfreescale_sec_stats;
|
||||
|
||||
|
||||
/*
|
||||
*===========================================================================
|
||||
* Ipfreescale_sec_data
|
||||
*===========================================================================
|
||||
* SEC data.
|
||||
*/
|
||||
typedef struct Ipfreescale_sec_data_struct
|
||||
{
|
||||
#if defined(IPIPSEC2) || defined(IPFREESCALE_SEC4)
|
||||
/* async context free queue */
|
||||
Ipfreescale_sec_notify_queue async_queue;
|
||||
/* async context request queue */
|
||||
Ipfreescale_sec_notify_queue req_queue;
|
||||
/* spinlock to protect async queue */
|
||||
Ipcom_spinlock async_spl;
|
||||
#endif
|
||||
/* file handle */
|
||||
int fd;
|
||||
/* spinlock to protect sync queue */
|
||||
Ipcom_spinlock sync_spl;
|
||||
/* sync context free queue */
|
||||
Ipfreescale_sec_notify_queue sync_queue;
|
||||
#ifdef IPFREESCALE_USE_STATISTICS
|
||||
/* statistics */
|
||||
Ipfreescale_sec_stats stats;
|
||||
#endif
|
||||
#ifdef IPFREESCALE_SEC2
|
||||
/* pid of signal dispatcher */
|
||||
int pid;
|
||||
/* threadid of signal dispatcher */
|
||||
int threadid;
|
||||
/* semaphore to synchronize start of signal dispatcher */
|
||||
Ipcom_sem disp_sem;
|
||||
#endif
|
||||
/* sec core version */
|
||||
int core_version;
|
||||
/* power quicc device family */
|
||||
int device_family;
|
||||
/* call back funtion for successfull non-IPsec asynchronous jobs */
|
||||
void (*async_done_cbf)(void *);
|
||||
/* call back funtion for failed non-IPsec asynchronous jobs */
|
||||
void (*async_error_cbf)(void *, int);
|
||||
}
|
||||
Ipfreescale_sec_data;
|
||||
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* 6 FUNCTIONS
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
IP_EXTERN IP_GLOBAL Ipfreescale_sec_data ipfreescale_sec;
|
||||
|
||||
IP_GLOBAL int ipfreescale_sec_inum(void);
|
||||
IP_GLOBAL int ipfreescale_sec_num_channels(void);
|
||||
IP_GLOBAL Ip_err ipfreescale_sec_init(void);
|
||||
IP_GLOBAL Ip_err ipfreescale_sec_open(void);
|
||||
IP_GLOBAL const char *ipfreescale_sec_err_string(int status);
|
||||
IP_GLOBAL int ipfreescale_sec_print_stats(char *where, char *buf, int length);
|
||||
IP_GLOBAL void ipfreescale_sec_clear_stats(void);
|
||||
#ifdef IP_PORT_LKM
|
||||
IP_GLOBAL int ipfreescale_sec_proc_info(char *buffer, char **start, int offset, int length);
|
||||
#endif
|
||||
|
||||
IP_GLOBAL void ipfreescale_sec_notify_done(Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL void ipfreescale_sec_notify_error(Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL void ipfreescale_sec_arm_completion(GENERIC_REQ *rq);
|
||||
IP_GLOBAL int ipfreescale_sec_engage(int fd, void *req, int len, Ip_bool async);
|
||||
IP_GLOBAL int ipfreescale_sec_ioctl(int fd, unsigned long request, void *argp);
|
||||
#if !defined(IP_PORT_LKM) && !defined(IP_PORT_INTEGRITY) && !defined(IP_PORT_VXWORKS)
|
||||
IP_GLOBAL int ipfreescale_sec_put_kmem(int fd, IP_CONST void *data, void **block, unsigned int size);
|
||||
IP_GLOBAL int ipfreescale_sec_get_kmem(int fd, void *data, void **block, unsigned int size);
|
||||
IP_GLOBAL int ipfreescale_sec_free_kmem(int fd, void **block);
|
||||
IP_GLOBAL int ipfreescale_sec_malloc_kmem(int fd, void **block, unsigned int size);
|
||||
IP_GLOBAL void ipfreescale_sec_copyto_kmem(int fd, void *data, void *block, unsigned int size);
|
||||
#endif
|
||||
|
||||
IP_GLOBAL int ipfreescale_sec_random_gen(Ip_u8 *data, Ip_u32 length);
|
||||
IP_GLOBAL int ipfreescale_sec_md5_digest(IP_CONST Ip_u8 *data, Ip_u32 length, Ip_u8 *digest);
|
||||
IP_GLOBAL int ipfreescale_sec_md5_hmac(IP_CONST Ip_u8 *data, Ip_u32 length, IP_CONST Ip_u8 *key, Ip_u32 keylength, Ip_u8 *hmac);
|
||||
IP_GLOBAL int ipfreescale_sec_sha1_digest(IP_CONST Ip_u8 *data, Ip_u32 length, Ip_u8 *digest);
|
||||
IP_GLOBAL int ipfreescale_sec_sha1_hmac(IP_CONST Ip_u8 *data, Ip_u32 length, IP_CONST Ip_u8 *key, Ip_u32 keylength, Ip_u8 *hmac);
|
||||
IP_GLOBAL int ipfreescale_sec_des_cbc_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u8 *iv, int enc);
|
||||
IP_GLOBAL int ipfreescale_sec_des_ecb_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, int enc);
|
||||
IP_GLOBAL int ipfreescale_sec_3des_cbc_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u8 *iv, int enc);
|
||||
IP_GLOBAL int ipfreescale_sec_3des_ecb_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, int enc);
|
||||
IP_GLOBAL int ipfreescale_sec_aes_cbc_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u32 keylen, Ip_u8 *iv, int enc);
|
||||
IP_GLOBAL int ipfreescale_sec_aes_ecb_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u32 keylen, int enc);
|
||||
IP_GLOBAL int ipfreescale_sec_rc4_cipher(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, void *key, Ip_u32 keylen, Ip_u8 *ctxi, Ip_u8 *ctxo);
|
||||
IP_GLOBAL int ipfreescale_sec_mod_exp(Ip_u8 *out, IP_CONST Ip_u8 *base, IP_CONST Ip_u8 *e, IP_CONST Ip_u8 *mod, Ip_u32 modlen);
|
||||
IP_GLOBAL int ipfreescale_sec_ccmp_encrypt(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length, Ip_u8 *mic, IP_CONST Ip_u8 *aad,
|
||||
Ip_u32 aadlen, void *key, Ip_u32 keylen, Ip_u8 *ctxi);
|
||||
IP_GLOBAL int ipfreescale_sec_aesccm(Ip_u8 *out, IP_CONST Ip_u8 *in, Ip_u32 length,
|
||||
Ip_u8 *micout, Ip_u8 *micin, Ip_u32 miclen, IP_CONST Ip_u8 *aad, Ip_u32 aadlen,
|
||||
void *key, Ip_u32 keylen, Ip_u8 *ctxi, int enc,
|
||||
Ip_bool async, void * asynchandle, Ip_u32 options);
|
||||
IP_GLOBAL int ipfreescale_sec_crc(IP_CONST Ip_u32 polynomial, IP_CONST Ip_u8 *indata, Ip_u32 length,
|
||||
IP_CONST Ip_u8 *inctxdata, Ip_u32 inctxbytes, Ip_u8 *crc, Ip_u8 crcsize,
|
||||
Ip_bool async, void * asynchandle, Ip_u32 crcoptions);
|
||||
IP_GLOBAL int ipfreescale_sec_dma(IP_CONST Ip_u8 *indata, Ip_u32 length,
|
||||
Ip_u8 *outdata, Ip_bool async, void * asynchandle, Ip_u32 options);
|
||||
|
||||
IP_GLOBAL Ipfreescale_sec_notify *ipfreescale_sec_create_sync_context(void);
|
||||
IP_GLOBAL void ipfreescale_sec_destroy_sync_context(Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL void ipfreescale_sec_enqueue_context_first(Ipfreescale_sec_notify_queue *queue, Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL void ipfreescale_sec_enqueue_context_last(Ipfreescale_sec_notify_queue *queue, Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL Ipfreescale_sec_notify *ipfreescale_sec_dequeue_context(Ipfreescale_sec_notify_queue *queue);
|
||||
IP_GLOBAL Ipfreescale_sec_notify *ipfreescale_sec_create_async_context(void *handle);
|
||||
#ifdef IPIPSEC2
|
||||
IP_GLOBAL Ipfreescale_sec_notify *ipfreescale_sec_ipsec_create_async_context(Iphwcrypto_esp_cbc_sa *sa, Ipipsec_param *param, Ipcom_pkt *pkt);
|
||||
IP_GLOBAL void ipfreescale_sec_destroy_async_context(Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL void ipfreescale_ipsec_sec_notify_done(Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL void ipfreescale_ipsec_sec_notify_error(Ipfreescale_sec_notify *ctx);
|
||||
IP_GLOBAL int ipfreescale_ipsec_sec_esp_input(Ip_u32 opid, Ip_u8 *data, Ip_u32 length, Ip_u8 *outdata, Iphwcrypto_esp_cbc_sa *sa, Ip_u8 *digest, Ipipsec_param *param, Ipcom_pkt *pkt);
|
||||
IP_GLOBAL int ipfreescale_ipsec_sec_esp_output(Ip_u32 opid, Ip_u8 *data, Ip_u32 length, Ip_u8 *outdata, Iphwcrypto_esp_cbc_sa *sa, Ip_u8 *digest, Ipipsec_param *param, Ipcom_pkt *pkt);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
****************************************************************************
|
||||
* END OF FILE
|
||||
****************************************************************************
|
||||
*/
|
||||
Reference in New Issue
Block a user